Claims
- 1. A method for producing and interconnecting a multilayer circuit structure using parallel via RF transmission lines, comprising the steps of:
- providing a plurality of substrate layers; punching a plurality of vias in a given configuration within each of said plurality of substrate layers;
- filling said plurality of vias of each said plurality of substrate layers with a conductive material;
- disposing a pattern of conductive material on said plurality of substrate layers forming a plurality of processed layers;
- stacking said plurality of processed layers forming a multilayer configuration which includes a plurality of vias which form a plurality of parallel wire transmission lines; and
- firing said multilayer configuration producing said multilayer circuit structure.
- 2. The method of claim 1, wherein said plurality of substrate layers are fabricated from a ceramic material.
- 3. The method of claim 1, wherein said vias of said plurality of substrate layers are only partially filled with said conductive material for providing recesses within a surface of said multilayer circuit structure.
- 4. The method of claim 1, which further includes solder bumps.
- 5. The method of claim 3, which further includes solder balls secured with said recesses.
- 6. The method of claim 1, wherein said plurality of via of each said plurality of substrate layers are punched in a staggered configuration for providing each of said plurality of via transmission lines with a chamfered lower portion.
- 7. The method of claim 1, wherein said plurality of substrate layers are stacked in a staggered configuration for providing each of said plurality of via transmission lines with a bent chamfered lower portion.
- 8. The structure of claim 1, wherein said pattern of conductive material includes a stripline transmission line.
AFFECTIVE FILING DATE OF APPLICATION
This application includes the subject matter of provisional patent application No. 60/003,292 to Cho, entitled WIDE FREQUENCY BAND TRANSITION BETWEEN VIA-HOLE RF TRANSMISSION LINES AND PLANAR TRANSMISSION LINES, filed Sep. 6, 1995 and provisional patent application No. 60/032,026 to Cho et al., entitled VIA-HOLES AS RF TRANSMISSION LINES IN MULTI-LAYER CIRCUITS, filed Nov. 25, 1996. This is a divisional of application Ser. No. 08/661,557, filed Jun. 11, 1996. U.S. Pat. No. 5,757,252.
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Divisions (1)
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Number |
Date |
Country |
Parent |
661557 |
Jun 1996 |
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