Patent Application
20250185157
The present invention relates to a wiring board and a mounting structure using the same.
A flip chip ball grid array (FC-BGA) or the like is known as an LSI package in which an LSI chip is mounted on a wiring board. For example, as disclosed in Patent Document 1, a stiffener is provided on a wiring board that is used for such an LSI package for the purpose of reinforcement.
A wiring board according to the present disclosure includes a first insulation layer having a first surface and a second surface located on an opposite side to the first surface, a first laminate portion located on the first surface and including insulation layers, a second laminate portion located on the second surface and including insulation layers, a second insulation layer located as an outermost layer of the insulation layers in the first laminate portion, a third insulation layer located as an outermost layer in the insulation layers of the second laminate portion, a first mounting region located on a first outer surface on the opposite side to the first surface in the second insulation layer, a second mounting region located on the first outer surface to surround the first mounting region in the second insulation layer, a first electrical conductor layer having a planar shape and located on a second outer surface on an opposite side to the second surface in the third insulation layer, a second electrical conductor layer located on a second inner surface on the second surface side in the third insulation layer, and a solder resist covering the second outer surface of the third insulation layer and the first electrical conductor layer, and having an opening from which a part of the first electrical conductor layer is exposed. In a plane perspective view, in a frame-shaped region between an outer peripheral edge of the first mounting region and an outer peripheral edge of the second mounting region, a through-hole conductor configured to connect the first electrical conductor layer and the second electrical conductor layer is located across an edge of the opening.
A mounting structure according to the present disclosure includes the wiring board described above, an electronic component located in the first mounting region, a stiffener located in the second mounting region, and an external substrate including an electrode. The first electrical conductor layer inside the opening and the electrode are connected to each other via a solder.
In a known wiring board, the wiring board is likely to warp due to a difference in the coefficient of thermal expansion between a substrate, a chip, and a stiffener. In particular, due to the warping, stress is likely to be concentrated in a region between the chip and the stiffener, and cracks are likely to occur in a plane conductor (in particular, a plane conductor around a solder) present on a surface (opposite surface) facing this region. Thus, a wiring board is demanded in which stress is less likely to be concentrated in the region between the chip and the stiffener and in which cracks are less likely to occur even when the wiring board is used in an environment in which the temperature repeatedly becomes high and low.
In a wiring board according to the present disclosure, as described in a section for Solution to Problem, in a plane perspective view, in a frame-shaped region between the outer peripheral edge of a first mounting region and the outer peripheral edge of a second mounting region, a through-hole conductor that connects a first electrical conductor layer and a second electrical conductor layer is located across the edge of an opening. Thus, in the wiring board according to the present disclosure, even when the wiring board is used in the environment in which the temperature repeatedly becomes high and low, stress is less likely to be concentrated in the region between the chip and the stiffener, and cracks are less likely to occur.
The wiring board according to one embodiment of the present disclosure will be described with reference to
The first insulation layer 21 has a first surface 211 and a second surface 212 located on the opposite side to the first surface 211. The first surface 211 and the second surface 212 correspond to main surfaces of the first insulation layer 21. In the wiring board 1 according to the one embodiment, the first insulation layer 21 corresponds to a core insulation layer.
The first insulation layer 21 is not particularly limited as long as the first insulation layer 21 is formed of a material having an insulation property. Examples of the material having an insulation property include resins such as an epoxy resin, a bismaleimide-triazine resin, a polyimide resin, and a polyphenylene ether resin. Two or more types of these resins may be mixed and used. The thickness of the first insulation layer 21 is not particularly limited and is, for example, from 40 μm to 1800 μm.
The first insulation layer 21 may include a reinforcing material. Examples of the reinforcing material include insulation fabric materials such as glass fiber, glass non-woven fabric, aramid non-woven fabric, aramid fiber, and polyester fiber. Two or more types of reinforcing materials may be used in combination. An inorganic insulation filler made of, for example, silica, barium sulfate, talc, clay, glass, calcium carbonate, or titanium oxide may be dispersed in the first insulation layer 21.
A through-hole metal 2a is located in the first insulation layer 21 in order to electrically connect the upper and lower surfaces of the first insulation layer 21. The through-hole metal 2a is located inside a through hole penetrating from the first surface 211 to the second surface 212 of the first insulation layer 21. The through-hole metal 2a is formed of, for example, metal plating such as copper plating. The through-hole metal 2a is connected to electrical conductor layers 4 formed on both sides of the first insulation layer 21. The through-hole metal 2a may be formed only on an inner wall surface of the through hole, or the through hole may be filled with the through-hole metal 2a.
The first laminate portion 11 is located on the first surface 211 of the first insulation layer 21. The first laminate portion 11 has a structure in which the electrical conductor layer 4 and an insulation layer are alternately laminated. At least two of the electrical conductor layers 4 and one of the insulation layers are laminated in the first laminate portion 11. The electrical conductor layer 4 is not limited as long as the electrical conductor layer 4 is formed of a conductor such as metal. Specifically, the electrical conductor layer 4 is formed of a metal foil such as a copper foil, metal plating such as copper plating, or the like. The thickness of the electrical conductor layer 4 is not particularly limited, and is, for example, from 10 μm to 30 μm.
As the same as or similar to the first insulation layer 21, the insulation layer is not particularly limited as long as the insulation layer is formed of a material having an insulation property. Examples of the material having an insulation property include resins such as an epoxy resin, a bismaleimide-triazine resin, a polyimide resin, and a polyphenylene ether resin. Two or more types of these resins may be mixed and used. The insulation layers may be formed of the same resin or may be formed of different resins. The insulation layer and the first insulation layer 21 may be formed of the same resin, or may be formed of different resins.
An inorganic insulation filler made of, for example, silica, barium sulfate, talc, clay, glass, calcium carbonate, or titanium oxide may be dispersed in the insulation layer. The thickness of the insulation layer is not particularly limited and is, for example, from 5 μm to 50 μm. The insulation layers may have the same thickness, or may have different thicknesses.
A via-hole metal 2b for electrically connecting the layers is formed in the insulation layer. The via-hole metal 2b is located in a via-hole penetrating the upper and lower surfaces of the insulation layer. The via-hole metal 2b is formed of, for example, metal plating such as copper plating. The via-hole metal 2b is connected to the electrical conductor layers 4 located on both surfaces of the insulation layer. The via hole may be filled with the via-hole metal 2b, or the via-hole metal 2b may be located only on an inner wall surface of the via hole.
Of the insulation layers in the first laminate portion 11, the insulation layer located as the outermost layer is defined as a second insulation layer 22. That is, the insulation layer farthest from the first surface 211 is the second insulation layer 22. In the wiring board 1 illustrated in
As illustrated in
The first mounting region 31 is a region for mounting the electronic component 7, and is located on the outermost surface on the first surface 211 side. As illustrated in
As illustrated in
The second laminate portion 12 is located on the second surface 212 of the first insulation layer 21. As the same as or similar to the first laminate portion 11, the second laminate portion 12 has a structure in which the electrical conductor layer 4 and the insulation layer are alternately laminated. At least two of the electrical conductor layers 4 and one of the insulation layers are laminated in the second laminate portion 12. The electrical conductor layer 4 and the insulation layer are as described above, and detailed description thereof will be omitted.
Of the insulation layers in the second laminate portion 12, the insulation layer located as the outermost layer is defined as a third insulation layer 23. That is, the insulation layer farthest from the second surface 212 is the third insulation layer 23. In the wiring board 1 illustrated in
Of the electrical conductor layers 4 in the second laminate portion 12, the electrical conductor layer 4 located as the outermost layer is defined as a first electrical conductor layer 41. That is, in the third insulation layer 23, the electrical conductor layer located on a second outer surface on the opposite side to the second surface 212 is the first electrical conductor layer 41. The first electrical conductor layer 41 is a planar electrical conductor layer having a planar shape. On the other hand, in the third insulation layer 23, the electrical conductor layer 4 located on a second inner surface on the second surface 212 side is defined as a second electrical conductor layer 42.
As illustrated in
In
When the wiring board 1 is viewed in a plane perspective view, in the first electrical conductor layer 41, a frame-shaped region 33 is located between the outer peripheral edge of the first mounting region 31 and the outer peripheral edge of the second mounting region 32. Specifically, the frame-shaped region 33 is a hatched portion illustrated in
In a plane perspective view, in the frame-shaped region 33, a through-hole conductor 43 that connects the first electrical conductor layer 41 and the second electrical conductor layer 42 is located across the edge of the opening 51b of the solder resist 5. The through-hole conductor 43 is not limited as long as it is a conductor, and is formed of, for example, metal plating such as copper plating. Since the through-hole conductor 43 having a rigidity higher than that of a resin is located at such a position, a binding force with respect to the first electrical conductor layer 41 is gradually alleviated. Thus, even if the wiring board 1 warps due to a difference in the coefficient of thermal expansion between the wiring board 1, the electronic component 7, and the stiffener 8, stress concentration at the periphery of the solder 6 connected to the first electrical conductor layer 41 is alleviated. As a result, even when the wiring board 1 is used in the environment in which the temperature repeatedly becomes high and low, cracks are less likely to occur.
The through-hole conductor 43 is not limited as long as it is located across the edge of the opening 51b in a plane perspective view. The edge of the opening 51b may be located substantially at the center of the through-hole conductor 43 in a plane perspective view, or the through-hole conductor 43 may be located closer to the outer side or the inner side of the opening 51b. Since stress tends to become larger from the edge of the opening 51b toward the outer side of the opening 51b than on the inner side of the opening 51b, when the edge of the opening 51b is located substantially at the center of the through-hole conductor 43, and also when the through-hole conductor 43 is located closer to the outer side of the opening 51b, the stress alleviating effect is further improved.
At least one of the through-hole conductors 43 may be located with respect to one of the openings 51b. For example, as illustrated in
Since the through-hole conductor 43 is disposed in such a manner, even if the warping occurs due to the difference in the coefficient of thermal expansion between the wiring board 1, the electronic component 7, and the stiffener 8, the stress concentration at the periphery of the solder 6 connected to the first electrical conductor layer 41 is further alleviated. As a result, even when the wiring board 1 is used in the environment in which the temperature repeatedly becomes high and low, cracks are less likely to occur. The “point-symmetrical position with respect to the center of the opening 51b of the solder resist with the center acting as the point of symmetry” can be defined as, for example, a midpoint of a line segment bisecting a length L described later, an intersection point of diagonal lines, or the center of gravity in each of the through-hole conductors 43.
The shape of the frame-shaped region 33 is determined in accordance with the shapes of the first mounting region 31 and the second mounting region 32. In the wiring board 1, as illustrated in
The through-hole conductors 43 include first through-hole conductors 431 located in the corner portions R1 of the frame-shaped region 33 having the quadrilateral frame shape, and second through-hole conductors 432 located in the side portions R2 of the frame-shaped region 33. As illustrated in
When the frame-shaped region 33 has the quadrilateral frame shape, in the corner portions R1, stress is likely to occur in the first direction along the diagonal line connecting the corner portions R1, and in the side portions R2, stress is likely to occur in the second direction perpendicular to the side portion of the frame-shaped region 33. Therefore, as a result of the first through-hole conductors 431 and the second through-hole conductors 432s being located in the above-described manner, cracks are less likely to occur even when the wiring board 1 is used in the environment in which the temperature repeatedly becomes high and low.
As illustrated in
When the opening 51b has a circular shape, the through-hole conductor 43 may have a circular shape in a plan view, as illustrated in
When the plurality of through-hole conductors 43 are provided at the point-symmetrical positions with respect to the center of the opening 51b with the center acting as the point of symmetry, the upper limit of the angle θ is preferably approximately 135°. This is advantageous in terms of improving dispersion of stress. The plurality of through-hole conductors 43 may be provided without considering the point-symmetrical positions with respect to the center of the opening 51 with the center acting as the point of symmetry and the angle θ.
When the opening 51b has a circular shape, the through-hole conductor 43 may have an arc shape in a plane perspective view, as illustrated in
The length of the through-hole conductor 43 (the length L illustrated in
Between the outer periphery of the first mounting region 31 and the inner periphery of the second mounting region 32, as illustrated in
When the opening 51b has one of the shapes illustrated in
As illustrated in
All of the openings 51b formed in the solder resist 5 may have substantially the same opening area. When the opening 51b has substantially the same opening area, an amount of the solder 6 can be made substantially constant when the electronic component 7 is mounted, and the mounting reliability can be improved. In the present specification, “substantially the same opening area” means an area within a range of +10% of a reference opening area.
The wiring board 1 as described above is formed, for example, as follows. First, the first insulation layer 21 is prepared. Through holes are formed in the first insulation layer 21 by drilling, blasting, or laser machining. Subsequently, the electrical conductor layer 4 and the insulation layer are alternately laminated on the first surface 211 side and the second surface 212 side of the first insulation layer 21. When the electrical conductor layer 4 is formed on the surface of the first insulation layer 21 by, for example, copper plating using a semi-additive method, the through-hole metal 2a may be formed in the through-hole, or the through-hole metal 2a may be formed in the through hole in advance. A method for forming the electrical conductor layer 4 and the through-hole metal 2a is as described above, and detailed description thereof will be omitted.
The insulation layer is formed by applying a film made of a resin such as an epoxy resin, a bismaleimide-triazine resin, a polyimide resin, and a polyphenylene ether resin under vacuum and thermally curing the film. By performing laser machining on the insulation layer, a via hole having the electrical conductor layer 4 as a bottom portion is formed. After the laser machining, desmear treatment for removing resin smear, carbide or the like is performed to improve the adhesion strength between the via hole and the via-hole metal 2b. When the electrical conductor layer 4 is formed on the surface of the insulation layer, for example, using the semi-additive method, the via-hole metal 2b is formed of plating metal in the via hole.
By repeating the step of forming the electrical conductor layer 4 and the step of forming the insulation layer, a desired number of the electrical conductor layers 4 and the insulation layers are formed, and the first laminate portion 11 and the second laminate portion 12 are formed. Of the insulation layers of the first laminate portion 11, the insulation layer located as the outermost layer is referred to as the second insulation layer 22, and of the insulation layers of the second laminate portion 12, the insulation layer located as the outermost layer is referred to as the third insulation layer 23.
As described above, in the third insulation layer 23, the electrical conductor layer 4 located on the second outer surface on the opposite side to the second surface 212 is the first electrical conductor layer 41 having the planar shape. On the other hand, in the third insulation layer 23, the electrical conductor layer 4 located on the second inner surface on the second surface 212 side is the second electrical conductor layer 42.
When the above-described via hole is formed, the through hole for forming the through-hole conductor 43 that connects the first electrical conductor layer 41 and the second electrical conductor layer 42 is also formed in the third insulation layer 23. The through hole is formed extending across the edge of the opening 51b of the solder resist 5 described later. When forming the via-hole metal 2b, the through-hole conductor 43 is formed of, for example, the same conductor as the via-hole metal 2b.
Subsequently, the surface (first outer surface) of the first laminate portion 11 and the surface (second outer surface) of the second laminate portion 12 are covered with the solder resist 5. In the solder resist 5 covering the surface (first outer surface) of the first laminate portion 11, the opening 51a is formed in a region that forms the first mounting region 31. In the solder resist 5 covering the surface (second outer surface) of the second laminate portion 12, the opening 51b for electrically connecting the first electrical conductor layer 41 and the electrode 61 of the external substrate 60 (for example, the motherboard or the like) via the solder 6 is formed.
In the above-described manner, the wiring board 1 according to the one embodiment is obtained. Since the through-hole conductors 43 are disposed in the wiring board 1, even if the warping occurs due to the difference in the coefficient of thermal expansion between the wiring board 1, the electronic component 7, and the stiffener 8, the stress concentration at the periphery of the solder 6 connected to the first electrical conductor layer 41 is alleviated. As a result, cracks are less likely to occur even when the wiring board 1 is used in the environment in which the temperature repeatedly becomes high and low.
The mounting structure according to the present disclosure includes the wiring board 1 according to the one embodiment, the electronic components 7 located in the first mounting region 31 of the wiring board 1, the stiffener 8 located in the second mounting region 32, and the external substrate including the electrode 61. The first electrical conductor layer 41 inside the opening 51b of the solder resist 5 and the electrode 61 are connected via the solder 6. As described above, examples of the electronic component 7 include a semiconductor integrated circuit element and an optoelectronic element.
With respect to the known mounting structure and the mounting structure according to the present disclosure, cross-sectional views of simulation models and simulation results (stress distribution diagrams) in which different shapes and positions of the through-hole conductors 43 are provided in the wiring board are illustrated in
With respect to the known mounting structure, as illustrated in
As illustrated in
With respect to the mounting structures according to the first to fourth embodiments of the present disclosure, when the breakage probability is measured (calculated) if the breakage probability of the known mounting structure is set to 100%, it can be understood that the breakage probability is reduced by 10% or more, and in the examples in which the wiring board including the through-hole conductor 43 having the arc shape or the annular shape was used, the breakage probability is reduced by 70% or more. From the description above, it can be understood that a slight reduction in the stress, that is, a reduction in the stress by a small percentage, significantly contributes to a reduction in the breakage probability. The breakage probability in the present disclosure is calculated by dividing ((the stress value generated in the electrical conductor layer under the opening edge)−(the stress value generated in the island-shaped electrical conductor layer under the opening edge in the structure of the present disclosure)) by ((the stress value generated in the electrical conductor layer under the opening edge)−(the stress value generated in the island-shaped electrical conductor layer under the opening edge in the known structure)). That is, when the stress value generated in the island-shaped electrical conductor layer, which is located under the opening edge of the solder resist 5 so as to be separated from the surrounding electrical conductor layer and in which no cracks are observed, is used as a reference, the breakage probability is a percentage of the stress value excessively applied to the electrical conductor layer of the structure of the present disclosure with respect to the stress value excessively applied to the electrical conductor layer having the known structure, and is an index that is used to estimate the occurrence probability of the cracks.
With respect to the example in which the wiring board including the through-hole conductors 43 each having the arc shape was used, a difference in the stress alleviating effect due to the position of the through-hole conductor 43 was examined. First, as illustrated in the third embodiment of the present disclosure in
The wiring board of the present disclosure is not limited to the above-described embodiments. In the wiring board 1 according to the one embodiment, the first mounting region 31 has the quadrilateral shape in a plan view. However, in the wiring board according to the present disclosure, the shape of the first mounting region is appropriately set according to the shape of the electronic component, and may be a polygonal shape such as a triangular shape, a pentagonal shape, or a hexagonal shape, or may be a circular shape or an elliptical shape in a plan view.
In the wiring board 1 according to the one embodiment, the second mounting region 32 has the quadrilateral frame shape in a plan view. However, in the wiring board according to the present disclosure, the shape of the second mounting region is not limited, and may be a polygonal frame shape such as a triangular frame shape, a pentagonal frame shape, or a hexagonal frame shape, or may be a circular ring shape or an elliptical ring shape in a plan view.
As illustrated in
In the wiring board 1 according to the one embodiment, a pair of the through-hole conductors 43 located at the point-symmetrical positions with respect to the center of the opening 51b of the solder resist 5 with the center acting as the point of symmetry have the same shape and the same size. However, the shape and the size may be different from each other depending on the magnitude of stress generated around the opening 51b. This makes it easier to keep the balance between the dispersion of stress and the electrical characteristics.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2022-029033 | Feb 2022 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2023/006465 | 2/22/2023 | WO |
