Bert Sullam

Person

Bellevue, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Ultra-low power adaptively reconfigurable system
- Patent number 11,533,055
- Issue date Dec 20, 2022
- Cypress Semiconductor Corporation
- Eashwar Thiagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined analog architecture and functionality in a mixed-signal array
- Patent number 11,105,851
- Issue date Aug 31, 2021
- Cypress Semiconductor Corporation
- Harold Kutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System level interconnect with programmable switching
- Patent number 10,826,499
- Issue date Nov 3, 2020
- Cypress Semiconductor Corporation
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined analog architecture and functionality in a mixed-signal array
- Patent number 10,634,722
- Issue date Apr 28, 2020
- Cypress Semiconductor Corporation
- Harold Kutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System level interconnect with programmable switching
- Patent number 10,516,397
- Issue date Dec 24, 2019
- Cypress Semiconductor Corporation
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined analog architecture and functionality in a mixed-signal array
- Patent number 10,345,377
- Issue date Jul 9, 2019
- Cypress Semiconductor Corporation
- Harold M. Kutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System level interconnect with programmable switching
- Patent number 10,097,185
- Issue date Oct 9, 2018
- Cypress Semiconductor Corporation
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined analog architecture and functionality in a mixed-signal array
- Patent number 9,952,282
- Issue date Apr 24, 2018
- Cypress Semiconductor Corporation
- Harold M. Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Autonomous control in a programmable system
- Patent number 9,880,536
- Issue date Jan 30, 2018
- Cypress Semiconductor Corporation
- Bert S. Sullam
- G05 - CONTROLLING REGULATING
Information Patent Grant
Dynamically reconfigurable analog routing circuits and methods for...
- Patent number 9,612,987
- Issue date Apr 4, 2017
- Cypress Semiconductor Corporation
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically configurable and re-configurable data path
- Patent number 9,564,902
- Issue date Feb 7, 2017
- Cypress Semiconductor Corporation
- Warren Synder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System level interconnect with programmable switching
- Patent number 9,553,588
- Issue date Jan 24, 2017
- Cypress Semiconductor Corporation
- Bert S. Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Autonomous control in a programmable system
- Patent number 9,448,964
- Issue date Sep 20, 2016
- Cypress Semiconductor Corporation
- Bert Sullam
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System level interconnect with programmable switching
- Patent number 9,325,320
- Issue date Apr 26, 2016
- Cypress Semiconductor Corporation
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined analog architecture and functionality in a mixed-signal array
- Patent number 9,143,134
- Issue date Sep 22, 2015
- Cypress Semiconductor Corporation
- Harold M. Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip calibration method
- Patent number 9,124,285
- Issue date Sep 1, 2015
- Cypress Semiconductor Corporation
- Harold M. Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Universal digital block interconnection and channel routing
- Patent number 9,018,979
- Issue date Apr 28, 2015
- Cypress Semiconductor Corporation
- Warren Snyder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable interrupt routing system
- Patent number 8,838,852
- Issue date Sep 16, 2014
- Cypress Semiconductor Corporation
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Active liquid crystal display drivers and duty cycle operation
- Patent number 8,686,985
- Issue date Apr 1, 2014
- Cypress Semiconductor Corporation
- Warren Snyder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip calibration method
- Patent number 8,643,519
- Issue date Feb 4, 2014
- Cypress Semiconductor Corporation
- Harold Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Addressing scheme to allow flexible mapping of functions in a progr...
- Patent number 8,639,850
- Issue date Jan 28, 2014
- Cypress Semiconductor Corp.
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built in system bus interface for random access to programmable log...
- Patent number 8,598,908
- Issue date Dec 3, 2013
- Cypress Semiconductor Corp.
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable reset pin for input/output port
- Patent number 8,601,254
- Issue date Dec 3, 2013
- Cypress Semiconductor Corp.
- Harold Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock driven dynamic datapath chaining
- Patent number 8,516,025
- Issue date Aug 20, 2013
- Cypress Semiconductor Corporation
- Warren Synder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined analog architecture and functionality in a mixed-signal array
- Patent number 8,487,655
- Issue date Jul 16, 2013
- Cypress Semiconductor Corporation
- Harold Kutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Universal digital block interconnection and channel routing
- Patent number 8,482,313
- Issue date Jul 9, 2013
- Cypress Semiconductor Corporation
- Warren Snyder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System level interconnect with programmable switching
- Patent number 8,476,928
- Issue date Jul 2, 2013
- Cypress Semiconductor Corporation
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable testing system and method
- Patent number 8,402,313
- Issue date Mar 19, 2013
- Cypress Semiconductor Corporation
- Matthew A. Pleis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor independent line driving and receiving system
- Patent number 8,250,249
- Issue date Aug 21, 2012
- Cypress Semiconductor Corporation
- Gaurang Kavaiya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable interrupt routing system
- Patent number 8,135,884
- Issue date Mar 13, 2012
- Cypress Semiconductor Corporation
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOW-POWER PROGRAMMABLE ANALOG SUBSYSTEM FOR ACOUSTIC ACTIVITY DETEC...
- Publication number 20240406619
- Publication date Dec 5, 2024
- Cypress Semiconductor Corporation
- Eashwar Thiagarajan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS, DEVICES AND SYSTEMS FOR ANALOG CIRCUIT BLOCK OPERATIONS CO...
- Publication number 20240394452
- Publication date Nov 28, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE SENSOR
- Publication number 20240385139
- Publication date Nov 21, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Eashwar Thiagarajan
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR CONFIGURING PROGRAMMABLE ANALOG BLOCK
- Publication number 20240250684
- Publication date Jul 25, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Nidhin MULANGATTIL SUDHAKARAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
AUTONOMOUS ADAPTIVELY RECONFIGURABLE SYSTEM
- Publication number 20240168514
- Publication date May 23, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Eashwar THIAGARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ULTRA-LOW POWER ADAPTIVELY RECONFIGURABLE SYSTEM
- Publication number 20230188139
- Publication date Jun 15, 2023
- CYPRESS SEMICONDUCTOR CORPORATION
- Eashwar Thiagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Combined Analog Architecture and Functionality in a Mixed-Signal Array
- Publication number 20200300910
- Publication date Sep 24, 2020
- CYPRESS SEMICONDUCTOR CORPORATION
- Harold Kutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING
- Publication number 20200169259
- Publication date May 28, 2020
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ULTRA-LOW POWER ADAPTIVELY RECONFIGURABLE SYSTEM
- Publication number 20200083889
- Publication date Mar 12, 2020
- CYPRESS SEMICONDUCTOR CORPORATION
- Eashwar Thiagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING
- Publication number 20190214995
- Publication date Jul 11, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Combined Analog Architecture and Functionality in a Mixed-Signal Array
- Publication number 20180292454
- Publication date Oct 11, 2018
- CYPRESS SEMICONDUCTOR CORPORATION
- Harold M. Kutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING
- Publication number 20180191351
- Publication date Jul 5, 2018
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamically Reconfigurable Analog Routing and Multiplexing Architec...
- Publication number 20170286344
- Publication date Oct 5, 2017
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert S. Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING
- Publication number 20160105186
- Publication date Apr 14, 2016
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert S. Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING
- Publication number 20140013022
- Publication date Jan 9, 2014
- Warren Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY RECONFIGURABLE ANALOG ROUTING CIRCUITS AND METHODS FOR...
- Publication number 20110026519
- Publication date Feb 3, 2011
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESSING SCHEME TO ALLOW FLEXIBLE MAPPING OF FUNCTIONS IN A PROGR...
- Publication number 20100287334
- Publication date Nov 11, 2010
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTONOMOUS CONTROL IN A PROGRAMMABLE SYSTEM
- Publication number 20100281145
- Publication date Nov 4, 2010
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DRIVEN DYNAMIC DATAPATH CHAINING
- Publication number 20080288755
- Publication date Nov 20, 2008
- CYPRESS SEMICONDUCTOR CORPORATION
- Warren Synder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMICALLY CONFIGURABLE AND RE-CONFIGURABLE DATA PATH
- Publication number 20080263334
- Publication date Oct 23, 2008
- Cypress Semiconductor Corp.
- Warren Synder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ACTIVE LIQUID CRYSTAL DISPLAY DRIVERS AND DUTY CYCLE OPERATION
- Publication number 20080259070
- Publication date Oct 23, 2008
- CYPRESS SEMICONDUCTOR CORPORATION
- Warren Snyder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING
- Publication number 20080258759
- Publication date Oct 23, 2008
- CYPRESS SEMICONDUCTOR CORPORATION
- Warren Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIVERSAL DIGITAL BLOCK WITH INTEGRATED ARITHMETIC LOGIC UNIT
- Publication number 20080263319
- Publication date Oct 23, 2008
- CYPRESS SEMICONDUCTOR CORPORATION
- Warren Snyder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING
- Publication number 20080258760
- Publication date Oct 23, 2008
- CYPRESS SEMICONDUCTOR CORPORATION
- Bert Sullam
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH SPEED DUAL PORT MEMORY WITHOUT SENSE AMPLIFIER
- Publication number 20080259698
- Publication date Oct 23, 2008
- Cypress Semiconductor Corp.
- Onur Ozbek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Independent control of core system blocks for power optimization
- Publication number 20070180279
- Publication date Aug 2, 2007
- Bert Sullam
- G06 - COMPUTING CALCULATING COUNTING

Bert Sullam

Person

Patents Grantslast 30 patents

Ultra-low power adaptively reconfigurable system

Combined analog architecture and functionality in a mixed-signal array

System level interconnect with programmable switching

Combined analog architecture and functionality in a mixed-signal array

System level interconnect with programmable switching

Combined analog architecture and functionality in a mixed-signal array

System level interconnect with programmable switching

Combined analog architecture and functionality in a mixed-signal array

Autonomous control in a programmable system

Dynamically reconfigurable analog routing circuits and methods for...

Dynamically configurable and re-configurable data path

System level interconnect with programmable switching

Autonomous control in a programmable system

System level interconnect with programmable switching

Combined analog architecture and functionality in a mixed-signal array

On-chip calibration method

Universal digital block interconnection and channel routing

Programmable interrupt routing system

Active liquid crystal display drivers and duty cycle operation

On-chip calibration method

Addressing scheme to allow flexible mapping of functions in a progr...

Built in system bus interface for random access to programmable log...

Configurable reset pin for input/output port

Clock driven dynamic datapath chaining

Combined analog architecture and functionality in a mixed-signal array

Universal digital block interconnection and channel routing

System level interconnect with programmable switching

Reconfigurable testing system and method

Processor independent line driving and receiving system

Programmable interrupt routing system

Patents Applicationslast 30 patents

LOW-POWER PROGRAMMABLE ANALOG SUBSYSTEM FOR ACOUSTIC ACTIVITY DETEC...

METHODS, DEVICES AND SYSTEMS FOR ANALOG CIRCUIT BLOCK OPERATIONS CO...

PROGRAMMABLE SENSOR

SYSTEM AND METHOD FOR CONFIGURING PROGRAMMABLE ANALOG BLOCK

AUTONOMOUS ADAPTIVELY RECONFIGURABLE SYSTEM

ULTRA-LOW POWER ADAPTIVELY RECONFIGURABLE SYSTEM

Combined Analog Architecture and Functionality in a Mixed-Signal Array

SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING

ULTRA-LOW POWER ADAPTIVELY RECONFIGURABLE SYSTEM

SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING

Combined Analog Architecture and Functionality in a Mixed-Signal Array

SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING

Dynamically Reconfigurable Analog Routing and Multiplexing Architec...

SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING

UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING

DYNAMICALLY RECONFIGURABLE ANALOG ROUTING CIRCUITS AND METHODS FOR...

ADDRESSING SCHEME TO ALLOW FLEXIBLE MAPPING OF FUNCTIONS IN A PROGR...

AUTONOMOUS CONTROL IN A PROGRAMMABLE SYSTEM

CLOCK DRIVEN DYNAMIC DATAPATH CHAINING

DYNAMICALLY CONFIGURABLE AND RE-CONFIGURABLE DATA PATH

ACTIVE LIQUID CRYSTAL DISPLAY DRIVERS AND DUTY CYCLE OPERATION

UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING

UNIVERSAL DIGITAL BLOCK WITH INTEGRATED ARITHMETIC LOGIC UNIT

SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING

HIGH SPEED DUAL PORT MEMORY WITHOUT SENSE AMPLIFIER

Independent control of core system blocks for power optimization