Brett Williams

Person

Eagle, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memories and methods to provide configuration information to contro...
- Patent number 10,355,001
- Issue date Jul 16, 2019
- Micron Technology, Inc.
- Brett L. Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Memories and methods to provide configuration information to contro...
- Patent number 10,141,314
- Issue date Nov 27, 2018
- Micron Technology, Inc.
- Brett L. Williams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asynchronously-accessible memory device with mode selection circuit...
- Patent number 7,681,006
- Issue date Mar 16, 2010
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronously-accessible memory device with mode selection circuit...
- Patent number 7,681,005
- Issue date Mar 16, 2010
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for burst or pipelined operation with mode selection...
- Patent number 7,124,256
- Issue date Oct 17, 2006
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst/pipelined edo memory device
- Patent number 7,103,742
- Issue date Sep 5, 2006
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for switching between modes of operation
- Patent number 6,615,325
- Issue date Sep 2, 2003
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance matching device for high speed memory bus
- Patent number 6,587,896
- Issue date Jul 1, 2003
- Micron Technology, Inc.
- Donald Baldwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable memory with selectable error correction storage
- Patent number 6,584,543
- Issue date Jun 24, 2003
- Micron Technology, Inc.
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable memory with selectable error correction storage
- Patent number 6,397,290
- Issue date May 28, 2002
- Micron Technology, Inc.
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable memory with selectable error correction storage
- Patent number 6,279,072
- Issue date Aug 21, 2001
- Micron Technology, Inc.
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for initializing and reprogramming a control operation featu...
- Patent number 6,175,901
- Issue date Jan 16, 2001
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for enabling access to computer system resources
- Patent number 6,094,702
- Issue date Jul 25, 2000
- Micron Technology, Inc.
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data communication for memory
- Patent number 6,002,613
- Issue date Dec 14, 1999
- Micron, Technology, Inc.
- Eugene H. Cloud
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for initializing and reprogramming a control operation featu...
- Patent number 5,982,697
- Issue date Nov 9, 1999
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having circuitry for initializing and reprogramming a...
- Patent number 5,905,909
- Issue date May 18, 1999
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Initializing and reprogramming circuitry for state independent memo...
- Patent number 5,896,551
- Issue date Apr 20, 1999
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having circuitry for initializing and reprogramming a...
- Patent number 5,887,162
- Issue date Mar 23, 1999
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst EDO memory address counter
- Patent number 5,850,368
- Issue date Dec 15, 1998
- Micron Technology, Inc.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for initializing and reprogramming a control operation featu...
- Patent number 5,841,726
- Issue date Nov 24, 1998
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-enabling pulse-trapping circuit
- Patent number 5,831,932
- Issue date Nov 3, 1998
- Micron Technology, Inc.
- Todd Merritt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for initializing and reprogramming a control operation featu...
- Patent number 5,812,842
- Issue date Sep 22, 1998
- Micron Technology Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst EDO memory device
- Patent number 5,802,010
- Issue date Sep 1, 1998
- Micron Technology, Inc.
- Paul S. Zagar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for initializing and reprogramming a control operation featu...
- Patent number 5,757,715
- Issue date May 26, 1998
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Data communication for memory
- Patent number 5,724,288
- Issue date Mar 3, 1998
- Micron Technology, Inc.
- Eugene H. Cloud
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having circuitry for initializing and reprogramming a...
- Patent number 5,717,639
- Issue date Feb 10, 1998
- Micron Technology, Inc.
- Brett Williams
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-enabling pulse-trapping circuit
- Patent number 5,706,247
- Issue date Jan 6, 1998
- Micron Technology, Inc.
- Todd Merritt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRAM having multiple column address strobe operation
- Patent number 5,703,813
- Issue date Dec 30, 1997
- Micron Technology, Inc.
- Troy A. Manning
- G11 - INFORMATION STORAGE
Information Patent Grant
Burst EDO memory device
- Patent number 5,696,732
- Issue date Dec 9, 1997
- Micron Technology, Inc.
- Paul S. Zagar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Burst EDO memory device
- Patent number 5,661,695
- Issue date Aug 26, 1997
- Micron Technolgy, Inc.
- Paul S. Zagar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORIES AND METHODS TO PROVIDE CONFIGURATION INFORMATION TO CONTRO...
- Publication number 20190088651
- Publication date Mar 21, 2019
- Micron Technology, Inc.
- Brett L. Williams
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEMS, MEMORY CONTROLLERS, MEMORY MODULES AND METHODS FOR...
- Publication number 20120284480
- Publication date Nov 8, 2012
- Micron Technology, Inc.
- Brett L. Williams
- G11 - INFORMATION STORAGE
Information Patent Application
Asynchronously-accessible memory devices and access methods
- Publication number 20070239956
- Publication date Oct 11, 2007
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Application
Memory devices and access methods
- Publication number 20060253665
- Publication date Nov 9, 2006
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Application
ASYNCHRONOUSLY-ACCESSIBLE MEMORY DEVICES AND ACCESS METHODS
- Publication number 20060248293
- Publication date Nov 2, 2006
- Micron Technology, Inc.
- Jeffrey S. Mailloux
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM ADAPTED TO RECEIVE MULTIPLE MEMORY TYPES, AND METHOD FOR DET...
- Publication number 20030084233
- Publication date May 1, 2003
- BRETT L. WILLIAMS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable memory with selectable error correction storage
- Publication number 20030070054
- Publication date Apr 10, 2003
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BURST/PIPELINED EDO MEMORY DEVICE
- Publication number 20020133665
- Publication date Sep 19, 2002
- JEFFREY S. MAILLOUX
- G11 - INFORMATION STORAGE
Information Patent Application
Reconfigurable memory with selectable error correction storage
- Publication number 20020029315
- Publication date Mar 7, 2002
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable memory with selectable error correction storage
- Publication number 20020029316
- Publication date Mar 7, 2002
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR SWITCHING BETWEEN MODES OF OPERATION
- Publication number 20010044875
- Publication date Nov 22, 2001
- JEFFREY S. MAILLOUX
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM SUPPORTING MULTIPLE MEMORY MODES INCLUDING A BURST EXTENDED...
- Publication number 20010032290
- Publication date Oct 18, 2001
- Brett L. Williams
- G06 - COMPUTING CALCULATING COUNTING

Brett Williams

Person

Patents Grantslast 30 patents

Memories and methods to provide configuration information to contro...

Memories and methods to provide configuration information to contro...

Asynchronously-accessible memory device with mode selection circuit...

Asynchronously-accessible memory device with mode selection circuit...

Memory device for burst or pipelined operation with mode selection...

Burst/pipelined edo memory device

Method for switching between modes of operation

Impedance matching device for high speed memory bus

Reconfigurable memory with selectable error correction storage

Reconfigurable memory with selectable error correction storage

Reconfigurable memory with selectable error correction storage

Method for initializing and reprogramming a control operation featu...

Method and apparatus for enabling access to computer system resources

Data communication for memory

Method for initializing and reprogramming a control operation featu...

Memory device having circuitry for initializing and reprogramming a...

Initializing and reprogramming circuitry for state independent memo...

Memory device having circuitry for initializing and reprogramming a...

Burst EDO memory address counter

Method for initializing and reprogramming a control operation featu...

Self-enabling pulse-trapping circuit

Method for initializing and reprogramming a control operation featu...

Burst EDO memory device

Method for initializing and reprogramming a control operation featu...

Data communication for memory

Memory device having circuitry for initializing and reprogramming a...

Self-enabling pulse-trapping circuit

DRAM having multiple column address strobe operation

Burst EDO memory device

Burst EDO memory device

Patents Applicationslast 30 patents

MEMORIES AND METHODS TO PROVIDE CONFIGURATION INFORMATION TO CONTRO...

MEMORY SYSTEMS, MEMORY CONTROLLERS, MEMORY MODULES AND METHODS FOR...

Asynchronously-accessible memory devices and access methods

Memory devices and access methods

ASYNCHRONOUSLY-ACCESSIBLE MEMORY DEVICES AND ACCESS METHODS

SYSTEM ADAPTED TO RECEIVE MULTIPLE MEMORY TYPES, AND METHOD FOR DET...

Reconfigurable memory with selectable error correction storage

BURST/PIPELINED EDO MEMORY DEVICE

Reconfigurable memory with selectable error correction storage

Reconfigurable memory with selectable error correction storage

METHOD FOR SWITCHING BETWEEN MODES OF OPERATION

SYSTEM SUPPORTING MULTIPLE MEMORY MODES INCLUDING A BURST EXTENDED...