Chiaming Chai

Person

Durham, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory array circuits including word line circuits for improved wor...
- Patent number 11,527,274
- Issue date Dec 13, 2022
- Microsoft Technology Licensing, LLC
- Shaoping Ge
- G11 - INFORMATION STORAGE
Information Patent Grant
Write bitline driver for a dual voltage domain
- Patent number 9,911,472
- Issue date Mar 6, 2018
- QUALCOMM Incorporated
- Shaoping Ge
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic voltage level shifters employing pulse generation circuits,...
- Patent number 9,608,637
- Issue date Mar 28, 2017
- QUALCOMM Incorporated
- Chiaming Chai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pipelining an asynchronous memory reusing a sense amp and an output...
- Patent number 9,548,089
- Issue date Jan 17, 2017
- QUALCOMM Incorporated
- Stephen Edward Liles
- G11 - INFORMATION STORAGE
Information Patent Grant
Redirecting data from a defective data entry in memory to a redunda...
- Patent number 9,442,675
- Issue date Sep 13, 2016
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Mimicking multi-voltage domain wordline decoding logic for a memory...
- Patent number 9,196,330
- Issue date Nov 24, 2015
- QUALCOMM Incorporated
- Shaoping Ge
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits for voltage or current biasing static random access memory...
- Patent number 9,190,141
- Issue date Nov 17, 2015
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charging bitlines in a static random access memory (SRAM) prior...
- Patent number 9,007,817
- Issue date Apr 14, 2015
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse clock generation logic with built-in level shifter and progra...
- Patent number 8,638,153
- Issue date Jan 28, 2014
- QUALCOMM Incorporated
- Shaoping Ge
- G11 - INFORMATION STORAGE
Information Patent Grant
Low leakage high performance static random access memory cell using...
- Patent number 8,576,612
- Issue date Nov 5, 2013
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuits, systems, and methods for dynamic voltage level shifting
- Patent number 8,456,929
- Issue date Jun 4, 2013
- QUALCOMM Incorporated
- Stephen Edward Liles
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for reducing power consumption in a content ad...
- Patent number 8,154,900
- Issue date Apr 10, 2012
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive clock generators, systems, and methods
- Patent number 8,008,961
- Issue date Aug 30, 2011
- QUALCOMM Incorporated
- Manish Garg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low leakage high performance static random access memory cell using...
- Patent number 7,961,499
- Issue date Jun 14, 2011
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory
- Patent number 7,952,901
- Issue date May 31, 2011
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-tuning of signal path delay in circuit employing multiple volt...
- Patent number 7,876,631
- Issue date Jan 25, 2011
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed CAM lookup using stored encoded key
- Patent number 7,761,774
- Issue date Jul 20, 2010
- QUALCOMM Incorporated
- Jeffrey Herbert Fischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing power consumption in a content ad...
- Patent number 7,616,468
- Issue date Nov 10, 2009
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for aborting content addressable memory search...
- Patent number 7,586,772
- Issue date Sep 8, 2009
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic state catching circuits
- Patent number 7,564,266
- Issue date Jul 21, 2009
- QUALCOMM Incorporated
- Shaoping Ge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and method for subdividing a CAMRAM bank by controlling a v...
- Patent number 7,242,600
- Issue date Jul 10, 2007
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for power savings in high-performance CAM stru...
- Patent number 7,079,409
- Issue date Jul 18, 2006
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Compilable address magnitude comparator for memory array self-testing
- Patent number 7,073,112
- Issue date Jul 4, 2006
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for detecting multiple hits in a CAMRAM memory array
- Patent number 6,816,396
- Issue date Nov 9, 2004
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Compilable address magnitude comparator for memory array self-testing
- Patent number 6,658,610
- Issue date Dec 2, 2003
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and structure for a CAMRAM cache memory
- Patent number 6,556,466
- Issue date Apr 29, 2003
- International Business Machines Corporation
- Chiaming Chai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segmented match line arrangement for content addressable memory
- Patent number 6,452,822
- Issue date Sep 17, 2002
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant scheme for CAMRAM memory array
- Patent number 6,385,071
- Issue date May 7, 2002
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
FLEXIBLE SRAM PRE-CHARGE SYSTEMS AND METHODS
- Publication number 20240242748
- Publication date Jul 18, 2024
- Microsoft Technology Licensing, LLC
- Kevin Neal MAGILL
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY CIRCUITS INCLUDING WORD LINE CIRCUITS FOR IMPROVED WOR...
- Publication number 20220383918
- Publication date Dec 1, 2022
- Microsoft Technology Licensing, LLC
- Shaoping GE
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE AWARE CIRCUIT FOR DUAL VOLTAGE DOMAIN SIGNALS
- Publication number 20180152176
- Publication date May 31, 2018
- QUALCOMM Incorporated
- Shaoping GE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMIC VOLTAGE LEVEL SHIFTERS EMPLOYING PULSE GENERATION CIRCUITS,...
- Publication number 20170047930
- Publication date Feb 16, 2017
- QUALCOMM Incorporated
- Chiaming Chai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PIPELINING AN ASYNCHRONOUS MEMORY REUSING A SENSE AMP AND AN OUTPUT...
- Publication number 20160293234
- Publication date Oct 6, 2016
- QUALCOMM Incorporated
- Stephen Edward LILES
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITS FOR VOLTAGE OR CURRENT BIASING STATIC RANDOM ACCESS MEMORY...
- Publication number 20150036418
- Publication date Feb 5, 2015
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
REDIRECTING DATA FROM A DEFECTIVE DATA ENTRY IN MEMORY TO A REDUNDA...
- Publication number 20140337573
- Publication date Nov 13, 2014
- QUALCOMM Incorporated
- Chiaming Chai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRE-CHARGING BITLINES IN A STATIC RANDOM ACCESS MEMORY (SRAM) PRIOR...
- Publication number 20140328113
- Publication date Nov 6, 2014
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
Pulse Clock Generation Logic with Built-in Level Shifter and Progra...
- Publication number 20130257498
- Publication date Oct 3, 2013
- QUALCOMM Incorporated
- Shaoping Ge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mimicking Multi-Voltage Domain Wordline Decoding Logic for a Memory...
- Publication number 20130182514
- Publication date Jul 18, 2013
- QUALCOMM Incorporated
- Shaoping Ge
- G11 - INFORMATION STORAGE
Information Patent Application
Circuits, Systems, and Methods for Dynamic Voltage Level Shifting
- Publication number 20110249518
- Publication date Oct 13, 2011
- QUALCOMM Incorporated
- Stephen Edward Liles
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Suppressing Bitline Coupling Through Mille...
- Publication number 20110227639
- Publication date Sep 22, 2011
- QUALCOMM Incorporated
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Application
Low Leakage High Performance Static Random Access Memory Cell Using...
- Publication number 20110211386
- Publication date Sep 1, 2011
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive Clock Generators, Systems, and Methods
- Publication number 20110140752
- Publication date Jun 16, 2011
- QUALCOMM Incorporated
- Manish Garg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Leakage High Performance Static Random Access Memory Cell Using...
- Publication number 20100182823
- Publication date Jul 22, 2010
- QUALCOMM Incorporated
- Manish Garg
- G11 - INFORMATION STORAGE
Information Patent Application
Self-Tuning Of Signal Path Delay In Circuit Employing Multiple Volt...
- Publication number 20100148839
- Publication date Jun 17, 2010
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A CONTENT AD...
- Publication number 20100023684
- Publication date Jan 28, 2010
- QUALCOMM Incorporated
- CHIAMING CHAI
- G11 - INFORMATION STORAGE
Information Patent Application
Content Addressable Memory
- Publication number 20090040801
- Publication date Feb 12, 2009
- QUALCOMM Incorporated
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
LOGIC STATE CATCHING CIRCUITS
- Publication number 20080315919
- Publication date Dec 25, 2008
- QUALCOMM Incorporated
- Shaoping Ge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Reducing Power Consumption in a Content Ad...
- Publication number 20080031033
- Publication date Feb 7, 2008
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Aborting Content Addressable Memory Search...
- Publication number 20080031040
- Publication date Feb 7, 2008
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
High speed CAM lookup using stored encoded key
- Publication number 20070113158
- Publication date May 17, 2007
- Jeffrey Herbert Fischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for subdividing a CAMRAM bank by controlling a v...
- Publication number 20070097722
- Publication date May 3, 2007
- Michael ThaiThanh Phan
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for power savings in high-performance CAM stru...
- Publication number 20060018141
- Publication date Jan 26, 2006
- International Business Machines Corporation
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS FOR DETECTING MULTIPLE HITS IN A CAMRAM MEMORY ARRAY
- Publication number 20040196700
- Publication date Oct 7, 2004
- International Business Machines Corp.
- Chiaming Chai
- G11 - INFORMATION STORAGE
Information Patent Application
Compilable address magnitude comparator for memory array self-testing
- Publication number 20040071009
- Publication date Apr 15, 2004
- Chiaming Chai
- G01 - MEASURING TESTING
Information Patent Application
Method and structure for a CAMRAM cache memory
- Publication number 20020159283
- Publication date Oct 31, 2002
- International Business Machines Corporation
- Chiaming Chai
- G06 - COMPUTING CALCULATING COUNTING

Chiaming Chai

Person

Patents Grantslast 30 patents

Memory array circuits including word line circuits for improved wor...

Write bitline driver for a dual voltage domain

Dynamic voltage level shifters employing pulse generation circuits,...

Pipelining an asynchronous memory reusing a sense amp and an output...

Redirecting data from a defective data entry in memory to a redunda...

Mimicking multi-voltage domain wordline decoding logic for a memory...

Circuits for voltage or current biasing static random access memory...

Pre-charging bitlines in a static random access memory (SRAM) prior...

Pulse clock generation logic with built-in level shifter and progra...

Low leakage high performance static random access memory cell using...

Circuits, systems, and methods for dynamic voltage level shifting

Method and apparatus for reducing power consumption in a content ad...

Adaptive clock generators, systems, and methods

Low leakage high performance static random access memory cell using...

Content addressable memory

Self-tuning of signal path delay in circuit employing multiple volt...

High speed CAM lookup using stored encoded key

Method and apparatus for reducing power consumption in a content ad...

Method and apparatus for aborting content addressable memory search...

Logic state catching circuits

Circuit and method for subdividing a CAMRAM bank by controlling a v...

Apparatus and method for power savings in high-performance CAM stru...

Compilable address magnitude comparator for memory array self-testing

Apparatus for detecting multiple hits in a CAMRAM memory array

Compilable address magnitude comparator for memory array self-testing

Method and structure for a CAMRAM cache memory

Segmented match line arrangement for content addressable memory

Redundant scheme for CAMRAM memory array

Patents Applicationslast 30 patents

FLEXIBLE SRAM PRE-CHARGE SYSTEMS AND METHODS

MEMORY ARRAY CIRCUITS INCLUDING WORD LINE CIRCUITS FOR IMPROVED WOR...

VOLTAGE AWARE CIRCUIT FOR DUAL VOLTAGE DOMAIN SIGNALS

DYNAMIC VOLTAGE LEVEL SHIFTERS EMPLOYING PULSE GENERATION CIRCUITS,...

PIPELINING AN ASYNCHRONOUS MEMORY REUSING A SENSE AMP AND AN OUTPUT...

CIRCUITS FOR VOLTAGE OR CURRENT BIASING STATIC RANDOM ACCESS MEMORY...

REDIRECTING DATA FROM A DEFECTIVE DATA ENTRY IN MEMORY TO A REDUNDA...

PRE-CHARGING BITLINES IN A STATIC RANDOM ACCESS MEMORY (SRAM) PRIOR...

Pulse Clock Generation Logic with Built-in Level Shifter and Progra...

Mimicking Multi-Voltage Domain Wordline Decoding Logic for a Memory...

Circuits, Systems, and Methods for Dynamic Voltage Level Shifting

Method and Apparatus for Suppressing Bitline Coupling Through Mille...

Low Leakage High Performance Static Random Access Memory Cell Using...

Adaptive Clock Generators, Systems, and Methods

Low Leakage High Performance Static Random Access Memory Cell Using...

Self-Tuning Of Signal Path Delay In Circuit Employing Multiple Volt...

METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A CONTENT AD...

Content Addressable Memory

LOGIC STATE CATCHING CIRCUITS

Method and Apparatus for Reducing Power Consumption in a Content Ad...

Method and Apparatus for Aborting Content Addressable Memory Search...

High speed CAM lookup using stored encoded key

Circuit and method for subdividing a CAMRAM bank by controlling a v...

Apparatus and method for power savings in high-performance CAM stru...

APPARATUS FOR DETECTING MULTIPLE HITS IN A CAMRAM MEMORY ARRAY

Compilable address magnitude comparator for memory array self-testing

Method and structure for a CAMRAM cache memory