Eric N. Paton

Person

Morgan Hill, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Zero interface polysilicon to polysilicon gate for flash memory
- Patent number 7,863,175
- Issue date Jan 4, 2011
- Spansion LLC
- Robert Bertram Ogle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming isolation regions for integrated circuits
- Patent number 7,713,834
- Issue date May 11, 2010
- GLOBALFOUNDRIES Inc.
- Haihong Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation process
- Patent number 7,648,886
- Issue date Jan 19, 2010
- GLOBALFOUNDRIES Inc.
- Minh-Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device
- Patent number 7,456,062
- Issue date Nov 25, 2008
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming isolation regions for integrated circuits
- Patent number 7,422,961
- Issue date Sep 9, 2008
- Advanced Micro Devices, Inc.
- Haihong Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device
- Patent number 7,402,485
- Issue date Jul 22, 2008
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for controlling the thickness of a selective e...
- Patent number 7,402,207
- Issue date Jul 22, 2008
- Advanced Micro Devices, Inc.
- Paul R. Besser
- G01 - MEASURING TESTING
Information Patent Grant
Scanning laser thermal annealing
- Patent number 7,351,638
- Issue date Apr 1, 2008
- Advanced Micro Devices, Inc.
- Cyrus E. Tabery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully depleted strained semiconductor on insulator transistor and m...
- Patent number 7,312,125
- Issue date Dec 25, 2007
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow junction semiconductor
- Patent number 7,298,012
- Issue date Nov 20, 2007
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interface layer between dual polycrystalline silicon layers
- Patent number 7,256,141
- Issue date Aug 14, 2007
- Advanced Micro Devices, Inc.
- Mark T. Ramsbey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for post offset spacer clean for improved selective epitaxy...
- Patent number 7,241,700
- Issue date Jul 10, 2007
- Advanced Micro Devices, Inc.
- William George En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized halo implant region formed using tilt pre-amorphization i...
- Patent number 7,211,489
- Issue date May 1, 2007
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
End-of-range defect minimization in semiconductor device
- Patent number 7,091,097
- Issue date Aug 15, 2006
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained silicon PMOS having silicon germanium source/drain extensi...
- Patent number 7,071,065
- Issue date Jul 4, 2006
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow junction semiconductor and method for the fabrication thereof
- Patent number 7,033,916
- Issue date Apr 25, 2006
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Remote monitoring of critical parameters for calibration of manufac...
- Patent number 6,966,235
- Issue date Nov 22, 2005
- Eric N. Paton
- G01 - MEASURING TESTING
Information Patent Grant
Method of manufacturing semiconductor device having nickel silicide...
- Patent number 6,967,160
- Issue date Nov 22, 2005
- Advanced Micro Devices, Inc.
- Eric Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation process using oxide deposition and anneal
- Patent number 6,962,857
- Issue date Nov 8, 2005
- Advanced Micro Devices, Inc.
- Minh-Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained silicon MOSFET having reduced leakage and method of its fo...
- Patent number 6,924,182
- Issue date Aug 2, 2005
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Front side seal to prevent germanium outgassing
- Patent number 6,921,709
- Issue date Jul 26, 2005
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Offset spacer process for forming N-type transistors
- Patent number 6,905,923
- Issue date Jun 14, 2005
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-temperature post-dopant activation process
- Patent number 6,902,966
- Issue date Jun 7, 2005
- Advanced Micro Devices, Inc.
- Bin Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Measurement of lateral diffusion of diffused layers
- Patent number 6,878,559
- Issue date Apr 12, 2005
- Applied Materials, Inc.
- Peter G. Borden
- G01 - MEASURING TESTING
Information Patent Grant
Selective epitaxy to improve silicidation
- Patent number 6,878,592
- Issue date Apr 12, 2005
- Advanced Micro Devices, Inc.
- Paul R. Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nickel silicide with reduced interface roughness
- Patent number 6,873,051
- Issue date Mar 29, 2005
- Advanced Micro Devices, Inc.
- Eric Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained silicon NMOS having silicon source/drain extensions and me...
- Patent number 6,867,428
- Issue date Mar 15, 2005
- Advanced Micro Devices, Inc.
- Paul R. Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polysilicon tilting to prevent geometry effects during laser therma...
- Patent number 6,867,080
- Issue date Mar 15, 2005
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Depletion to avoid cross contamination
- Patent number 6,858,503
- Issue date Feb 22, 2005
- Advanced Micro Devices, Inc.
- Minh V. Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Post silicide laser thermal annealing to avoid dopant deactivation
- Patent number 6,825,115
- Issue date Nov 30, 2004
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING ISOLATION REGIONS FOR INTEGRATED CIRCUITS
- Publication number 20090047770
- Publication date Feb 19, 2009
- Advanced Micro Devices, Inc.
- Haihong Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20090032888
- Publication date Feb 5, 2009
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY
- Publication number 20080149986
- Publication date Jun 26, 2008
- SPANSION LLC
- Robert Bertram Ogle, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHALLOW JUNCTION SEMICONDUCTOR
- Publication number 20060180873
- Publication date Aug 17, 2006
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation for strained silicon processes
- Publication number 20040180509
- Publication date Sep 16, 2004
- Advanced Micro Devices, Inc.
- Haihong Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation for strained silicon processes
- Publication number 20040137742
- Publication date Jul 15, 2004
- Advanced Micro Devices, Inc.
- Minh-Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEASUREMENT OF LATERAL DIFFUSION OF DIFFUSED LAYERS
- Publication number 20040063225
- Publication date Apr 1, 2004
- Peter G. Borden
- G01 - MEASURING TESTING
Information Patent Application
Mosfets incorporating nickel germanosilicided gate and methods for...
- Publication number 20040061191
- Publication date Apr 1, 2004
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and device using silicide contacts for semiconductor processing
- Publication number 20030235984
- Publication date Dec 25, 2003
- Paul Raymond Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and device using silicide contacts for semiconductor processing
- Publication number 20030235981
- Publication date Dec 25, 2003
- Eric Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming reliable Cu interconnects
- Publication number 20030087522
- Publication date May 8, 2003
- Advanced Micro Devices, Inc.
- Minh Van Ngo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low-temperature post-dopant activation process
- Publication number 20030082880
- Publication date May 1, 2003
- Advanced Micro Devices, Inc.
- Bin Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPROVED SILICIDE PROCESS USING HIGH K-DIELECTRICS
- Publication number 20030042515
- Publication date Mar 6, 2003
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Floating bookstand
- Publication number 20030042390
- Publication date Mar 6, 2003
- Eric Ramsay Paton
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Application
Silicide stop layer in a damascene semiconductor structure
- Publication number 20030034533
- Publication date Feb 20, 2003
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Ozone oxide as a mediating layer in nickel silicide formation
- Publication number 20020111021
- Publication date Aug 15, 2002
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Damascene nisi metal gate high-k transistor
- Publication number 20020102848
- Publication date Aug 1, 2002
- Advanced Micro Devices, Inc.
- Qi Xiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING NICKEL SILICIDE USING A ONE-STEP RAPID THERMAL AN...
- Publication number 20020068408
- Publication date Jun 6, 2002
- Advanced Micro Devices, Inc.
- Eric N. Paton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELAPSED TIME INDICATOR FOR CONTROLLED ENVIRONMENTS AND METHOD OF USE
- Publication number 20020000184
- Publication date Jan 3, 2002
- ERIC PATON
- G01 - MEASURING TESTING

Eric N. Paton

Person

Patents Grantslast 30 patents

Zero interface polysilicon to polysilicon gate for flash memory

Method of forming isolation regions for integrated circuits

Shallow trench isolation process

Method of forming a semiconductor device

Method of forming isolation regions for integrated circuits

Method of forming a semiconductor device

Method and apparatus for controlling the thickness of a selective e...

Scanning laser thermal annealing

Fully depleted strained semiconductor on insulator transistor and m...

Shallow junction semiconductor

Interface layer between dual polycrystalline silicon layers

Methods for post offset spacer clean for improved selective epitaxy...

Localized halo implant region formed using tilt pre-amorphization i...

End-of-range defect minimization in semiconductor device

Strained silicon PMOS having silicon germanium source/drain extensi...

Shallow junction semiconductor and method for the fabrication thereof

Remote monitoring of critical parameters for calibration of manufac...

Method of manufacturing semiconductor device having nickel silicide...

Shallow trench isolation process using oxide deposition and anneal

Strained silicon MOSFET having reduced leakage and method of its fo...

Front side seal to prevent germanium outgassing

Offset spacer process for forming N-type transistors

Low-temperature post-dopant activation process

Measurement of lateral diffusion of diffused layers

Selective epitaxy to improve silicidation

Nickel silicide with reduced interface roughness

Strained silicon NMOS having silicon source/drain extensions and me...

Polysilicon tilting to prevent geometry effects during laser therma...

Depletion to avoid cross contamination

Post silicide laser thermal annealing to avoid dopant deactivation

Patents Applicationslast 30 patents

METHOD OF FORMING ISOLATION REGIONS FOR INTEGRATED CIRCUITS

SEMICONDUCTOR DEVICE

ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY

SHALLOW JUNCTION SEMICONDUCTOR

Shallow trench isolation for strained silicon processes

Shallow trench isolation for strained silicon processes

MEASUREMENT OF LATERAL DIFFUSION OF DIFFUSED LAYERS

Mosfets incorporating nickel germanosilicided gate and methods for...

Method and device using silicide contacts for semiconductor processing

Method and device using silicide contacts for semiconductor processing

Method of forming reliable Cu interconnects

Low-temperature post-dopant activation process

IMPROVED SILICIDE PROCESS USING HIGH K-DIELECTRICS

Floating bookstand

Silicide stop layer in a damascene semiconductor structure

Ozone oxide as a mediating layer in nickel silicide formation

Damascene nisi metal gate high-k transistor

METHOD OF FORMING NICKEL SILICIDE USING A ONE-STEP RAPID THERMAL AN...

ELAPSED TIME INDICATOR FOR CONTROLLED ENVIRONMENTS AND METHOD OF USE