Fariborz Assaderaghi

Person

Mahopac, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
SOI MOSFETS exhibiting reduced floating-body effects
- Patent number 7,163,866
- Issue date Jan 16, 2007
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grounded body SOI SRAM cell
- Patent number 7,075,153
- Issue date Jul 11, 2006
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of building a CMOS structure on thin SOI with source/drain e...
- Patent number 7,009,258
- Issue date Mar 7, 2006
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Body contact MOSFET
- Patent number 6,940,130
- Issue date Sep 6, 2005
- International Business Machines Corporation
- Andres Bryant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
T-RAM cell having a buried vertical thyristor and a pseudo-TFT tran...
- Patent number 6,906,354
- Issue date Jun 14, 2005
- International Business Machines Corporation
- Louis L. Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS structure with maximized polysilicon gate activation and a met...
- Patent number 6,808,974
- Issue date Oct 26, 2004
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing an integrated circuit capacitor
- Patent number 6,777,304
- Issue date Aug 17, 2004
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of building a CMOS structure on thin SOI with source/drain e...
- Patent number 6,734,109
- Issue date May 11, 2004
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
T-RAM array having a planar cell structure and method for fabricati...
- Patent number 6,713,791
- Issue date Mar 30, 2004
- IBM Corporation
- Louis L. Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with dual wordline operation
- Patent number 6,714,476
- Issue date Mar 30, 2004
- IBM Corporation
- Louis L. Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI MOSFETS exhibiting reduced floating-body effects
- Patent number 6,686,629
- Issue date Feb 3, 2004
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Body contact MOSFET
- Patent number 6,677,645
- Issue date Jan 13, 2004
- International Business Machines Corporation
- Andres Bryant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ground-plane device with back oxide topography
- Patent number 6,657,261
- Issue date Dec 2, 2003
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grounded body SOI SRAM cell
- Patent number 6,646,305
- Issue date Nov 11, 2003
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pair of FETs including a shared SOI body contact and the method of...
- Patent number 6,613,615
- Issue date Sep 2, 2003
- International Business Machines Corporation
- Jack A. Mandelman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS structure with non-epitaxial raised source/drain and self-alig...
- Patent number 6,566,198
- Issue date May 20, 2003
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with reduced substrate capacitance
- Patent number 6,562,666
- Issue date May 13, 2003
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
T-Ram array having a planar cell structure and method for fabricati...
- Patent number 6,552,398
- Issue date Apr 22, 2003
- IBM Corporation
- Louis L. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for improving the performance on SOI memory array...
- Patent number 6,549,450
- Issue date Apr 15, 2003
- IBM Corporation
- Louis L. Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI transistor with polysilicon seed
- Patent number 6,521,949
- Issue date Feb 18, 2003
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI CMOS dynamic circuits having threshold voltage control
- Patent number 6,433,587
- Issue date Aug 13, 2002
- International Business Machines Corporation
- Fariborz Assaderaghi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Double SOI device with recess etch and epitaxy
- Patent number 6,432,754
- Issue date Aug 13, 2002
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistors with raised sources and drains
- Patent number 6,429,084
- Issue date Aug 6, 2002
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mixed memory integration with NVRAM, dram and sram cell structures...
- Patent number 6,424,011
- Issue date Jul 23, 2002
- International Business Machines Corporation
- Fariborz Assaderaghi
- G11 - INFORMATION STORAGE
Information Patent Grant
Soi-body selective link method and apparatus
- Patent number 6,410,369
- Issue date Jun 25, 2002
- International Business Machines Corporation
- Roy Childs Flaker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance, low cell stress, low power, SOI CMOS latch-type s...
- Patent number 6,404,686
- Issue date Jun 11, 2002
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G11 - INFORMATION STORAGE
Information Patent Grant
Silicon-on-insulator structure for electrostatic discharge protecti...
- Patent number 6,352,882
- Issue date Mar 5, 2002
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pair of FETs including a shared SOI body contact and the method of...
- Patent number 6,344,671
- Issue date Feb 5, 2002
- International Business Machines Corporation
- Jack A. Mandelman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoupling capacitor structure
- Patent number 6,320,237
- Issue date Nov 20, 2001
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low cost mixed memory integration with FERAM
- Patent number 6,259,126
- Issue date Jul 10, 2001
- International Business Machines Corporation
- Louis Lu-Chen Hsu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Method of building a CMOS structure on thin SOI with source/drain e...
- Publication number 20040140507
- Publication date Jul 22, 2004
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI MOSFETS exhibiting reduced floating-body effects
- Publication number 20040142515
- Publication date Jul 22, 2004
- IBM Corporation (Fishkill)
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Body contact mosfet
- Publication number 20040079995
- Publication date Apr 29, 2004
- Andres Bryant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Grounded body SOI SRAM cell
- Publication number 20040048425
- Publication date Mar 11, 2004
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Body contact mosfet
- Publication number 20030141543
- Publication date Jul 31, 2003
- International Business Machines Corporation
- Andres Bryant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of building a CMOS structure on thin SOI with source/drain e...
- Publication number 20030032295
- Publication date Feb 13, 2003
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Activating in-situ doped gate on high dielectric constant materials
- Publication number 20030025167
- Publication date Feb 6, 2003
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Grounded body SOI SRAM cell
- Publication number 20030020116
- Publication date Jan 30, 2003
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
T-Ram cell having a buried vertical thyristor and a pseudo-TFT tran...
- Publication number 20020190265
- Publication date Dec 19, 2002
- International Business Machines Corporation
- Louis L. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS structure with maximized polysilicon gate activation and a met...
- Publication number 20020173105
- Publication date Nov 21, 2002
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI TRANSISTOR WITH POLYSILICON SEED
- Publication number 20020164841
- Publication date Nov 7, 2002
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS structure with non-epitaxial raised source/drain and self-alig...
- Publication number 20020142551
- Publication date Oct 3, 2002
- International Business Machines Corporation
- Heemyong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory array with dual wordline operation
- Publication number 20020138688
- Publication date Sep 26, 2002
- International Business Machines Corporation
- Louis L. Hsu
- G11 - INFORMATION STORAGE
Information Patent Application
DOUBLE SOI DEVICE WITH RECESS ETCH AND EPITAXY
- Publication number 20020115240
- Publication date Aug 22, 2002
- International Business Machines Corporation
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
T-RAM array having a planar cell structure and method for fabricati...
- Publication number 20020100918
- Publication date Aug 1, 2002
- Louis L. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
T-RAM array having a planar cell structure and method for fabricati...
- Publication number 20020093030
- Publication date Jul 18, 2002
- International Business Machines Corporation
- Louis L. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Ground-plane device with back oxide topography
- Publication number 20020090768
- Publication date Jul 11, 2002
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pair of FETs including a shared SOI body contact and the method of...
- Publication number 20020020877
- Publication date Feb 21, 2002
- Jack A. Mandelman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing an integrated circuit capacitor
- Publication number 20020008290
- Publication date Jan 24, 2002
- Fariborz Assaderaghi
- H01 - BASIC ELECTRIC ELEMENTS

Fariborz Assaderaghi

Person

Patents Grantslast 30 patents

SOI MOSFETS exhibiting reduced floating-body effects

Grounded body SOI SRAM cell

Method of building a CMOS structure on thin SOI with source/drain e...

Body contact MOSFET

T-RAM cell having a buried vertical thyristor and a pseudo-TFT tran...

CMOS structure with maximized polysilicon gate activation and a met...

Method for producing an integrated circuit capacitor

Method of building a CMOS structure on thin SOI with source/drain e...

T-RAM array having a planar cell structure and method for fabricati...

Memory array with dual wordline operation

SOI MOSFETS exhibiting reduced floating-body effects

Body contact MOSFET

Ground-plane device with back oxide topography

Grounded body SOI SRAM cell

Pair of FETs including a shared SOI body contact and the method of...

CMOS structure with non-epitaxial raised source/drain and self-alig...

Integrated circuits with reduced substrate capacitance

T-Ram array having a planar cell structure and method for fabricati...

Method and system for improving the performance on SOI memory array...

SOI transistor with polysilicon seed

SOI CMOS dynamic circuits having threshold voltage control

Double SOI device with recess etch and epitaxy

MOS transistors with raised sources and drains

Mixed memory integration with NVRAM, dram and sram cell structures...

Soi-body selective link method and apparatus

High performance, low cell stress, low power, SOI CMOS latch-type s...

Silicon-on-insulator structure for electrostatic discharge protecti...

Pair of FETs including a shared SOI body contact and the method of...

Decoupling capacitor structure

Low cost mixed memory integration with FERAM

Patents Applicationslast 30 patents

Method of building a CMOS structure on thin SOI with source/drain e...

SOI MOSFETS exhibiting reduced floating-body effects

Body contact mosfet

Grounded body SOI SRAM cell

Body contact mosfet

Method of building a CMOS structure on thin SOI with source/drain e...

Activating in-situ doped gate on high dielectric constant materials

Grounded body SOI SRAM cell

T-Ram cell having a buried vertical thyristor and a pseudo-TFT tran...

CMOS structure with maximized polysilicon gate activation and a met...

SOI TRANSISTOR WITH POLYSILICON SEED

CMOS structure with non-epitaxial raised source/drain and self-alig...

Memory array with dual wordline operation

DOUBLE SOI DEVICE WITH RECESS ETCH AND EPITAXY

T-RAM array having a planar cell structure and method for fabricati...

T-RAM array having a planar cell structure and method for fabricati...

Ground-plane device with back oxide topography

Pair of FETs including a shared SOI body contact and the method of...

Method for producing an integrated circuit capacitor