John Turner

Person

Santa Cruz, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Passgate structures for use in low-voltage applications
- Patent number 7,800,405
- Issue date Sep 21, 2010
- Altera Corporation
- Andy L Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock data recovery circuitry associated with programmable logic de...
- Patent number 7,684,532
- Issue date Mar 23, 2010
- Altera Corporation
- Edward Aung
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic RAM storage techniques
- Patent number 7,602,634
- Issue date Oct 13, 2009
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Grant
Passgate structures for use in low-voltage applications
- Patent number 7,557,608
- Issue date Jul 7, 2009
- Altera Corporation
- Andy L Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit structures for increasing resistance to single e...
- Patent number 7,465,971
- Issue date Dec 16, 2008
- Altera Corporation
- Lakhbeer S. Sidhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock data recovery circuitry associated with programmable logic de...
- Patent number 7,333,570
- Issue date Feb 19, 2008
- Altera Corporation
- Edward Aung
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit structures for increasing resistance to single e...
- Patent number 7,319,253
- Issue date Jan 15, 2008
- Altera Corporation
- Lakhbeer S Sidhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for configuring programmable logic devices and associated...
- Patent number 7,298,646
- Issue date Nov 20, 2007
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic RAM storage techniques
- Patent number 7,277,316
- Issue date Oct 2, 2007
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock data recovery circuitry associated with programmable logic de...
- Patent number 7,227,918
- Issue date Jun 5, 2007
- Altera Corporation
- Edward Aung
- G11 - INFORMATION STORAGE
Information Patent Grant
Passage structures for use in low-voltage applications
- Patent number 7,119,574
- Issue date Oct 10, 2006
- Altera Corporation
- Andy L Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic RAM storage techniques
- Patent number 7,088,606
- Issue date Aug 8, 2006
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for silicon-on-insulator transistors in progr...
- Patent number 6,952,114
- Issue date Oct 4, 2005
- Altera Corporation
- John Turner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable logic devices with stabilized configuration cells for...
- Patent number 6,876,572
- Issue date Apr 5, 2005
- Altera Corporation
- John E. Turner
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory cell with low doping region
- Patent number 6,828,620
- Issue date Dec 7, 2004
- Altera Corporation
- Christopher J. Pass
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for silicon-on-insulator transistors in progr...
- Patent number 6,781,409
- Issue date Aug 24, 2004
- Altera Corporation
- John Turner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable logic with lower internal voltage circuitry
- Patent number 6,724,222
- Issue date Apr 20, 2004
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Passgate structures for use in low-voltage applications
- Patent number 6,661,253
- Issue date Dec 9, 2003
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for configuring a programmable logic device wi...
- Patent number 6,629,311
- Issue date Sep 30, 2003
- Altera Corporation
- John Turner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique of fabricating integrated circuits having interfaces comp...
- Patent number 6,604,228
- Issue date Aug 5, 2003
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Overvoltage-tolerant interface for integrated circuits
- Patent number 6,583,646
- Issue date Jun 24, 2003
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Nonvolatile memory cell with low doping region
- Patent number 6,573,138
- Issue date Jun 3, 2003
- Altera Corporation
- Christopher J. Pass
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuitry for a low internal voltage
- Patent number 6,563,343
- Issue date May 13, 2003
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device input/output architecture with power bus...
- Patent number 6,472,903
- Issue date Oct 29, 2002
- Altera Corporation
- Kerry Veenstra
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Overvoltage-tolerant interface for integrated circuits
- Patent number 6,433,585
- Issue date Aug 13, 2002
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuitry for a low internal voltage integrated circuit
- Patent number 6,414,518
- Issue date Jul 2, 2002
- Altera Corporation
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device input/output architecture with power bus...
- Patent number 6,377,069
- Issue date Apr 23, 2002
- Altera Corporation
- Kerry Veenstra
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interface for low-voltage semiconductor devices
- Patent number 6,344,758
- Issue date Feb 5, 2002
- Altera Corporation
- John E. Turner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interface for low-voltage semiconductor devices
- Patent number 6,342,794
- Issue date Jan 29, 2002
- Altera Corporation
- John E. Turner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable reticle stitching
- Patent number 6,335,635
- Issue date Jan 1, 2002
- Altera Corporation
- Rakesh Patel
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
Clock Data Recovery Circuitry Associated With Programmable Logic De...
- Publication number 20170155529
- Publication date Jun 1, 2017
- Altera Corporation
- Edward Aung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PASSGATE STRUCTURES FOR USE IN LOW-VOLTAGE APPLICATIONS
- Publication number 20090267645
- Publication date Oct 29, 2009
- Altera Corporation
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES FOR INCREASING RESISTANCE TO SINGLE E...
- Publication number 20080074145
- Publication date Mar 27, 2008
- Lakhbeer S. Sidhu
- G11 - INFORMATION STORAGE
Information Patent Application
Clock data recovery circuitry associated with programmable logic de...
- Publication number 20080031385
- Publication date Feb 7, 2008
- Altera Corporation
- Edward Aung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DYNAMIC RAM STORAGE TECHNIQUES
- Publication number 20070285979
- Publication date Dec 13, 2007
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Application
Passgate structures for use in low-voltage applications
- Publication number 20070008000
- Publication date Jan 11, 2007
- Andy L. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamic RAM storage techniques
- Publication number 20060245238
- Publication date Nov 2, 2006
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit structures for increasing resistance to single e...
- Publication number 20060001045
- Publication date Jan 5, 2006
- Lakhbeer S. Sidhu
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic RAM storage techniques
- Publication number 20050201141
- Publication date Sep 15, 2005
- Altera Corporation
- John Turner
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable logic devices with stabilized configuration cells for...
- Publication number 20040233701
- Publication date Nov 25, 2004
- Altera Corporation
- John E. Turner
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and methods for silicon-on-insulator transistors in progr...
- Publication number 20040217775
- Publication date Nov 4, 2004
- Altera Corporation
- John Turner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock data recovery circuitry associated with programmable logic de...
- Publication number 20030212930
- Publication date Nov 13, 2003
- Altera Corporation
- Edward Aung
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Nonvolatile memory cell with low doping region
- Publication number 20030197218
- Publication date Oct 23, 2003
- Altera Corporation
- Christopher J. Pass
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic with lower internal voltage circuitry
- Publication number 20030117174
- Publication date Jun 26, 2003
- Altera Corporation, a corporation of Delaware
- Rakesh H. Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and methods for silicon-on-insulator transistors in progr...
- Publication number 20030067321
- Publication date Apr 10, 2003
- John Turner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Clock data recovery circuitry associated with programmable logic de...
- Publication number 20010033188
- Publication date Oct 25, 2001
- Edward Aung
- G11 - INFORMATION STORAGE

John Turner

Person

Patents Grantslast 30 patents

Passgate structures for use in low-voltage applications

Clock data recovery circuitry associated with programmable logic de...

Dynamic RAM storage techniques

Passgate structures for use in low-voltage applications

Integrated circuit structures for increasing resistance to single e...

Clock data recovery circuitry associated with programmable logic de...

Integrated circuit structures for increasing resistance to single e...

Apparatus for configuring programmable logic devices and associated...

Dynamic RAM storage techniques

Clock data recovery circuitry associated with programmable logic de...

Passage structures for use in low-voltage applications

Dynamic RAM storage techniques

Apparatus and methods for silicon-on-insulator transistors in progr...

Programmable logic devices with stabilized configuration cells for...

Nonvolatile memory cell with low doping region

Apparatus and methods for silicon-on-insulator transistors in progr...

Programmable logic with lower internal voltage circuitry

Passgate structures for use in low-voltage applications

Apparatus and method for configuring a programmable logic device wi...

Technique of fabricating integrated circuits having interfaces comp...

Overvoltage-tolerant interface for integrated circuits

Nonvolatile memory cell with low doping region

Circuitry for a low internal voltage

Programmable logic device input/output architecture with power bus...

Overvoltage-tolerant interface for integrated circuits

Circuitry for a low internal voltage integrated circuit

Programmable logic device input/output architecture with power bus...

Interface for low-voltage semiconductor devices

Interface for low-voltage semiconductor devices

Programmable reticle stitching

Patents Applicationslast 30 patents

Clock Data Recovery Circuitry Associated With Programmable Logic De...

PASSGATE STRUCTURES FOR USE IN LOW-VOLTAGE APPLICATIONS

INTEGRATED CIRCUIT STRUCTURES FOR INCREASING RESISTANCE TO SINGLE E...

Clock data recovery circuitry associated with programmable logic de...

DYNAMIC RAM STORAGE TECHNIQUES

Passgate structures for use in low-voltage applications

Dynamic RAM storage techniques

Integrated circuit structures for increasing resistance to single e...

Dynamic RAM storage techniques

Programmable logic devices with stabilized configuration cells for...

Apparatus and methods for silicon-on-insulator transistors in progr...

Clock data recovery circuitry associated with programmable logic de...

Nonvolatile memory cell with low doping region

Programmable logic with lower internal voltage circuitry

Apparatus and methods for silicon-on-insulator transistors in progr...

Clock data recovery circuitry associated with programmable logic de...