Joseph E. Geusic

Person

Berkeley Heights, NJ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Strained semiconductor by full wafer bonding
- Patent number 8,470,687
- Issue date Jun 25, 2013
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained semiconductor by full wafer bonding
- Patent number 7,994,595
- Issue date Aug 9, 2011
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained semiconductor by full wafer bonding
- Patent number 7,989,311
- Issue date Aug 2, 2011
- Micron Technlogy, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming cellular material
- Patent number 7,964,124
- Issue date Jun 21, 2011
- Micron Technology, Inc.
- Joseph E. Geusic
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Gettering using voids formed by surface transformation
- Patent number 7,564,082
- Issue date Jul 21, 2009
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low k interconnect dielectric using surface transformation
- Patent number 7,550,824
- Issue date Jun 23, 2009
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic systems using optical waveguide interconnects formed thr...
- Patent number 7,547,954
- Issue date Jun 16, 2009
- Micron Technology, Inc.
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Grant
Gettering using voids formed by surface transformation
- Patent number 7,544,984
- Issue date Jun 9, 2009
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming mirrors by surface transformation of empty spaces...
- Patent number 7,512,170
- Issue date Mar 31, 2009
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit cooling and insulating device and method
- Patent number 7,492,042
- Issue date Feb 17, 2009
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit cooling and insulating device and method
- Patent number 7,485,497
- Issue date Feb 3, 2009
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Grant
Strained semiconductor by full wafer bonding
- Patent number 7,439,158
- Issue date Oct 21, 2008
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device, system, and method for a trench capacitor having micro-roug...
- Patent number 7,408,216
- Issue date Aug 5, 2008
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gettering using voids formed by surface transformation
- Patent number 7,326,597
- Issue date Feb 5, 2008
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit cooling and insulating device and method
- Patent number 7,304,380
- Issue date Dec 4, 2007
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit cooling and insulating device and method
- Patent number 7,300,821
- Issue date Nov 27, 2007
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Grant
Method of forming mirrors by surface transformation of empty spaces...
- Patent number 7,260,125
- Issue date Aug 21, 2007
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device
- Patent number 7,242,049
- Issue date Jul 10, 2007
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for operating a memory device having an amorphous silicon ca...
- Patent number 7,196,929
- Issue date Mar 27, 2007
- Micron Technology Inc.
- Leonard Forbes
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming a device having a gate with a selected electron a...
- Patent number 7,169,666
- Issue date Jan 30, 2007
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic systems using optical waveguide interconnects formed thr...
- Patent number 7,164,156
- Issue date Jan 16, 2007
- Micron Technology, Inc.
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Grant
Buried conductor patterns formed by surface transformation of empty...
- Patent number 7,164,188
- Issue date Jan 16, 2007
- Micron Technology, Inc.
- Paul A. Farrar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive material patterning methods
- Patent number 7,153,775
- Issue date Dec 26, 2006
- Micron Technology, Inc,
- Joseph E. Geusic
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Memory device
- Patent number 7,154,153
- Issue date Dec 26, 2006
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming mirrors by surface transformation of empty spaces...
- Patent number 7,142,577
- Issue date Nov 28, 2006
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low k interconnect dielectric using surface transformation
- Patent number 7,132,348
- Issue date Nov 7, 2006
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Operating a memory device
- Patent number 7,109,548
- Issue date Sep 19, 2006
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuits with a trench capacitor having micro-roughened semiconduct...
- Patent number 7,084,451
- Issue date Aug 1, 2006
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removal of copper oxides from integrated interconnects
- Patent number 7,084,067
- Issue date Aug 1, 2006
- Micron Technology, Inc.
- Joseph E. Geusic
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Three-dimensional photonic crystal waveguide structure and method
- Patent number 7,054,532
- Issue date May 30, 2006
- Micron Technoloy. Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STRAINED SEMICONDUCTOR BY FULL WAFER BONDING
- Publication number 20110281407
- Publication date Nov 17, 2011
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING CELLULAR MATERIAL
- Publication number 20110250430
- Publication date Oct 13, 2011
- Joseph E. Geusic
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
LOW K INTERCONNECT DIELECTRIC USING SURFACE TRANSFORMATION
- Publication number 20090256243
- Publication date Oct 15, 2009
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED SEMICONDUCTOR BY FULL WAFER BONDING
- Publication number 20090042360
- Publication date Feb 12, 2009
- Micron Technology Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit cooling and insulating device and method
- Publication number 20080057629
- Publication date Mar 6, 2008
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit cooling and insulating device and method
- Publication number 20080048314
- Publication date Feb 28, 2008
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Application
Electronic systems using optical waveguide interconnects formed thr...
- Publication number 20070114543
- Publication date May 24, 2007
- Micron Technology, Inc.
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Application
Conductive material patterning methods
- Publication number 20070105372
- Publication date May 10, 2007
- Micron Technology, Inc.
- Joseph E. Geusic
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Gettering using voids formed by surface transformation
- Publication number 20070080335
- Publication date Apr 12, 2007
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Gettering using voids formed by surface transformation
- Publication number 20070075401
- Publication date Apr 5, 2007
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming mirrors by surface transformation of empty spaces...
- Publication number 20070036196
- Publication date Feb 15, 2007
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Application
Integrated circuit cooling and insulating device and method
- Publication number 20060249837
- Publication date Nov 9, 2006
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Application
Device, system, and method for a trench capacitor having micro-roug...
- Publication number 20060249777
- Publication date Nov 9, 2006
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Strained semiconductor by full wafer bonding
- Publication number 20060244105
- Publication date Nov 2, 2006
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Removal of copper oxides from integrated interconnects
- Publication number 20060211251
- Publication date Sep 21, 2006
- Joseph E. Geusic
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Cellular materials formed using surface transformation
- Publication number 20060138708
- Publication date Jun 29, 2006
- Micron Technology, Inc.
- Joseph E. Geusic
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
Integrated circuits using optical waveguide interconnects formed th...
- Publication number 20060131684
- Publication date Jun 22, 2006
- Micron Technology, Inc.
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Application
Integrated circuit cooling and insulating device and method
- Publication number 20060046322
- Publication date Mar 2, 2006
- Micron Technology, Inc.
- Paul A. Farrar
- G01 - MEASURING TESTING
Information Patent Application
Deaprom having amorphous silicon carbide gate insulator
- Publication number 20060024878
- Publication date Feb 2, 2006
- Micron Technology, Inc.
- Leonard Forbes
- G11 - INFORMATION STORAGE
Information Patent Application
Conductive material patterning methods
- Publication number 20050282385
- Publication date Dec 22, 2005
- Micron Technology, Inc.
- Joseph E. Geusic
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Gettering using voids formed by surface transformation
- Publication number 20050250274
- Publication date Nov 10, 2005
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Microcavity discharge device
- Publication number 20050236954
- Publication date Oct 27, 2005
- Joseph E. Geusic
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of forming mirrors by surface transformation of empty spaces...
- Publication number 20050175058
- Publication date Aug 11, 2005
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Application
Three-dimensional photonic crystal waveguide structure and method
- Publication number 20050105869
- Publication date May 19, 2005
- Micron Technology, Inc.
- Leonard Forbes
- C30 - CRYSTAL GROWTH
Information Patent Application
Method of forming mirrors by surface transformation of empty spaces...
- Publication number 20050070036
- Publication date Mar 31, 2005
- Joseph E. Geusic
- G02 - OPTICS
Information Patent Application
Gettering using voids formed by surface transformation
- Publication number 20050029683
- Publication date Feb 10, 2005
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low k interconnect dielectric using surface transformation
- Publication number 20050029501
- Publication date Feb 10, 2005
- Micron Technology, Inc.
- Joseph E. Geusic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Scalable high performance antifuse structure and process
- Publication number 20050023638
- Publication date Feb 3, 2005
- Micron Technology, Inc.
- Arup Bhattacharyya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and structure for high capacitance memory cells
- Publication number 20050026360
- Publication date Feb 3, 2005
- Micron Technology, Inc.
- Joseph E. Geusic
- B82 - NANO-TECHNOLOGY
Information Patent Application
Strained semiconductor by full wafer bonding
- Publication number 20050020094
- Publication date Jan 27, 2005
- Micron Technology, Inc.
- Leonard Forbes
- H01 - BASIC ELECTRIC ELEMENTS

Joseph E. Geusic

Person

Patents Grantslast 30 patents

Strained semiconductor by full wafer bonding

Strained semiconductor by full wafer bonding

Strained semiconductor by full wafer bonding

Method of forming cellular material

Gettering using voids formed by surface transformation

Low k interconnect dielectric using surface transformation

Electronic systems using optical waveguide interconnects formed thr...

Gettering using voids formed by surface transformation

Method of forming mirrors by surface transformation of empty spaces...

Integrated circuit cooling and insulating device and method

Integrated circuit cooling and insulating device and method

Strained semiconductor by full wafer bonding

Device, system, and method for a trench capacitor having micro-roug...

Gettering using voids formed by surface transformation

Integrated circuit cooling and insulating device and method

Integrated circuit cooling and insulating device and method

Method of forming mirrors by surface transformation of empty spaces...

Memory device

Method for operating a memory device having an amorphous silicon ca...

Method of forming a device having a gate with a selected electron a...

Electronic systems using optical waveguide interconnects formed thr...

Buried conductor patterns formed by surface transformation of empty...

Conductive material patterning methods

Memory device

Method of forming mirrors by surface transformation of empty spaces...

Low k interconnect dielectric using surface transformation

Operating a memory device

Circuits with a trench capacitor having micro-roughened semiconduct...

Removal of copper oxides from integrated interconnects

Three-dimensional photonic crystal waveguide structure and method

Patents Applicationslast 30 patents

STRAINED SEMICONDUCTOR BY FULL WAFER BONDING

METHOD OF FORMING CELLULAR MATERIAL

LOW K INTERCONNECT DIELECTRIC USING SURFACE TRANSFORMATION

STRAINED SEMICONDUCTOR BY FULL WAFER BONDING

Integrated circuit cooling and insulating device and method

Integrated circuit cooling and insulating device and method

Electronic systems using optical waveguide interconnects formed thr...

Conductive material patterning methods

Gettering using voids formed by surface transformation

Gettering using voids formed by surface transformation

Method of forming mirrors by surface transformation of empty spaces...

Integrated circuit cooling and insulating device and method

Device, system, and method for a trench capacitor having micro-roug...

Strained semiconductor by full wafer bonding

Removal of copper oxides from integrated interconnects

Cellular materials formed using surface transformation

Integrated circuits using optical waveguide interconnects formed th...

Integrated circuit cooling and insulating device and method

Deaprom having amorphous silicon carbide gate insulator

Conductive material patterning methods

Gettering using voids formed by surface transformation

Microcavity discharge device

Method of forming mirrors by surface transformation of empty spaces...

Three-dimensional photonic crystal waveguide structure and method

Method of forming mirrors by surface transformation of empty spaces...

Gettering using voids formed by surface transformation

Low k interconnect dielectric using surface transformation

Scalable high performance antifuse structure and process

Method and structure for high capacitance memory cells

Strained semiconductor by full wafer bonding