Michael A. Lamson

Person

Van Alstyne, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Structure and method of high performance two layer ball grid array...
- Patent number 7,795,072
- Issue date Sep 14, 2010
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire bonded semiconductor device having low inductance and noise
- Patent number 7,265,443
- Issue date Sep 4, 2007
- Texas Instruments Incorporated
- Howard R. Test
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low capacitance coupling wire bonded semiconductor device
- Patent number 7,195,954
- Issue date Mar 27, 2007
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with conductor impedance selected during asse...
- Patent number 7,132,740
- Issue date Nov 7, 2006
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method of high performance two layer ball grid array...
- Patent number 6,995,037
- Issue date Feb 7, 2006
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low capacitance coupling wire bonded semiconductor device
- Patent number 6,822,340
- Issue date Nov 23, 2004
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method of high performance two layer ball grid array...
- Patent number 6,794,743
- Issue date Sep 21, 2004
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with conductor impedance selected during asse...
- Patent number 6,563,208
- Issue date May 13, 2003
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Constant impedance routing for high performance integrated circuit...
- Patent number 6,518,663
- Issue date Feb 11, 2003
- Texas Instruments Incorporated
- Richard D. James
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low pass filter integral with semiconductor package
- Patent number 6,424,027
- Issue date Jul 23, 2002
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential pair geometry for integrated circuit chip packages
- Patent number 6,323,116
- Issue date Nov 27, 2001
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball grid array package
- Patent number 6,084,777
- Issue date Jul 4, 2000
- Texas Instruments Incorporated
- Navinchandra Kalidas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer having a cantilevered ball connection and being electric...
- Patent number 6,064,576
- Issue date May 16, 2000
- Texas Instruments Incorporated
- Darvin R. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential pair geometry for integrated circuit chip packages
- Patent number 6,054,758
- Issue date Apr 25, 2000
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a packaged semiconductor device and a lead-frame t...
- Patent number 6,030,859
- Issue date Feb 29, 2000
- Hitachi, Ltd.
- Ichiro Anjoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lead frame for integrated circuits and process of packaging
- Patent number 5,994,169
- Issue date Nov 30, 1999
- Texas Instruments Incorporated
- Michael Anthony Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of packaging an integrated circuit with a conductive materi...
- Patent number 5,840,599
- Issue date Nov 24, 1998
- Texas Instruments Incorporated
- Michael Anthony Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor device and a leadframe therefor
- Patent number 5,648,299
- Issue date Jul 15, 1997
- Hitachi, Ltd.
- Ichiro Anjoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor device and a leadframe therefor
- Patent number 5,585,665
- Issue date Dec 17, 1996
- Hitachi, Ltd.
- Ichiro Anjoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor device and a lead frame therefor, having a c...
- Patent number 5,442,233
- Issue date Aug 15, 1995
- Hitachi, Ltd.
- Ichiro Anjoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a balanced capacitance lead frame for integrated...
- Patent number 5,432,127
- Issue date Jul 11, 1995
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and configuration for reducing electrical noise in integrate...
- Patent number 5,334,802
- Issue date Aug 2, 1994
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Balanced capacitance lead frame for integrated circuits and integra...
- Patent number 5,233,220
- Issue date Aug 3, 1993
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit device having bumped power supply buses over act...
- Patent number 5,083,187
- Issue date Jan 21, 1992
- Texas Instruments Incorporated
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Structure and method of high performance two layer ball grid array...
- Publication number 20080195990
- Publication date Aug 14, 2008
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IC package with integral vertical passive delay cells
- Publication number 20080157385
- Publication date Jul 3, 2008
- Heping Yue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wire bonded semiconductor device having low inductance and noise
- Publication number 20060244154
- Publication date Nov 2, 2006
- Howard R. Test
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method of high performance two layer ball grid array...
- Publication number 20060063304
- Publication date Mar 23, 2006
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for delivering power to a semiconductor device
- Publication number 20050133901
- Publication date Jun 23, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Darvin R. Edwards
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Low capacitance coupling wire bonded semiconductor device
- Publication number 20040207096
- Publication date Oct 21, 2004
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method of high performance two layer ball grid array...
- Publication number 20040108586
- Publication date Jun 10, 2004
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package with conductor impedance selected during asse...
- Publication number 20030201519
- Publication date Oct 30, 2003
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low capacitance coupling wire bonded semiconductor device
- Publication number 20020089069
- Publication date Jul 11, 2002
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package with conductor impedance selected during asse...
- Publication number 20020003291
- Publication date Jan 10, 2002
- Michael A. Lamson
- H01 - BASIC ELECTRIC ELEMENTS

Michael A. Lamson

Person

Patents Grantslast 30 patents

Structure and method of high performance two layer ball grid array...

Wire bonded semiconductor device having low inductance and noise

Low capacitance coupling wire bonded semiconductor device

Semiconductor package with conductor impedance selected during asse...

Structure and method of high performance two layer ball grid array...

Low capacitance coupling wire bonded semiconductor device

Structure and method of high performance two layer ball grid array...

Semiconductor package with conductor impedance selected during asse...

Constant impedance routing for high performance integrated circuit...

Low pass filter integral with semiconductor package

Differential pair geometry for integrated circuit chip packages

Ball grid array package

Interposer having a cantilevered ball connection and being electric...

Differential pair geometry for integrated circuit chip packages

Method of making a packaged semiconductor device and a lead-frame t...

Lead frame for integrated circuits and process of packaging

Process of packaging an integrated circuit with a conductive materi...

Packaged semiconductor device and a leadframe therefor

Packaged semiconductor device and a leadframe therefor

Packaged semiconductor device and a lead frame therefor, having a c...

Method for making a balanced capacitance lead frame for integrated...

Method and configuration for reducing electrical noise in integrate...

Balanced capacitance lead frame for integrated circuits and integra...

Integrated circuit device having bumped power supply buses over act...

Patents Applicationslast 30 patents

Structure and method of high performance two layer ball grid array...

IC package with integral vertical passive delay cells

Wire bonded semiconductor device having low inductance and noise

Structure and method of high performance two layer ball grid array...

System and method for delivering power to a semiconductor device

Low capacitance coupling wire bonded semiconductor device

Structure and method of high performance two layer ball grid array...

Semiconductor package with conductor impedance selected during asse...

Low capacitance coupling wire bonded semiconductor device

Semiconductor package with conductor impedance selected during asse...