Olubunmi Adetutu

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Electronic device with a gate electrode having at least two portions
- Patent number 8,659,087
- Issue date Feb 25, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
First inter-layer dielectric stack for non-volatile memory
- Patent number 8,435,898
- Issue date May 7, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a shared contact in a semiconductor device
- Patent number 8,426,310
- Issue date Apr 23, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reverse ALD
- Patent number 8,404,594
- Issue date Mar 26, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified hybrid orientation technology
- Patent number 8,125,032
- Issue date Feb 28, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma treatment of a semiconductor surface for enhanced nucleation...
- Patent number 8,030,220
- Issue date Oct 4, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a gate dielectric by in-situ plasma
- Patent number 7,981,808
- Issue date Jul 19, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Tien Ying Luo
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Electronic device comprising a gate electrode including a metal-con...
- Patent number 7,868,389
- Issue date Jan 11, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to control the gate sidewall profile by graded material comp...
- Patent number 7,811,891
- Issue date Oct 12, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a via
- Patent number 7,745,298
- Issue date Jun 29, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Tab A. Stephens
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ nitridation of high-k dielectrics
- Patent number 7,704,821
- Issue date Apr 27, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of forming an electronic device including active regions an...
- Patent number 7,651,935
- Issue date Jan 26, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plasma treatment of a semiconductor surface for enhanced nucleation...
- Patent number 7,618,902
- Issue date Nov 17, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for removing metal foot during high-k dielectric/metal gate...
- Patent number 7,579,282
- Issue date Aug 25, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Shahid Rauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal silicide scheme using a dual spacer process
- Patent number 7,544,575
- Issue date Jun 9, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified hybrid orientation technology
- Patent number 7,524,707
- Issue date Apr 28, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor process for forming stress absorbent shallow trench i...
- Patent number 7,442,621
- Issue date Oct 28, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming floating gates within NVM process
- Patent number 7,435,646
- Issue date Oct 14, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Jeffrey W. Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device comprising a transistor having a counter-doped...
- Patent number 7,432,164
- Issue date Oct 7, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a nitrided gate dielectric
- Patent number 7,402,472
- Issue date Jul 22, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Sangwoo Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ALD gate electrode
- Patent number 7,303,983
- Issue date Dec 4, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device comprising a gate electrode including a metal-con...
- Patent number 7,297,588
- Issue date Nov 20, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate dielectric and metal gate integration
- Patent number 7,297,586
- Issue date Nov 20, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI active layer with different surface orientation
- Patent number 7,288,458
- Issue date Oct 30, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transitional dielectric layer to improve reliability and performanc...
- Patent number 7,235,502
- Issue date Jun 26, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Sriram S. Kalpat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with low resistance contacts
- Patent number 7,179,700
- Issue date Feb 20, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer dielectric containing diffusion barrier material
- Patent number 7,144,825
- Issue date Dec 5, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for treating a semiconductor surface to form a metal-contain...
- Patent number 7,132,360
- Issue date Nov 7, 2006
- FREESCALE SEMICONDUCTOR, INC.
- James K. Schaeffer
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Metal gate transistor CMOS process and method for making
- Patent number 7,109,079
- Issue date Sep 19, 2006
- FREESCALE SEMICONDUCTOR, INC.
- James K. Schaeffer, III
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual metal gate electrode semiconductor fabrication process and str...
- Patent number 7,074,664
- Issue date Jul 11, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Ted R. White
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING A SHARED CONTACT IN A SEMICONDUCTOR DEVICE
- Publication number 20110294292
- Publication date Dec 1, 2011
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE WITH A GATE ELECTRODE HAVING AT LEAST TWO PORTIONS
- Publication number 20100090287
- Publication date Apr 15, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A GATE DIELECTRIC BY IN-SITU PLASMA
- Publication number 20100081290
- Publication date Apr 1, 2010
- Tien Ying Luo
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
PLASMA TREATMENT OF A SEMICONDUCTOR SURFACE FOR ENHANCED NUCLEATION...
- Publication number 20100035434
- Publication date Feb 11, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Modified Hybrid Orientation Technology
- Publication number 20090218625
- Publication date Sep 3, 2009
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A VIA
- Publication number 20090142895
- Publication date Jun 4, 2009
- Tab A. Stephens
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Void-free contact plug
- Publication number 20080254617
- Publication date Oct 16, 2008
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
First inter-layer dielectric stack for non-volatile memory
- Publication number 20080248649
- Publication date Oct 9, 2008
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE COMPRISING A GATE ELECTRODE INCLUDING A METAL-CON...
- Publication number 20080048270
- Publication date Feb 28, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Poly pre-doping anneals for improved gate profiles
- Publication number 20070196988
- Publication date Aug 23, 2007
- Mehul D. Shroff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device and method for incorporating a halogen in a di...
- Publication number 20070190711
- Publication date Aug 16, 2007
- Tien Ying Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device comprising a transistor having a counter-doped...
- Publication number 20070178633
- Publication date Aug 2, 2007
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual metal silicide scheme using a dual spacer process
- Publication number 20070166937
- Publication date Jul 19, 2007
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for removing metal foot during high-k dielectric/metal gate...
- Publication number 20070166973
- Publication date Jul 19, 2007
- Shahid Rauf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ALD gate electrode
- Publication number 20070166970
- Publication date Jul 19, 2007
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to control the gate sidewall profile by graded material comp...
- Publication number 20070166902
- Publication date Jul 19, 2007
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI active layer with different surface orientation
- Publication number 20070134891
- Publication date Jun 14, 2007
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plasma treatment of a semiconductor surface for enhanced nucleation...
- Publication number 20070123056
- Publication date May 31, 2007
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic device with a gate electrode having at least two portion...
- Publication number 20070069311
- Publication date Mar 29, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Modified hybrid orientation technology
- Publication number 20070048919
- Publication date Mar 1, 2007
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming floating gates within NVM process
- Publication number 20070042546
- Publication date Feb 22, 2007
- Jeffrey W. Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In-situ nitridation of high-k dielectrics
- Publication number 20060273411
- Publication date Dec 7, 2006
- Freescale Semiconductor, Inc.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reverse ALD
- Publication number 20060270239
- Publication date Nov 30, 2006
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a semiconductor device having a high-k dielectric
- Publication number 20060234436
- Publication date Oct 19, 2006
- Hsing H. Tseng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transitional dielectric layer to improve reliability and performanc...
- Publication number 20060220157
- Publication date Oct 5, 2006
- Freescale Semiconductor, Inc.
- Sriram S. Kalpat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making a nitrided gate dielectric
- Publication number 20060194423
- Publication date Aug 31, 2006
- Sangwoo Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic device comprising a gate electrode including a metal-con...
- Publication number 20060172516
- Publication date Aug 3, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Olubunmi O. Adetutu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal gate transistor CMOS process and method for making
- Publication number 20060166424
- Publication date Jul 27, 2006
- James K. Schaeffer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Novel gate dielectric and metal gate integration
- Publication number 20060166425
- Publication date Jul 27, 2006
- Freescale Semiconductor Inc.
- Dina H. Triyoso
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor process for forming stress absorbent shallow trench i...
- Publication number 20060110892
- Publication date May 25, 2006
- Freescale Semiconductor, Inc.
- Marius K. Orlowski
- H01 - BASIC ELECTRIC ELEMENTS

Olubunmi Adetutu

Person

Patents Grantslast 30 patents

Electronic device with a gate electrode having at least two portions

First inter-layer dielectric stack for non-volatile memory

Method of forming a shared contact in a semiconductor device

Reverse ALD

Modified hybrid orientation technology

Plasma treatment of a semiconductor surface for enhanced nucleation...

Method of forming a gate dielectric by in-situ plasma

Electronic device comprising a gate electrode including a metal-con...

Method to control the gate sidewall profile by graded material comp...

Method of forming a via

In-situ nitridation of high-k dielectrics

Process of forming an electronic device including active regions an...

Plasma treatment of a semiconductor surface for enhanced nucleation...

Method for removing metal foot during high-k dielectric/metal gate...

Dual metal silicide scheme using a dual spacer process

Modified hybrid orientation technology

Semiconductor process for forming stress absorbent shallow trench i...

Method for forming floating gates within NVM process

Semiconductor device comprising a transistor having a counter-doped...

Method of making a nitrided gate dielectric

ALD gate electrode

Electronic device comprising a gate electrode including a metal-con...

Gate dielectric and metal gate integration

SOI active layer with different surface orientation

Transitional dielectric layer to improve reliability and performanc...

Semiconductor device with low resistance contacts

Multi-layer dielectric containing diffusion barrier material

Method for treating a semiconductor surface to form a metal-contain...

Metal gate transistor CMOS process and method for making

Dual metal gate electrode semiconductor fabrication process and str...

Patents Applicationslast 30 patents

METHOD OF FORMING A SHARED CONTACT IN A SEMICONDUCTOR DEVICE

ELECTRONIC DEVICE WITH A GATE ELECTRODE HAVING AT LEAST TWO PORTIONS

METHOD OF FORMING A GATE DIELECTRIC BY IN-SITU PLASMA

PLASMA TREATMENT OF A SEMICONDUCTOR SURFACE FOR ENHANCED NUCLEATION...

Modified Hybrid Orientation Technology

METHOD OF FORMING A VIA

Void-free contact plug

First inter-layer dielectric stack for non-volatile memory

ELECTRONIC DEVICE COMPRISING A GATE ELECTRODE INCLUDING A METAL-CON...

Poly pre-doping anneals for improved gate profiles

Semiconductor device and method for incorporating a halogen in a di...

Semiconductor device comprising a transistor having a counter-doped...

Dual metal silicide scheme using a dual spacer process

Method for removing metal foot during high-k dielectric/metal gate...

ALD gate electrode

Method to control the gate sidewall profile by graded material comp...

SOI active layer with different surface orientation

Plasma treatment of a semiconductor surface for enhanced nucleation...

Electronic device with a gate electrode having at least two portion...

Modified hybrid orientation technology

Method for forming floating gates within NVM process

In-situ nitridation of high-k dielectrics

Reverse ALD

Method of forming a semiconductor device having a high-k dielectric

Transitional dielectric layer to improve reliability and performanc...

Method of making a nitrided gate dielectric

Electronic device comprising a gate electrode including a metal-con...

Metal gate transistor CMOS process and method for making

Novel gate dielectric and metal gate integration

Semiconductor process for forming stress absorbent shallow trench i...