Patent Application
20060273411
The invention is in the field of semiconductor fabrication processes and, more particularly, semiconductor fabrication processes that employ high dielectric constant (high-k) films.
High-k dielectrics are well-known and soon will be widely used in advanced semiconductor fabrication processes. High-k films are suitable for fabrication of dielectric films having a very low effective oxide thickness (EOT), which is a requirement for advanced technologies.
Nitrogen is sometimes introduced into high-k films. Nitridation of high-k dielectrics helps improve device reliability. Currently, the nitridation of high-k dielectric films is performed ex-situ, with respect to the high-k film deposition, using plasma nitrogen. Ex-situ nitridation processes, unfortunately, exhibit poor control of the nitrogen profile in the stack. In some cases, ex-situ nitridation will nitride the entire high-k stack, including the Si/high-k interface. This is undesirable as it leads to increased fixed charge in the dielectric. The use of plasma may also be undesirable as it can lead to plasma induced damage in the dielectric. Ex-situ nitridation is also undesirable as it negatively impact throughput. It would be desirable therefore to implement a controllable and reliable high-k nitridation process.
The present invention is illustrated by way of example and not limited by the accompanying figures, in which like references indicate similar elements, and in which:
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.
In one aspect, a process for forming a gate dielectric structure for a semiconductor device uses an impurity such as nitrogen that is incorporated into a high-k dielectric stack in-situ. A thin “pure” (no nitrogen) high-K film is deposited on a wafer substrate. A nitrided high-k stack is then formed over the pure high-k film. The stack may include a number of layers and each layer may include a number of sublayers. In one embodiment, the extent of nitridation is controlled by controlling the number of sublayers in any layer that contain nitrogen and the number of sublayers that do not contain nitrogen. Atomic layer deposition (ALD) is a likely deposition method suitable for use in the invention. Atomic layer deposition techniques permit fine grain control over the layers that are deposited on the wafer and their composition. After the high-k stack is complete, a thin layer of pure high-k may be deposited over the nitrided high-k stack. Finally, a post deposition anneal may be performed to control the nitrogen in the high-k stack. This is better understood with respect to the following drawings and description.
The use of in-situ nitridation process enables the formation of a nitrogen bearing dielectric stack in which the top and bottom interfaces of the dielectric stack are free of nitrogen.
Turning now to the drawings,
Substrate 102 may be doped with a p-type impurity, an n-type impurity, or both. The portion of substrate 102 visible in
In
Preferably, first high-k layer 110 does not contain nitrogen. Whereas incorporating nitrogen into a high-k dielectric stack is eventually achieved, first dielectric layer 110 is preferably a nitrogen-free dielectric. A theory is that providing a nitrogen free dielectric at the interface with the underlying substrate beneficially improves the electrical characteristics of the resulting transistor by reducing the amount of fixed charge at the high-k/substrate interface.
Although it is desirable to reduce nitrogen from the substrate interface, it is also desirable to incorporate nitrogen into the bulk of the dielectric stack. Accordingly, the preferred embodiment of first high-k dielectric layer 110 is very thin. Specifically, first high-k dielectric layer 110 is preferably a monolayer, a few monolayers, or sub-layers of the nitrogen-free or low nitrogen high-k material (e.g., HfO2). Formation of monolayer films is achieved with atomic layer deposition (ALD). One implementation of an HfO2 ALD process includes pulsing an ALD chamber (in which the wafer 101 is located) with an metal-halide precursor such as HfCl4 or ZrCl4, to form a monolayer of the precursor on the substrate, and then purging the chamber with an inert species such as N2 and Ar. The chamber is then pulsed with an oxygen-bearing species (the oxidant) and purged. The oxygen reacts with the previously deposited Hf compound to form the high-k material on the substrate. A suitable temperature for this process is approximately 300 C. The oxidant may be H20, O2, O3, N2O, NO, or, more preferably, D2O. D2O is believed to produce more reliable transistors by reducing the transistor's threshold voltage shift characteristics.
Referring now to
Referring to
Each high-k sublayer 130 and 131 is preferably formed with a distinct set of processing steps. Referring now to
After the concentration of nitrogen is determined by initializing the variable M, process 400 as depicted in
After completing the formation of nitrogen-free sublayer 130, the formation of one or more nitrogen-bearing sublayers is performed. The number of sublayers is determined by a variable (J), which is initialized to 1 in block 412. In the subsequent blocks 414 through 420, a nitrogen bearing sublayer is deposited by pulsing (block 414) an ALD chamber with HfCl4 followed by an N2 purge (block 416). The chamber is then pulsed (block 418) with a nitrogen-bearing species such as NH3, or more preferably, a deuterated nitrogen species such as ND3, which reacts with the previously deposited HfCl4 monolayer to form a monolayer of HfN. A chamber purge (block 420) completes the formation of the monolayer. Process 400 then determines (block 422) whether additional nitrogen-bearing monolayers are required by comparing (block 422) the counter J to the value of M set in block 402. If J<M, the counter is incremented (block 424) and blocks 414 through 420 are repeated. Depending upon the value of N set in block 402, the nitrogen concentration in a layer 121 can be controlled. Typically, the value of N is in the range of approximately 1 to 5 although higher values may be suitable in some applications.
Process 400 is repeated one or more times to form one or more layer 121. In one embodiment, the value of N within process 400 is the same for each layer 121. In this embodiment, each layer 121 in dielectric stack 120 has the same relative concentration of nitrogen. In other embodiments, the value of M may vary with each layer 121 to achieve a precisely controllable, nitrogen concentration distribution.
Referring now to
The resulting gate dielectric structure 125 includes first high-k dielectric layer 110, dielectric stack 120, and top high-k dielectric layer 122. Gate dielectric structure 125, as suggested by its name, is suitable for use as a gate dielectric in an MOS transistor. The final effective oxide thickness of gate dielectric structure 125 is preferably less than approximately 2 nm and the physical thickness of gate dielectric structure is less than approximately 4 nm.
In the foregoing specification, the invention has been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. For example, although each layers 110, 121, and 122 have been described as containing the same metal element, other embodiments may employ a different metal elements in different layers. Moreover, the number of sublayers 121, the precursors used in the ALD process may vary from the precursors illustrated in the detailed description. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention.
Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims. As used herein, the terms “comprises,” “comprising,” or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
