Peter Poechmueller

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for repairing and for operating a memory component
- Patent number 7,372,749
- Issue date May 13, 2008
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory circuit and method for repairing a single bit error
- Patent number 7,372,750
- Issue date May 13, 2008
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit comprising redundant memory areas
- Patent number 7,373,562
- Issue date May 13, 2008
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for transmission and reception of a data signal on a line pa...
- Patent number 7,359,259
- Issue date Apr 15, 2008
- Infineon Technologies AG
- Peter Poechmueller
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory component and addressing of memory cells
- Patent number 7,349,286
- Issue date Mar 25, 2008
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit arrangement for testing electrical modules
- Patent number 7,325,182
- Issue date Jan 29, 2008
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module having memory chips protected from excessive heat
- Patent number 7,317,248
- Issue date Jan 8, 2008
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for generating an output signal
- Patent number 7,298,174
- Issue date Nov 20, 2007
- Infineon Technologies AG
- Peter Poechmueller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device with test circuit disconnected from power supp...
- Patent number 7,248,067
- Issue date Jul 24, 2007
- Infineon Technologies AG
- Peter Poechmueller
- G01 - MEASURING TESTING
Information Patent Grant
Self-refresh system and method for dynamic random access memory
- Patent number 7,231,488
- Issue date Jun 12, 2007
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlled substrate voltage for memory switches
- Patent number 7,170,798
- Issue date Jan 30, 2007
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for calibrating signals
- Patent number 7,162,382
- Issue date Jan 9, 2007
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated layout transformation system and method
- Patent number 7,134,102
- Issue date Nov 7, 2006
- Infineon Technologies AG
- Peter Poechmueller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concept for a secure data communication between electronic devices
- Patent number 7,061,408
- Issue date Jun 13, 2006
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Array transistor amplification method and apparatus for dynamic ran...
- Patent number 6,975,550
- Issue date Dec 13, 2005
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Backside of chip implementation of redundancy fuses and contact pads
- Patent number 6,947,306
- Issue date Sep 20, 2005
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for manufacturing DRAMs with reduced self-refresh...
- Patent number 6,940,773
- Issue date Sep 6, 2005
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module with a heat dissipation means
- Patent number 6,922,338
- Issue date Jul 26, 2005
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of redundant memory cells to manufacture cost efficient drams w...
- Patent number 6,847,571
- Issue date Jan 25, 2005
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for preventing electromigration in an MRAM
- Patent number 6,522,578
- Issue date Feb 18, 2003
- Infineon Technologies AG
- Peter Poechmueller
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MULTICHIP DEVICE AND METHOD FOR PRODUCING A MULTICHIP DEVICE
- Publication number 20080029884
- Publication date Feb 7, 2008
- Juergen Grafe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Housed DRAM chip for high-speed applications
- Publication number 20070090500
- Publication date Apr 26, 2007
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Method for producing micromechanical components in integrated circu...
- Publication number 20070085192
- Publication date Apr 19, 2007
- Peter Poechmueller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory device with customizable configuration
- Publication number 20060203559
- Publication date Sep 14, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory circuit and method for repairing a single bit error
- Publication number 20060203567
- Publication date Sep 14, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Hub module for connecting one or more memory chips
- Publication number 20060193184
- Publication date Aug 31, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Hub chip for connecting one or more memory chips
- Publication number 20060190674
- Publication date Aug 24, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Memory component and addressing of memory cells
- Publication number 20060152984
- Publication date Jul 13, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Method for transmission and reception of a data signal on a line pa...
- Publication number 20060133159
- Publication date Jun 22, 2006
- Peter Poechmueller
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Methods for repairing and for operating a memory component
- Publication number 20060126407
- Publication date Jun 15, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Layer fill for homogenous technology processing
- Publication number 20060091423
- Publication date May 4, 2006
- Peter Poechmueller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit and method for generating an output signal
- Publication number 20060071689
- Publication date Apr 6, 2006
- Peter Poechmueller
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor device with test circuit disconnected from power supp...
- Publication number 20060061378
- Publication date Mar 23, 2006
- Peter Poechmueller
- G01 - MEASURING TESTING
Information Patent Application
Memory module having memory chips protected from excessive heat
- Publication number 20060049515
- Publication date Mar 9, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Memory module with programmable fuse element
- Publication number 20060050577
- Publication date Mar 9, 2006
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit comprising redundant memory areas
- Publication number 20050281076
- Publication date Dec 22, 2005
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Memory cell arrangement having dual memory cells
- Publication number 20050270864
- Publication date Dec 8, 2005
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Method and circuit arrangement for testing electrical modules
- Publication number 20050216808
- Publication date Sep 29, 2005
- Peter Poechmueller
- G01 - MEASURING TESTING
Information Patent Application
Backside of chip implementation of redundancy fuses and contact pads
- Publication number 20050078500
- Publication date Apr 14, 2005
- Infineon Technologies North America Corp.
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Self-refresh system and method for dynamic random access memory
- Publication number 20050060488
- Publication date Mar 17, 2005
- Infineon Technologies North America Corp.
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Automated layout transformation system and method
- Publication number 20050060672
- Publication date Mar 17, 2005
- Infineon Technologies North America Corp.
- Peter Poechmueller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlled substrate voltage for memory switches
- Publication number 20050050262
- Publication date Mar 3, 2005
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Array transistor amplification method and apparatus for dynamic ran...
- Publication number 20050018469
- Publication date Jan 27, 2005
- Infineon Technologies North America Corp.
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
STRUCTURE AND METHOD OF MULTIPLEXING BITLINE SIGNALS WITHIN A MEMOR...
- Publication number 20050007804
- Publication date Jan 13, 2005
- Infineon Technologies North America Corp.
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Concept for a secure data communication between electronic devices
- Publication number 20040225945
- Publication date Nov 11, 2004
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Use of redundant memory cells to manufacture cost efficient drams w...
- Publication number 20040196702
- Publication date Oct 7, 2004
- Infineon Technologies North America Corp.
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Method and system for manufacturing drams with reduced self-refresh...
- Publication number 20040196718
- Publication date Oct 7, 2004
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Memory module with a heat dissipation means
- Publication number 20040071035
- Publication date Apr 15, 2004
- Peter Poechmueller
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for calibrating signals
- Publication number 20040054482
- Publication date Mar 18, 2004
- Peter Poechmueller
- G11 - INFORMATION STORAGE

Peter Poechmueller

Person

Patents Grantslast 30 patents

Methods for repairing and for operating a memory component

Integrated memory circuit and method for repairing a single bit error

Memory circuit comprising redundant memory areas

Method for transmission and reception of a data signal on a line pa...

Memory component and addressing of memory cells

Method and circuit arrangement for testing electrical modules

Memory module having memory chips protected from excessive heat

Circuit and method for generating an output signal

Semiconductor device with test circuit disconnected from power supp...

Self-refresh system and method for dynamic random access memory

Controlled substrate voltage for memory switches

Apparatus and method for calibrating signals

Automated layout transformation system and method

Concept for a secure data communication between electronic devices

Array transistor amplification method and apparatus for dynamic ran...

Backside of chip implementation of redundancy fuses and contact pads

Method and system for manufacturing DRAMs with reduced self-refresh...

Memory module with a heat dissipation means

Use of redundant memory cells to manufacture cost efficient drams w...

Method for preventing electromigration in an MRAM

Patents Applicationslast 30 patents

MULTICHIP DEVICE AND METHOD FOR PRODUCING A MULTICHIP DEVICE

Housed DRAM chip for high-speed applications

Method for producing micromechanical components in integrated circu...

Memory device with customizable configuration

Integrated memory circuit and method for repairing a single bit error

Hub module for connecting one or more memory chips

Hub chip for connecting one or more memory chips

Memory component and addressing of memory cells

Method for transmission and reception of a data signal on a line pa...

Methods for repairing and for operating a memory component

Layer fill for homogenous technology processing

Circuit and method for generating an output signal

Semiconductor device with test circuit disconnected from power supp...

Memory module having memory chips protected from excessive heat

Memory module with programmable fuse element

Memory circuit comprising redundant memory areas

Memory cell arrangement having dual memory cells

Method and circuit arrangement for testing electrical modules

Backside of chip implementation of redundancy fuses and contact pads

Self-refresh system and method for dynamic random access memory

Automated layout transformation system and method

Controlled substrate voltage for memory switches

Array transistor amplification method and apparatus for dynamic ran...

STRUCTURE AND METHOD OF MULTIPLEXING BITLINE SIGNALS WITHIN A MEMOR...

Concept for a secure data communication between electronic devices

Use of redundant memory cells to manufacture cost efficient drams w...

Method and system for manufacturing drams with reduced self-refresh...

Memory module with a heat dissipation means

Apparatus and method for calibrating signals