Salvatore Nickolas Storino

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
State sensing system for eFuse memory
- Patent number 8,780,604
- Issue date Jul 15, 2014
- International Business Machines Corporation
- Chihhung Liao
- G11 - INFORMATION STORAGE
Information Patent Grant
SerDes double rate bitline with interlock to block precharge capture
- Patent number 7,839,715
- Issue date Nov 23, 2010
- International Business Machines Corporation
- Leland Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Metal fill region of a semiconductor chip
- Patent number 7,489,039
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Steven J. Baumgartner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for implementing subthreshold leakage reductio...
- Patent number 7,268,590
- Issue date Sep 11, 2007
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
eFuse sense circuit
- Patent number 7,224,633
- Issue date May 29, 2007
- International Business Machines Corporation
- William Paul Hovis
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for simplified data dispensation to and from d...
- Patent number 7,203,518
- Issue date Apr 10, 2007
- International Business Machines Corporation
- Salvatore Nicholas Storino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Balanced single ended to differential signal converter
- Patent number 7,142,061
- Issue date Nov 28, 2006
- International Business Machines Corporation
- Salvatore N. Storino
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for elimination of parasitic bipolar action in silicon on in...
- Patent number 6,808,998
- Issue date Oct 26, 2004
- International Business Machines Corporation
- Salvatore N. Storino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for estimating remaining life of a product
- Patent number 6,775,624
- Issue date Aug 10, 2004
- International Business Machines Corporation
- Salvatore Nicholas Storino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Changing the thread capacity of a multithreaded computer processor
- Patent number 6,748,556
- Issue date Jun 8, 2004
- International Business Machines Corporation
- Salvatore N. Storino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field protection against thread loss in a multithreaded computer pr...
- Patent number 6,681,345
- Issue date Jan 20, 2004
- International Business Machines Corporation
- Salvatore N. Storino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced flex cable
- Patent number 6,617,518
- Issue date Sep 9, 2003
- JDS Uniphase Corporaton
- Stephen John Ames
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Programmable timing boundary in dynamic circuits
- Patent number 6,462,581
- Issue date Oct 8, 2002
- International Business Machines Corporation
- Andrew Douglas Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for elimination of parasitic bipolar action in...
- Patent number 6,365,934
- Issue date Apr 2, 2002
- International Business Machines Corporation
- Salvatore N. Storino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for elimination of parasitic bipolar action in...
- Patent number 6,278,157
- Issue date Aug 21, 2001
- International Business Machines Corporation
- Jeff Van Tran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for elimination of parasitic bipolar action in silicon on in...
- Patent number 6,271,686
- Issue date Aug 7, 2001
- International Business Machines Corporation
- Jeff Van Tran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for eliminating effects of parasitic bipolar tran...
- Patent number 6,266,800
- Issue date Jul 24, 2001
- International Business Machines Corporation
- Gregory John Uhlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for elimination of parasitic bipolar action in...
- Patent number 6,188,247
- Issue date Feb 13, 2001
- International Business Machines Corporation
- Salvatore N. Storino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for implementing adjustable logic threshold in...
- Patent number 6,163,173
- Issue date Dec 19, 2000
- International Business Machines Corporation
- Salvatore N. Storino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for body control in silicon-on-insulator (SOI)...
- Patent number 6,150,869
- Issue date Nov 21, 2000
- International Business Machines Corporation
- Salvatore N. Storino
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of testing susceptibility to failure of functional circuitry...
- Patent number 6,111,422
- Issue date Aug 29, 2000
- International Business Machines Corporation
- Salvatore Nickolas Storino
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for bipolar elimination in silicon-on-insulat...
- Patent number 6,094,072
- Issue date Jul 25, 2000
- International Business Machines Corporation
- Andrew Douglas Davies
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic logic circuit with bitline repeater circuit
- Patent number 6,084,810
- Issue date Jul 4, 2000
- International Business Machines Corporation
- Salvatore N. Storino
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device having embedded test device for testing design...
- Patent number 6,049,218
- Issue date Apr 11, 2000
- International Business Machines Corporation
- Salvatore Nickolas Storino
- G01 - MEASURING TESTING
Information Patent Grant
Test device and method facilitating aggressive circuit design
- Patent number 6,005,406
- Issue date Dec 21, 1999
- International Business Machines Corporation
- Salvatore Nickolas Storino
- G01 - MEASURING TESTING
Information Patent Grant
Device and method for verifying independent reads and writes in a m...
- Patent number 5,973,971
- Issue date Oct 26, 1999
- International Business Machines Corporation
- Salvatore Nicholas Storino
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-threaded cell for a memory
- Patent number 5,778,243
- Issue date Jul 7, 1998
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
STATE SENSING SYSTEM FOR EFUSE MEMORY
- Publication number 20140003120
- Publication date Jan 2, 2014
- International Business Machines Corporation
- Chihhung Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Double Rate Clocking Pulse Generation With Mi...
- Publication number 20100266081
- Publication date Oct 21, 2010
- International Business Machines Corporation
- Gary S. Ditlow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SerDes double rate bitline with interlock to block precharge capture
- Publication number 20100106996
- Publication date Apr 29, 2010
- International Business Machines Corporation
- Leland Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEMS, METHODS AND COMPUTER PRODUCTS FOR TRAVERSING DESIGN HIERAR...
- Publication number 20090024975
- Publication date Jan 22, 2009
- International Business Machines Corporation
- Karl L. Ladin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRAVERSING GRAPHICAL LAYERS USING A SCROLLING MECHANISM IN A PHYSIC...
- Publication number 20080266246
- Publication date Oct 30, 2008
- International Business Machines Corporation
- Karl L. Ladin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Implementing Enhanced Timing Performance T...
- Publication number 20080178133
- Publication date Jul 24, 2008
- Jente Benedict Kuang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure for a Metal Fill Region of a Semiconductor Chip
- Publication number 20080082300
- Publication date Apr 3, 2008
- International Business Machines Corporation
- Steven J. Baumgartner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL FILL REGION OF A SEMICONDUCTOR CHIP
- Publication number 20080079158
- Publication date Apr 3, 2008
- International Business Machines Corporation
- Steven J. Baumgartner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for implementing subthreshold leakage reductio...
- Publication number 20070139082
- Publication date Jun 21, 2007
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EFUSE SENSE CIRCUIT
- Publication number 20070133333
- Publication date Jun 14, 2007
- International Business Machines Corporation
- William Paul Hovis
- G11 - INFORMATION STORAGE
Information Patent Application
Balanced single ended to differential signal converter
- Publication number 20060158258
- Publication date Jul 20, 2006
- International Business Machines Corporation
- Salvatore N. Storino
- G11 - INFORMATION STORAGE
Information Patent Application
Enhanced flex cable
- Publication number 20030085054
- Publication date May 8, 2003
- International Business Machines Corporation
- Stephen John Ames
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method and apparatus for estimating remaining life of a product
- Publication number 20030078741
- Publication date Apr 24, 2003
- International Business Machines Corporation
- Salvatore Nicholas Storino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for simplified data dispensation to and from d...
- Publication number 20020115428
- Publication date Aug 22, 2002
- International Business Machines Corporation
- Salvatore Nicholas Storino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for elimination of parasitic bipolar action in silicon on in...
- Publication number 20010000921
- Publication date May 10, 2001
- International Business Machines Corporation
- Salvatore N. Storino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for elimination of parasitic bipolar action in silicon on in...
- Publication number 20010000950
- Publication date May 10, 2001
- International Business Machines Corporation
- Jeff Van Tran
- H01 - BASIC ELECTRIC ELEMENTS

Salvatore Nickolas Storino

Person

Patents Grantslast 30 patents

State sensing system for eFuse memory

SerDes double rate bitline with interlock to block precharge capture

Metal fill region of a semiconductor chip

Method and apparatus for implementing subthreshold leakage reductio...

eFuse sense circuit

Method and apparatus for simplified data dispensation to and from d...

Balanced single ended to differential signal converter

Method for elimination of parasitic bipolar action in silicon on in...

Method and apparatus for estimating remaining life of a product

Changing the thread capacity of a multithreaded computer processor

Field protection against thread loss in a multithreaded computer pr...

Enhanced flex cable

Programmable timing boundary in dynamic circuits

Method and apparatus for elimination of parasitic bipolar action in...

Method and apparatus for elimination of parasitic bipolar action in...

Method for elimination of parasitic bipolar action in silicon on in...

System and method for eliminating effects of parasitic bipolar tran...

Method and apparatus for elimination of parasitic bipolar action in...

Method and apparatus for implementing adjustable logic threshold in...

Method and apparatus for body control in silicon-on-insulator (SOI)...

Method of testing susceptibility to failure of functional circuitry...

Methods and apparatus for bipolar elimination in silicon-on-insulat...

Dynamic logic circuit with bitline repeater circuit

Semiconductor device having embedded test device for testing design...

Test device and method facilitating aggressive circuit design

Device and method for verifying independent reads and writes in a m...

Multi-threaded cell for a memory

Patents Applicationslast 30 patents

STATE SENSING SYSTEM FOR EFUSE MEMORY

System and Method for Double Rate Clocking Pulse Generation With Mi...

SerDes double rate bitline with interlock to block precharge capture

SYSTEMS, METHODS AND COMPUTER PRODUCTS FOR TRAVERSING DESIGN HIERAR...

TRAVERSING GRAPHICAL LAYERS USING A SCROLLING MECHANISM IN A PHYSIC...

Method and Apparatus for Implementing Enhanced Timing Performance T...

Design Structure for a Metal Fill Region of a Semiconductor Chip

METAL FILL REGION OF A SEMICONDUCTOR CHIP

Method and apparatus for implementing subthreshold leakage reductio...

EFUSE SENSE CIRCUIT

Balanced single ended to differential signal converter

Enhanced flex cable

Method and apparatus for estimating remaining life of a product

Method and apparatus for simplified data dispensation to and from d...

Method for elimination of parasitic bipolar action in silicon on in...

Method for elimination of parasitic bipolar action in silicon on in...