Sameer Pradhan

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for fabricating a transistor device with a tuned dopant profile
- Patent number 9,893,148
- Issue date Feb 13, 2018
- Mie Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a transistor device with a tuned dopant profile
- Patent number 9,577,041
- Issue date Feb 21, 2017
- Mie Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a transistor with reduced junction leakage c...
- Patent number 9,368,624
- Issue date Jun 14, 2016
- Mie Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a transistor device with a tuned dopant profile
- Patent number 9,299,801
- Issue date Mar 29, 2016
- Mie Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High uniformity screen and epitaxial layers for CMOS devices
- Patent number 9,196,727
- Issue date Nov 24, 2015
- Mie Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with dopant migration suppression and method...
- Patent number 9,112,057
- Issue date Aug 18, 2015
- Mie Fujitsu Semiconductor Limited
- Sameer Pradhan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with reduced junction leakage and method of...
- Patent number 9,105,711
- Issue date Aug 11, 2015
- Mie Fujitsu Semiconductor Limited
- Lingquan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deeply depleted MOS transistors having a screening layer and method...
- Patent number 9,041,126
- Issue date May 26, 2015
- Mie Fujitsu Semiconductor Limited
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor having reduced junction leakage and methods of forming t...
- Patent number 8,883,600
- Issue date Nov 11, 2014
- SuVolta, Inc.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacture of integrated circuits with different chann...
- Patent number 8,877,619
- Issue date Nov 4, 2014
- SuVolta, Inc.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with reduced junction leakage and method of...
- Patent number 8,637,955
- Issue date Jan 28, 2014
- SuVolta, Inc.
- Lingquan Wang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method for Fabricating a Transistor Device With a Tuned Dopant Profile
- Publication number 20170025501
- Publication date Jan 26, 2017
- MIE Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Fabricating a Transistor Device With a Tuned Dopant Profile
- Publication number 20160172444
- Publication date Jun 16, 2016
- MIE Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High Uniformity Screen and Epitaxial Layers for CMOS Devices
- Publication number 20150333144
- Publication date Nov 19, 2015
- MIE Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH UNIFORMITY SCREEN AND EPITAXIAL LAYERS FOR CMOS DEVICES
- Publication number 20150061012
- Publication date Mar 5, 2015
- SUVOLTA, INC.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH REDUCED JUNCTION LEAKAGE AND METHOD OF...
- Publication number 20140103406
- Publication date Apr 17, 2014
- Lingquan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEPLY DEPLETED MOS TRANSISTORS HAVING A SCREENING LAYER AND METHOD...
- Publication number 20140084385
- Publication date Mar 27, 2014
- SUVOLTA, INC.
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS

Sameer Pradhan

Person

Patents Grantslast 30 patents

Method for fabricating a transistor device with a tuned dopant profile

Method for fabricating a transistor device with a tuned dopant profile

Method for fabricating a transistor with reduced junction leakage c...

Method for fabricating a transistor device with a tuned dopant profile

High uniformity screen and epitaxial layers for CMOS devices

Semiconductor devices with dopant migration suppression and method...

Semiconductor structure with reduced junction leakage and method of...

Deeply depleted MOS transistors having a screening layer and method...

Transistor having reduced junction leakage and methods of forming t...

Process for manufacture of integrated circuits with different chann...

Semiconductor structure with reduced junction leakage and method of...

Patents Applicationslast 30 patents

Method for Fabricating a Transistor Device With a Tuned Dopant Profile

Method for Fabricating a Transistor Device With a Tuned Dopant Profile

High Uniformity Screen and Epitaxial Layers for CMOS Devices

HIGH UNIFORMITY SCREEN AND EPITAXIAL LAYERS FOR CMOS DEVICES

SEMICONDUCTOR STRUCTURE WITH REDUCED JUNCTION LEAKAGE AND METHOD OF...

DEEPLY DEPLETED MOS TRANSISTORS HAVING A SCREENING LAYER AND METHOD...