Satoru Tanoi

Person

Tokyo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Bias circuit for a wideband amplifier driven with low voltage
- Patent number 7,397,309
- Issue date Jul 8, 2008
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 6,522,563
- Issue date Feb 18, 2003
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 6,510,070
- Issue date Jan 21, 2003
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 6,362,989
- Issue date Mar 26, 2002
- Oki Electric Industry, Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 6,320,778
- Issue date Nov 20, 2001
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 6,249,450
- Issue date Jun 19, 2001
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device having semiconductor memory circuit to be test...
- Patent number 6,195,771
- Issue date Feb 27, 2001
- Oki Electric Industry Co., Ltd.
- Tetsuya Tanabe
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 6,104,655
- Issue date Aug 15, 2000
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 6,011,709
- Issue date Jan 4, 2000
- Oki Electric Industry Co. Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory with improved word line structure
- Patent number 5,903,488
- Issue date May 11, 1999
- OKI Electric Industry Co.,Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory
- Patent number 5,875,148
- Issue date Feb 23, 1999
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Current amplifier and data bus circuit
- Patent number 5,821,777
- Issue date Oct 13, 1998
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 5,781,466
- Issue date Jul 14, 1998
- Oki Electric Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable level shifter and multiplier suitable for low-voltage diff...
- Patent number 5,751,177
- Issue date May 12, 1998
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distributing circuit
- Patent number 5,751,665
- Issue date May 12, 1998
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bias circuit with low sensitivity to threshold variations
- Patent number 5,739,719
- Issue date Apr 14, 1998
- Oki Electric Industry Co., Ltd.
- Tetsuya Tanabe
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor memory with improved word line structure
- Patent number 5,708,621
- Issue date Jan 13, 1998
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Level shifter circuit
- Patent number 5,659,258
- Issue date Aug 19, 1997
- Oki Electric Industry Co., Ltd.
- Tetsuya Tanabe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Buffer circuit and bias circuit
- Patent number 5,648,734
- Issue date Jul 15, 1997
- Oki Electric Industry Co., Ltd.
- Tetsuya Tanabe
- G05 - CONTROLLING REGULATING
Information Patent Grant
Digital signal transmission circuit
- Patent number 5,640,117
- Issue date Jun 17, 1997
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor memory with built-in cache
- Patent number 5,596,521
- Issue date Jan 21, 1997
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device
- Patent number 5,592,499
- Issue date Jan 7, 1997
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory (DRAM) with cache and tag
- Patent number 5,577,223
- Issue date Nov 19, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal transmission circuit
- Patent number 5,559,462
- Issue date Sep 24, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sense circuit, memory circuit, negative-resistance circuit, schmitt...
- Patent number 5,519,348
- Issue date May 21, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense circuit, memory circuit, negative-resistance circuit, schmitt...
- Patent number 5,514,986
- Issue date May 7, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of driving same
- Patent number 5,511,030
- Issue date Apr 23, 1996
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G11 - INFORMATION STORAGE
Information Patent Grant
Load circuit tolerating large current and voltage swings
- Patent number 5,510,746
- Issue date Apr 23, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense circuit
- Patent number 5,504,442
- Issue date Apr 2, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE
Information Patent Grant
Level shifter circuit
- Patent number 5,498,991
- Issue date Mar 12, 1996
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Bias circuit for a wideband amplifier driven with low voltage
- Publication number 20060226910
- Publication date Oct 12, 2006
- Oki Electric Industry Co., Ltd.
- Satoru Tanoi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor memory with built-in cache
- Publication number 20020067650
- Publication date Jun 6, 2002
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory with built-in cache
- Publication number 20020060920
- Publication date May 23, 2002
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory with built-in cache
- Publication number 20010053103
- Publication date Dec 20, 2001
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory with built-in cache
- Publication number 20010050873
- Publication date Dec 13, 2001
- Oki Electric Industry Co., Ltd.
- Yasuhiro Tanaka
- G06 - COMPUTING CALCULATING COUNTING

Satoru Tanoi

Person

Patents Grantslast 30 patents

Bias circuit for a wideband amplifier driven with low voltage

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache

Semiconductor device having semiconductor memory circuit to be test...

Semiconductor storage device

Semiconductor memory with built-in cache

Semiconductor memory with improved word line structure

Semiconductor memory

Current amplifier and data bus circuit

Semiconductor memory with built-in cache

Variable level shifter and multiplier suitable for low-voltage diff...

Clock distributing circuit

Bias circuit with low sensitivity to threshold variations

Semiconductor memory with improved word line structure

Level shifter circuit

Buffer circuit and bias circuit

Digital signal transmission circuit

Semiconductor memory with built-in cache

Semiconductor memory device

Dynamic random access memory (DRAM) with cache and tag

Digital signal transmission circuit

Sense circuit, memory circuit, negative-resistance circuit, schmitt...

Sense circuit, memory circuit, negative-resistance circuit, schmitt...

Semiconductor memory device and method of driving same

Load circuit tolerating large current and voltage swings

Sense circuit

Level shifter circuit

Patents Applicationslast 30 patents

Bias circuit for a wideband amplifier driven with low voltage

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache

Semiconductor memory with built-in cache