Scott Gatzemeier

Person

Alpine, UT, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 8,687,435
- Issue date Apr 1, 2014
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 8,400,844
- Issue date Mar 19, 2013
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory block testing
- Patent number 8,094,508
- Issue date Jan 10, 2012
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 8,072,820
- Issue date Dec 6, 2011
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output compression and pin reduction in an integrated circuit
- Patent number 8,024,629
- Issue date Sep 20, 2011
- Micron Technology, Inc.
- Benjamin Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Input/output compression and pin reduction in an integrated circuit
- Patent number 7,707,467
- Issue date Apr 27, 2010
- Micron Technology, Inc.
- Benjamin Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple erase block tagging in a flash memory device
- Patent number 7,620,768
- Issue date Nov 17, 2009
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory block testing
- Patent number 7,567,472
- Issue date Jul 28, 2009
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 7,554,858
- Issue date Jun 30, 2009
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Die based trimming
- Patent number 7,512,507
- Issue date Mar 31, 2009
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Independent polling for multi-page programming
- Patent number 7,411,848
- Issue date Aug 12, 2008
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Independent polling for multi-page programming
- Patent number 7,292,487
- Issue date Nov 6, 2007
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for reducing test resources in testing DRAMs
- Patent number 7,168,018
- Issue date Jan 23, 2007
- Micron Technology, Inc.
- Chris Cooper
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple erase block tagging in a flash memory device
- Patent number 7,116,584
- Issue date Oct 3, 2006
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for reducing test resources in testing DRAMS
- Patent number 6,986,084
- Issue date Jan 10, 2006
- Micron Technology, Inc.
- Chris Cooper
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for reducing test resources in testing Rambus...
- Patent number 6,854,079
- Issue date Feb 8, 2005
- Micron Technology, Inc.
- Chris Cooper
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for parallel programming of antifuses
- Patent number 6,839,292
- Issue date Jan 4, 2005
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...
- Publication number 20130229878
- Publication date Sep 5, 2013
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...
- Publication number 20120008404
- Publication date Jan 12, 2012
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
INPUT/OUTPUT COMPRESSION AND PIN REDUCTION IN AN INTEGRATED CIRCUIT
- Publication number 20100205490
- Publication date Aug 12, 2010
- Micron Technology, Inc.
- Benjamin Louie
- G01 - MEASURING TESTING
Information Patent Application
MEMORY BLOCK TESTING
- Publication number 20090290441
- Publication date Nov 26, 2009
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...
- Publication number 20090238009
- Publication date Sep 24, 2009
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for reducing pin-count of memory devices, and mem...
- Publication number 20090040837
- Publication date Feb 12, 2009
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Input/output compression and pin reduction in an integrated circuit
- Publication number 20080209284
- Publication date Aug 28, 2008
- Micron Technology, Inc.
- Benjamin Louie
- G01 - MEASURING TESTING
Information Patent Application
INDEPENDENT POLLING FOR MULTI-PAGE PROGRAMMING
- Publication number 20070288793
- Publication date Dec 13, 2007
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
INDEPENDENT POLLING FOR MULTI-PAGE PROGRAMMING
- Publication number 20070263464
- Publication date Nov 15, 2007
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Memory block testing
- Publication number 20070266276
- Publication date Nov 15, 2007
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
DIE BASED TRIMMING
- Publication number 20070225928
- Publication date Sep 27, 2007
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for reducing test resources in testing drams
- Publication number 20070168790
- Publication date Jul 19, 2007
- Chris Cooper
- G01 - MEASURING TESTING
Information Patent Application
Test circuitry and testing methods
- Publication number 20070019480
- Publication date Jan 25, 2007
- Micron Technology, Inc.
- Dustin L. Conner
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple erase block tagging in a flash memory device
- Publication number 20060253641
- Publication date Nov 9, 2006
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for reducing test resources in testing DRAMs
- Publication number 20050262405
- Publication date Nov 24, 2005
- Chris Cooper
- G01 - MEASURING TESTING
Information Patent Application
Multiple erase block tagging in a flash memory device
- Publication number 20050033904
- Publication date Feb 10, 2005
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for reducing test resources in testing DRAMs
- Publication number 20040255211
- Publication date Dec 16, 2004
- Chris Cooper
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for reducing test resources in testing DRAMS
- Publication number 20040233738
- Publication date Nov 25, 2004
- Chris Cooper
- G01 - MEASURING TESTING
Information Patent Application
Apparatus and method for parallel programming of antifuses
- Publication number 20030112693
- Publication date Jun 19, 2003
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE

Scott Gatzemeier

Person

Patents Grantslast 30 patents

System and method for reducing pin-count of memory devices, and mem...

System and method for reducing pin-count of memory devices, and mem...

Memory block testing

System and method for reducing pin-count of memory devices, and mem...

Input/output compression and pin reduction in an integrated circuit

Input/output compression and pin reduction in an integrated circuit

Multiple erase block tagging in a flash memory device

Memory block testing

System and method for reducing pin-count of memory devices, and mem...

Die based trimming

Independent polling for multi-page programming

Independent polling for multi-page programming

Apparatus and method for reducing test resources in testing DRAMs

Multiple erase block tagging in a flash memory device

Apparatus and method for reducing test resources in testing DRAMS

Apparatus and method for reducing test resources in testing Rambus...

Apparatus and method for parallel programming of antifuses

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...

SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...

INPUT/OUTPUT COMPRESSION AND PIN REDUCTION IN AN INTEGRATED CIRCUIT

MEMORY BLOCK TESTING

SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...

System and method for reducing pin-count of memory devices, and mem...

Input/output compression and pin reduction in an integrated circuit

INDEPENDENT POLLING FOR MULTI-PAGE PROGRAMMING

INDEPENDENT POLLING FOR MULTI-PAGE PROGRAMMING

Memory block testing

DIE BASED TRIMMING

Apparatus and method for reducing test resources in testing drams

Test circuitry and testing methods

Multiple erase block tagging in a flash memory device

Apparatus and method for reducing test resources in testing DRAMs

Multiple erase block tagging in a flash memory device

Apparatus and method for reducing test resources in testing DRAMs

Apparatus and method for reducing test resources in testing DRAMS

Apparatus and method for parallel programming of antifuses