SIMON J.S. McELREA

Person

Scotts Valley, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor die mount by conformal die coating
- Patent number 9,824,999
- Issue date Nov 21, 2017
- Invensas Corporation
- Scott Jay Crane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support mounted electrically interconnected die assembly
- Patent number 9,305,862
- Issue date Apr 5, 2016
- Invensas Corporation
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die mount by conformal die coating
- Patent number 9,252,116
- Issue date Feb 2, 2016
- Invensas Corporation
- Scott Jay Crane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked die assembly having reduced stress electrical interconnects
- Patent number 8,912,661
- Issue date Dec 16, 2014
- Invensas Corporation
- Scott McGrath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through interposer wire bond using low CTE interposer with coarse s...
- Patent number 8,872,318
- Issue date Oct 28, 2014
- Tessera, Inc.
- Simon McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assembly with thermally and electrically conductive...
- Patent number 8,847,412
- Issue date Sep 30, 2014
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical electrical interconnect formed on support prior to die mount
- Patent number 8,742,602
- Issue date Jun 3, 2014
- Invensas Corporation
- Terrence Caskey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically interconnected stacked die assemblies
- Patent number 8,723,332
- Issue date May 13, 2014
- Invensas Corporation
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die mount by conformal die coating
- Patent number 8,704,379
- Issue date Apr 22, 2014
- Invensas Corporation
- Scott Jay Crane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical interconnect for die stacked in zig-zag configuration
- Patent number 8,680,687
- Issue date Mar 25, 2014
- Invensas Corporation
- Reynaldo Co
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically interconnected stacked die assemblies
- Patent number 8,629,543
- Issue date Jan 14, 2014
- Invensas Corporation
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level surface passivation of stackable integrated circuit chips
- Patent number 8,324,081
- Issue date Dec 4, 2012
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support mounted electrically interconnected die assembly
- Patent number 8,178,978
- Issue date May 15, 2012
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flat leadless packages and stacked leadless package assemblies
- Patent number 8,159,053
- Issue date Apr 17, 2012
- Vertical Circuits, Inc.
- Lawrence Douglas Andrews, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level surface passivation of stackable integrated circuit chips
- Patent number 7,923,349
- Issue date Apr 12, 2011
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flat leadless packages and stacked leadless package assemblies
- Patent number 7,843,046
- Issue date Nov 30, 2010
- Vertical Circuits, Inc.
- Lawrence Douglas Andrews, Jr.
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SUPPORT MOUNTED ELECTRICALLY INTERCONNECTED DIE ASSEMBLY
- Publication number 20160218088
- Publication date Jul 28, 2016
- Invensas Corporation
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATING
- Publication number 20160104689
- Publication date Apr 14, 2016
- Invensas Corporation
- Scott Jay Crane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Microelectronic Assembly With Thermally and Electrically Conductive...
- Publication number 20150017763
- Publication date Jan 15, 2015
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATING
- Publication number 20140213020
- Publication date Jul 31, 2014
- Invensas Corporation
- Scott Jay Crane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLY WITH THERMALLY AND ELECTRICALLY CONDUCTIVE...
- Publication number 20140131900
- Publication date May 15, 2014
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Support mounted electrically interconnected die assembly
- Publication number 20130099392
- Publication date Apr 25, 2013
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH INTERPOSER WIRE BOND USING LOW CTE INTERPOSER WITH COARSE S...
- Publication number 20130049196
- Publication date Feb 28, 2013
- Tessera, Inc.
- Simon McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED DIE ASSEMBLY HAVING REDUCED STRESS ELECTRICAL INTERCONNECTS
- Publication number 20110272825
- Publication date Nov 10, 2011
- Vertical Circuits, Inc.
- Scott McGrath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS
- Publication number 20110147943
- Publication date Jun 23, 2011
- Vertical Circuits, Inc.
- Simon J.S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrically Interconnected Stacked Die Assemblies
- Publication number 20110037159
- Publication date Feb 17, 2011
- Vertical Circuits, Inc.
- Simon J.S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flat Leadless Packages and Stacked Leadless Package Assemblies
- Publication number 20110012246
- Publication date Jan 20, 2011
- Vertical Circuits, Inc.
- Lawrence Douglas Andrews, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrical interconnect for die stacked in zig-zag configuration
- Publication number 20100327461
- Publication date Dec 30, 2010
- Vertical Circuits, Inc.
- Reynaldo Co
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sensor
- Publication number 20100117224
- Publication date May 13, 2010
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Image Sensor
- Publication number 20100052087
- Publication date Mar 4, 2010
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Support Mounted Electrically Interconnected Die Assembly
- Publication number 20090230528
- Publication date Sep 17, 2009
- Vertical Circuits, Inc.
- Simon J. S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLAT LEADLESS PACKAGES AND STACKED LEADLESS PACKAGE ASSEMBLIES
- Publication number 20090206458
- Publication date Aug 20, 2009
- Vertical Circuits, Inc.
- LAWRENCE DOUGLAS ANDREWS, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP SCALE STACKED DIE PACKAGE
- Publication number 20090102038
- Publication date Apr 23, 2009
- Vertical Circuits, Inc.
- SIMON J.S. MCELREA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrical Interconnect Formed by Pulsed Dispense
- Publication number 20090068790
- Publication date Mar 12, 2009
- Vertical Circuits, Inc.
- Terrence Caskey
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATING
- Publication number 20090065916
- Publication date Mar 12, 2009
- VERTICAL CIRCUITS, INC.
- Scott Jay Crane
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL CIRCUITRY FORMED ON INTEGRATED CIRCUIT DEVICE USI...
- Publication number 20080315407
- Publication date Dec 25, 2008
- Vertical Circuits, Inc.
- Lawrence Douglas Andrews, JR.
- G01 - MEASURING TESTING
Information Patent Application
WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS
- Publication number 20080315434
- Publication date Dec 25, 2008
- Vertical Circuits, Inc.
- Simon J.S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICALLY INTERCONNECTED STACKED DIE ASSEMBLIES
- Publication number 20080303131
- Publication date Dec 11, 2008
- Vertical Circuits, Inc.
- Simon J.S. McElrea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL ELECTRICAL INTERCONNECT FORMED ON SUPPORT PRIOR TO DIE MOUNT
- Publication number 20080224279
- Publication date Sep 18, 2008
- Vertical Circuits, Inc.
- Terrence Caskey
- H01 - BASIC ELECTRIC ELEMENTS

SIMON J.S. McELREA

Person

Patents Grantslast 30 patents

Semiconductor die mount by conformal die coating

Support mounted electrically interconnected die assembly

Semiconductor die mount by conformal die coating

Stacked die assembly having reduced stress electrical interconnects

Through interposer wire bond using low CTE interposer with coarse s...

Microelectronic assembly with thermally and electrically conductive...

Vertical electrical interconnect formed on support prior to die mount

Electrically interconnected stacked die assemblies

Semiconductor die mount by conformal die coating

Electrical interconnect for die stacked in zig-zag configuration

Electrically interconnected stacked die assemblies

Wafer level surface passivation of stackable integrated circuit chips

Support mounted electrically interconnected die assembly

Flat leadless packages and stacked leadless package assemblies

Wafer level surface passivation of stackable integrated circuit chips

Flat leadless packages and stacked leadless package assemblies

Patents Applicationslast 30 patents

SUPPORT MOUNTED ELECTRICALLY INTERCONNECTED DIE ASSEMBLY

SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATING

Microelectronic Assembly With Thermally and Electrically Conductive...

SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATING

MICROELECTRONIC ASSEMBLY WITH THERMALLY AND ELECTRICALLY CONDUCTIVE...

Support mounted electrically interconnected die assembly

THROUGH INTERPOSER WIRE BOND USING LOW CTE INTERPOSER WITH COARSE S...

STACKED DIE ASSEMBLY HAVING REDUCED STRESS ELECTRICAL INTERCONNECTS

WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS

Electrically Interconnected Stacked Die Assemblies

Flat Leadless Packages and Stacked Leadless Package Assemblies

Electrical interconnect for die stacked in zig-zag configuration

Sensor

Image Sensor

Support Mounted Electrically Interconnected Die Assembly

FLAT LEADLESS PACKAGES AND STACKED LEADLESS PACKAGE ASSEMBLIES

CHIP SCALE STACKED DIE PACKAGE

Electrical Interconnect Formed by Pulsed Dispense

SEMICONDUCTOR DIE MOUNT BY CONFORMAL DIE COATING

THREE-DIMENSIONAL CIRCUITRY FORMED ON INTEGRATED CIRCUIT DEVICE USI...

WAFER LEVEL SURFACE PASSIVATION OF STACKABLE INTEGRATED CIRCUIT CHIPS

ELECTRICALLY INTERCONNECTED STACKED DIE ASSEMBLIES

VERTICAL ELECTRICAL INTERCONNECT FORMED ON SUPPORT PRIOR TO DIE MOUNT