Tsugio Takahashi

Person

Ome, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Logic circuit and method for controlling a setting circuit
- Patent number 9,621,167
- Issue date Apr 11, 2017
- NEC Corporation
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Signal transmission/reception circuit
- Patent number 8,943,389
- Issue date Jan 27, 2015
- NEC Corporation
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Optical transceiving system with frame synchronization and optical...
- Patent number 8,666,256
- Issue date Mar 4, 2014
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data transmission
- Patent number 8,656,259
- Issue date Feb 18, 2014
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Frame pulse signal latch circuit and phase adjustment method
- Patent number 8,311,173
- Issue date Nov 13, 2012
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Communication system
- Patent number 8,218,701
- Issue date Jul 10, 2012
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Large-capacity semiconductor memory with improved layout for sub-am...
- Patent number RE42659
- Issue date Aug 30, 2011
- Tsugio Takahashi
- 365 - Static information storage and retrieval
Information Patent Grant
Semiconductor integrated circuit
- Patent number 7,821,804
- Issue date Oct 26, 2010
- Elpida Memory, Inc.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Frame pulse signal latch circuit and phase adjustment method
- Patent number 7,795,941
- Issue date Sep 14, 2010
- NEC Corporation
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Large-Capacity semiconductor memory with improved layout for sub-am...
- Patent number RE41379
- Issue date Jun 15, 2010
- Rising Silicon, Inc.
- Tsugio Takahashi
- 365 - Static information storage and retrieval
Information Patent Grant
Large-capacity semiconductor memory with improved layout for sub-am...
- Patent number RE40356
- Issue date Jun 3, 2008
- Hitachi, Ltd.
- Tsugio Takahashi
- 365 - Static information storage and retrieval
Information Patent Grant
Semiconductor integrated circuit
- Patent number 7,289,346
- Issue date Oct 30, 2007
- Elpida Memory, Inc.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory (DRAM) capable of canceling out comple...
- Patent number 7,274,613
- Issue date Sep 25, 2007
- Elpida Memory, Inc.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 7,030,438
- Issue date Apr 18, 2006
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory
- Patent number RE38944
- Issue date Jan 24, 2006
- Hitachi, Ltd.
- Tsugio Takahashi
- 365 - Static information storage and retrieval
Information Patent Grant
Dynamic random access memory(DRAM) capable of canceling out complim...
- Patent number 6,944,080
- Issue date Sep 13, 2005
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Output buffer circuit and integrated semiconductor circuit device w...
- Patent number 6,894,547
- Issue date May 17, 2005
- Elpida Memory, Inc.
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of controlling data reading capable of increasing data trans...
- Patent number 6,847,580
- Issue date Jan 25, 2005
- Elpida Memory, Inc.
- Minoru Ebihara
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory (DRAM) capable of canceling out comple...
- Patent number 6,807,120
- Issue date Oct 19, 2004
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device having spaced-apart electro...
- Patent number 6,756,262
- Issue date Jun 29, 2004
- Hitachi, Ltd.
- Yoshitaka Nakamura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 6,671,198
- Issue date Dec 30, 2003
- Hitachi, Ltd.
- Riichiro Takemura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 6,667,905
- Issue date Dec 23, 2003
- Hitachi, Ltd.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit with memory redundancy circuit
- Patent number 6,668,344
- Issue date Dec 23, 2003
- Hitachi, Ltd.
- Takeshi Sakata
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 6,625,051
- Issue date Sep 23, 2003
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 6,563,759
- Issue date May 13, 2003
- Hitachi, Ltd.
- Hideharu Yahata
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 6,538,924
- Issue date Mar 25, 2003
- Hitachi, Ltd.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifiers having reduced Vth deviation
- Patent number 6,538,945
- Issue date Mar 25, 2003
- Hitachi, Ltd.
- Riichiro Takemura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 6,538,912
- Issue date Mar 25, 2003
- Hitachi, Ltd.
- Riichiro Takemura
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory (DRAM) capable of canceling out comple...
- Patent number 6,501,672
- Issue date Dec 31, 2002
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 6,426,889
- Issue date Jul 30, 2002
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LOGIC CIRCUIT AND METHOD FOR CONTROLLING A SETTING CIRCUIT
- Publication number 20160315618
- Publication date Oct 27, 2016
- NEC Corporation
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIGNAL TRANSMISSION/RECEPTION CIRCUIT
- Publication number 20130067296
- Publication date Mar 14, 2013
- NEC Corporation
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIGNAL TRANSMISSION/RECEPTION CIRCUIT
- Publication number 20130064252
- Publication date Mar 14, 2013
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OPTICAL TRANSCEIVING SYSTEM WITH FRAME SYNCHRONIZATION AND OPTICAL...
- Publication number 20120243877
- Publication date Sep 27, 2012
- NEC Corporation
- Tsugio TAKAHASHI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OPTICAL TRANSMISSION AND RECEPTION SYSTEM AND OPTICAL RECEPTION DEVICE
- Publication number 20120221912
- Publication date Aug 30, 2012
- NEC Corporation
- Tsugio TAKAHASHI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Data transmission
- Publication number 20120117447
- Publication date May 10, 2012
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMMUNICATION DEVICE AND COMMUNICATION METHOD IN DATA TRANSMISSION...
- Publication number 20120027107
- Publication date Feb 2, 2012
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PLI N-BIT CORRECTION CIRCUIT, GFP LAYER 2 SYNCHRONIZATION CIRCUIT A...
- Publication number 20120011417
- Publication date Jan 12, 2012
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL DATA TRANSMISSION SYSTEM USING TRANSMITTING UNIT AND RECEIV...
- Publication number 20110302464
- Publication date Dec 8, 2011
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FRAME PULSE SIGNAL LATCH CIRCUIT AND PHASE ADJUSTMENT METHOD
- Publication number 20090212836
- Publication date Aug 27, 2009
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FRAME PULSE SIGNAL LATCH CIRCUIT AND PHASE ADJUSTMENT METHOD
- Publication number 20090207960
- Publication date Aug 20, 2009
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMMUNICATION SYSTEM
- Publication number 20080232529
- Publication date Sep 25, 2008
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and device for synchronizing and multiplexing asynchronous s...
- Publication number 20080025346
- Publication date Jan 31, 2008
- NEC Corporation
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20080002448
- Publication date Jan 3, 2008
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device capable of canceling out noise development
- Publication number 20070297257
- Publication date Dec 27, 2007
- ELPIDA MEMORY, INC.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20060126400
- Publication date Jun 15, 2006
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic random access memory (DRAM) capable of canceling out compli...
- Publication number 20050270889
- Publication date Dec 8, 2005
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic RAM and semiconductor device
- Publication number 20050030783
- Publication date Feb 10, 2005
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit with memory redundancy circuit
- Publication number 20040085826
- Publication date May 6, 2004
- Hitachi, Ltd.
- Takeshi Sakata
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20040047168
- Publication date Mar 11, 2004
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device
- Publication number 20030142528
- Publication date Jul 31, 2003
- Hitachi, Ltd.
- Riichiro Takemura
- G11 - INFORMATION STORAGE
Information Patent Application
Output buffer circuit and integrated semiconductor circuit device w...
- Publication number 20030112042
- Publication date Jun 19, 2003
- ELPIDA MEMORY, INC.
- Tsugio Takahashi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamic RAM and semiconductor device
- Publication number 20030112682
- Publication date Jun 19, 2003
- Hitachi, Ltd.
- Tomonori Sekiguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20030095455
- Publication date May 22, 2003
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Application
Method of controlling data reading capable of increasing data trans...
- Publication number 20030086329
- Publication date May 8, 2003
- ELPIDA MEMORY, INC.
- Minoru Ebihara
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20020142534
- Publication date Oct 3, 2002
- Hitachi, Ltd.
- Tomonori Sekiguchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device
- Publication number 20020126520
- Publication date Sep 12, 2002
- Hitachi, Ltd.
- Riichiro Takemura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sense amplifiers having reduced Vth deviation
- Publication number 20020122344
- Publication date Sep 5, 2002
- Riichiro Takemura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Matrix switch circuit
- Publication number 20020061015
- Publication date May 23, 2002
- Tsugio Takahashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20020015328
- Publication date Feb 7, 2002
- Chiaki Dono
- G11 - INFORMATION STORAGE

Tsugio Takahashi

Person

Patents Grantslast 30 patents

Logic circuit and method for controlling a setting circuit

Signal transmission/reception circuit

Optical transceiving system with frame synchronization and optical...

Data transmission

Frame pulse signal latch circuit and phase adjustment method

Communication system

Large-capacity semiconductor memory with improved layout for sub-am...

Semiconductor integrated circuit

Frame pulse signal latch circuit and phase adjustment method

Large-Capacity semiconductor memory with improved layout for sub-am...

Large-capacity semiconductor memory with improved layout for sub-am...

Semiconductor integrated circuit

Dynamic random access memory (DRAM) capable of canceling out comple...

Semiconductor integrated circuit

Semiconductor memory

Dynamic random access memory(DRAM) capable of canceling out complim...

Output buffer circuit and integrated semiconductor circuit device w...

Method of controlling data reading capable of increasing data trans...

Dynamic random access memory (DRAM) capable of canceling out comple...

Semiconductor integrated circuit device having spaced-apart electro...

Semiconductor device

Semiconductor integrated circuit

Semiconductor integrated circuit with memory redundancy circuit

Semiconductor integrated circuit

Semiconductor memory device

Semiconductor integrated circuit

Sense amplifiers having reduced Vth deviation

Semiconductor device

Dynamic random access memory (DRAM) capable of canceling out comple...

Semiconductor integrated circuit

Patents Applicationslast 30 patents

LOGIC CIRCUIT AND METHOD FOR CONTROLLING A SETTING CIRCUIT

SIGNAL TRANSMISSION/RECEPTION CIRCUIT

SIGNAL TRANSMISSION/RECEPTION CIRCUIT

OPTICAL TRANSCEIVING SYSTEM WITH FRAME SYNCHRONIZATION AND OPTICAL...

OPTICAL TRANSMISSION AND RECEPTION SYSTEM AND OPTICAL RECEPTION DEVICE

Data transmission

COMMUNICATION DEVICE AND COMMUNICATION METHOD IN DATA TRANSMISSION...

PLI N-BIT CORRECTION CIRCUIT, GFP LAYER 2 SYNCHRONIZATION CIRCUIT A...

DIGITAL DATA TRANSMISSION SYSTEM USING TRANSMITTING UNIT AND RECEIV...

FRAME PULSE SIGNAL LATCH CIRCUIT AND PHASE ADJUSTMENT METHOD

FRAME PULSE SIGNAL LATCH CIRCUIT AND PHASE ADJUSTMENT METHOD

COMMUNICATION SYSTEM

Method and device for synchronizing and multiplexing asynchronous s...

Semiconductor integrated circuit

Semiconductor memory device capable of canceling out noise development

Semiconductor integrated circuit

Dynamic random access memory (DRAM) capable of canceling out compli...

Dynamic RAM and semiconductor device

Semiconductor integrated circuit with memory redundancy circuit

Semiconductor integrated circuit

Semiconductor device

Output buffer circuit and integrated semiconductor circuit device w...

Dynamic RAM and semiconductor device

Semiconductor integrated circuit

Method of controlling data reading capable of increasing data trans...

Semiconductor integrated circuit

Semiconductor device

Sense amplifiers having reduced Vth deviation

Matrix switch circuit

Semiconductor integrated circuit