Wallace E. Fister

Person

Meridian, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 8,687,435
- Issue date Apr 1, 2014
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 8,400,844
- Issue date Mar 19, 2013
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 8,072,820
- Issue date Dec 6, 2011
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for reducing pin-count of memory devices, and mem...
- Patent number 7,554,858
- Issue date Jun 30, 2009
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for parallel programming of antifuses
- Patent number 6,839,292
- Issue date Jan 4, 2005
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating memory addresses for accessing memory-cell ar...
- Patent number 6,538,938
- Issue date Mar 25, 2003
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating memory addresses for accessing memory-cell ar...
- Patent number 6,510,102
- Issue date Jan 21, 2003
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating memory addresses for testing memory devices
- Patent number 6,483,773
- Issue date Nov 19, 2002
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating memory addresses for accessing memory-cell ar...
- Patent number 6,452,868
- Issue date Sep 17, 2002
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing memory devices
- Patent number 6,327,199
- Issue date Dec 4, 2001
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
On-clip testing circuit and method for improving testing of integra...
- Patent number 6,324,657
- Issue date Nov 27, 2001
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing memory devices
- Patent number 6,285,609
- Issue date Sep 4, 2001
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing memory devices
- Patent number 6,252,811
- Issue date Jun 26, 2001
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing memory devices
- Patent number 6,115,303
- Issue date Sep 5, 2000
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for generating memory addresses for testing me...
- Patent number 6,104,669
- Issue date Aug 15, 2000
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for generating memory addresses for testing me...
- Patent number 6,049,505
- Issue date Apr 11, 2000
- Micron Technology, Inc.
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory array compressed data testing
- Patent number 5,935,263
- Issue date Aug 10, 1999
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...
- Publication number 20130229878
- Publication date Sep 5, 2013
- Micron Technology, Inc.
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...
- Publication number 20120008404
- Publication date Jan 12, 2012
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...
- Publication number 20090238009
- Publication date Sep 24, 2009
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for reducing pin-count of memory devices, and mem...
- Publication number 20090040837
- Publication date Feb 12, 2009
- Micron Technology, Inc.
- Scott Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for parallel programming of antifuses
- Publication number 20030112693
- Publication date Jun 19, 2003
- Scott N. Gatzemeier
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for generating memory addresses for testing me...
- Publication number 20020075749
- Publication date Jun 20, 2002
- Wallace E. Fister
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for generating memory addresses for testing me...
- Publication number 20020067646
- Publication date Jun 6, 2002
- Wallace E. Fister
- G11 - INFORMATION STORAGE

Wallace E. Fister

Person

Patents Grantslast 30 patents

System and method for reducing pin-count of memory devices, and mem...

System and method for reducing pin-count of memory devices, and mem...

System and method for reducing pin-count of memory devices, and mem...

System and method for reducing pin-count of memory devices, and mem...

Apparatus and method for parallel programming of antifuses

Method for generating memory addresses for accessing memory-cell ar...

Method for generating memory addresses for accessing memory-cell ar...

Method for generating memory addresses for testing memory devices

Method for generating memory addresses for accessing memory-cell ar...

Method for testing memory devices

On-clip testing circuit and method for improving testing of integra...

Method and apparatus for testing memory devices

Method and apparatus for testing memory devices

Method and apparatus for testing memory devices

Method and apparatus for generating memory addresses for testing me...

Method and apparatus for generating memory addresses for testing me...

Method and apparatus for memory array compressed data testing

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...

SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...

SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEM...

System and method for reducing pin-count of memory devices, and mem...

Apparatus and method for parallel programming of antifuses

Method and apparatus for generating memory addresses for testing me...

Method and apparatus for generating memory addresses for testing me...