Yasoji Suzuki

Person

Kanagawa, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-gray level display apparatus and method of displaying an imag...
- Patent number 6,459,416
- Issue date Oct 1, 2002
- Kabushiki Kaisha Toshiba
- Itsuo Sasaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Voltage transfer circuit and a booster circuit, and an IC card comp...
- Patent number 6,046,626
- Issue date Apr 4, 2000
- Kabushiki Kaisha Toshiba
- Yukihiro Saeki
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Multi-gray level display apparatus and method of displaying an imag...
- Patent number 6,020,869
- Issue date Feb 1, 2000
- Kabushiki Kaisha Toshiba
- Itsuo Sasaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Light guide and liquid crystal display device using it
- Patent number 5,719,649
- Issue date Feb 17, 1998
- Kabushiki Kaisha Toshiba
- Yasuo Shono
- G02 - OPTICS
Information Patent Grant
TAB type semiconductor device and method of manufacturing the same
- Patent number 5,237,201
- Issue date Aug 17, 1993
- Kabushiki Kaisha Toshiba
- Toru Tanaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile semiconductor memory device incorporating level shiftin...
- Patent number 5,058,063
- Issue date Oct 15, 1991
- Kabushiki Kaisha Toshiba
- Yukio Wada
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable logic circuit using wired-or tristate gates
- Patent number 5,027,012
- Issue date Jun 25, 1991
- Kabushiki Kaisha Toshiba
- Yukihiro Saeki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor circuit
- Patent number 5,017,994
- Issue date May 21, 1991
- Tokyo Shibaura Denki Kabushiki Kaisha
- Hideharu Egawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power supply switching circuit
- Patent number 4,988,894
- Issue date Jan 29, 1991
- Kabushiki Kaisha Toshiba
- Akira Takiba
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Complementary semiconductor device
- Patent number 4,975,757
- Issue date Dec 4, 1990
- Kabushiki Kaisha Toshiba
- Hideharu Egawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile semiconductor memory device with a double gate structure
- Patent number 4,930,105
- Issue date May 29, 1990
- Kabushiki Kaisha Toshiba
- Osamu Matsumoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory
- Patent number 4,912,749
- Issue date Mar 27, 1990
- Kabushiki Kaisha Toshiba
- Tadashi Maruyama
- G11 - INFORMATION STORAGE
Information Patent Grant
High density semiconductor circuit using CMOS transistors
- Patent number 4,883,986
- Issue date Nov 28, 1989
- Tokyo Shibaura Denki Kabushiki Kaisha
- Hideharu Egawa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Nonvolatile floating gate semiconductor memory device
- Patent number 4,870,615
- Issue date Sep 26, 1989
- Kabushiki Kaisha Toshiba
- Tadashi Maruyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Complementary MOSFET logic circuit
- Patent number 4,558,234
- Issue date Dec 10, 1985
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Analog signal power amplifier circuit
- Patent number 4,546,327
- Issue date Oct 8, 1985
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Analog switch device having threshold change reducing means
- Patent number 4,529,897
- Issue date Jul 16, 1985
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Complementary IGFET Schmitt trigger logic circuit having a variable...
- Patent number 4,464,587
- Issue date Aug 7, 1984
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier circuit
- Patent number 4,439,697
- Issue date Mar 27, 1984
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
CR Oscillator having constant current charging source
- Patent number 4,414,515
- Issue date Nov 8, 1983
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit
- Patent number 4,404,663
- Issue date Sep 13, 1983
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yukihiro Saeki
- G11 - INFORMATION STORAGE
Information Patent Grant
MOS Integrated logic circuit device with improved switching speed c...
- Patent number 4,389,582
- Issue date Jun 21, 1983
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrating analog to digital converter having offset error compens...
- Patent number 4,364,028
- Issue date Dec 14, 1982
- Tokyo Shibaura Denki Kabushiki Kaisha
- Eiji Masuda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flop circuit
- Patent number 4,356,411
- Issue date Oct 26, 1982
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
MOS Integrated circuit
- Patent number 4,318,117
- Issue date Mar 2, 1982
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Astable MOS FET multivibrator
- Patent number 4,301,427
- Issue date Nov 17, 1981
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase detector circuit using logic gates
- Patent number 4,291,274
- Issue date Sep 22, 1981
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- G01 - MEASURING TESTING
Information Patent Grant
Method for preparing complementary semiconductor device
- Patent number 4,280,272
- Issue date Jul 28, 1981
- Tokyo Shibaura Denki Kabushiki Kaisha
- Hideharu Egawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration circuit
- Patent number 4,278,943
- Issue date Jul 14, 1981
- Tokyo Shibaura Denki Kabushiki Kaisha
- Eiji Masuda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interface circuit for converting logic signal levels
- Patent number 4,268,761
- Issue date May 19, 1981
- Tokyo Shibaura Denki Kabushiki Kaisha
- Yasoji Suzuki
- H03 - BASIC ELECTRONIC CIRCUITRY

Yasoji Suzuki

Person

Patents Grantslast 30 patents

Multi-gray level display apparatus and method of displaying an imag...

Voltage transfer circuit and a booster circuit, and an IC card comp...

Multi-gray level display apparatus and method of displaying an imag...

Light guide and liquid crystal display device using it

TAB type semiconductor device and method of manufacturing the same

Nonvolatile semiconductor memory device incorporating level shiftin...

Programmable logic circuit using wired-or tristate gates

Semiconductor circuit

Power supply switching circuit

Complementary semiconductor device

Nonvolatile semiconductor memory device with a double gate structure

Nonvolatile semiconductor memory

High density semiconductor circuit using CMOS transistors

Nonvolatile floating gate semiconductor memory device

Complementary MOSFET logic circuit

Analog signal power amplifier circuit

Analog switch device having threshold change reducing means

Complementary IGFET Schmitt trigger logic circuit having a variable...

Sense amplifier circuit

CR Oscillator having constant current charging source

Integrated circuit

MOS Integrated logic circuit device with improved switching speed c...

Integrating analog to digital converter having offset error compens...

Flip-flop circuit

MOS Integrated circuit

Astable MOS FET multivibrator

Phase detector circuit using logic gates

Method for preparing complementary semiconductor device

Integration circuit

Interface circuit for converting logic signal levels