Applying a precursor material to the bonding area

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H01L2224/81026

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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H01L2224/81026Applying a precursor material to the bonding area

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Structures for low temperature bonding using nanoparticles
- Patent number 12,027,487
- Issue date Jul 2, 2024
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for low temperature bonding using nanoparticles
- Patent number 11,973,056
- Issue date Apr 30, 2024
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures and methods for low temperature bonding using nanoparticles
- Patent number 11,710,718
- Issue date Jul 25, 2023
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip-chip on leadframe having partially etched landing sites
- Patent number 11,233,031
- Issue date Jan 25, 2022
- Texas Instruments Incorporated
- Ronaldo Marasigan Arguelles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory device and method of manufacturing the same
- Patent number 11,177,249
- Issue date Nov 16, 2021
- SK hynix Inc.
- Kun Young Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures and methods for low temperature bonding using nanoparticles
- Patent number 10,892,246
- Issue date Jan 12, 2021
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures and methods for low temperature bonding using nanoparticles
- Patent number 10,886,250
- Issue date Jan 5, 2021
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-porous copper to copper interconnect
- Patent number 10,804,241
- Issue date Oct 13, 2020
- International Business Machines Corporation
- Charles L. Arvin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip packages with sintered interconnects formed out of pads
- Patent number 10,777,496
- Issue date Sep 15, 2020
- International Business Machines Corporation
- Thomas J. Brunschwiler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-porous copper to copper interconnect
- Patent number 10,553,555
- Issue date Feb 4, 2020
- International Business Machines Corporation
- Charles L. Arvin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structures and methods for low temperature bonding using nanoparticles
- Patent number 10,535,626
- Issue date Jan 14, 2020
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package (PoP) structure including stud bulbs
- Patent number 10,510,731
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip alignment utilizing superomniphobic surface treatment of silic...
- Patent number 10,396,050
- Issue date Aug 27, 2019
- International Business Machines Corporation
- Eric J. Campbell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package (PoP) structure including stud bulbs
- Patent number 10,157,893
- Issue date Dec 18, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip alignment utilizing superomniphobic surface treatment of silic...
- Patent number 9,859,244
- Issue date Jan 2, 2018
- International Business Machines Corporation
- Eric J. Campbell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package on-package (PoP) structure including stud bulbs
- Patent number 9,812,427
- Issue date Nov 7, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-side reinforcement flux for encapsulation
- Patent number 9,786,629
- Issue date Oct 10, 2017
- Ramakrishna Hosur Venkatagiriyappa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Organic thin film passivation of metal interconnections
- Patent number 9,583,390
- Issue date Feb 28, 2017
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package on-Package (PoP) structure including stud bulbs and method
- Patent number 9,502,394
- Issue date Nov 22, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic packages with nanoparticle joining
- Patent number 9,397,063
- Issue date Jul 19, 2016
- Tessera, Inc.
- Belgacem Haba
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Package-on-package (PoP) structure including stud bulbs and method
- Patent number 8,912,651
- Issue date Dec 16, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic packages with nanoparticle joining
- Patent number 8,580,607
- Issue date Nov 12, 2013
- Tessera, Inc.
- Belgacem Haba
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Printed wiring board
- Patent number 8,013,256
- Issue date Sep 6, 2011
- Ibiden Co., Ltd.
- Toru Nakai
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor device having external connection terminals and metho...
- Patent number 7,944,051
- Issue date May 17, 2011
- Renesas Electronics Corporation
- Fumiyoshi Kawashiro
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of manufacturing semiconductor device
- Patent number 7,901,997
- Issue date Mar 8, 2011
- Shinko Electric Industries Co., Ltd.
- Takashi Ozawa
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Printed wiring board
- Patent number 7,449,781
- Issue date Nov 11, 2008
- Ibiden Co., Ltd.
- Toru Nakai
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor device and manufacturing method thereof
- Patent number 7,259,046
- Issue date Aug 21, 2007
- Kabushiki Kaisha Toshiba
- Hideo Aoki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printed wiring board and production method for printed wiring board
- Patent number 7,129,158
- Issue date Oct 31, 2006
- Ibiden Co., Ltd.
- Toru Nakai
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Formation of electroplate solder on an organic circuit board for fl...
- Patent number 7,098,126
- Issue date Aug 29, 2006
- Phoenix Precision Technology Corp.
- Han-Kun Hsieh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low or no-force bump flattening structure and method
- Patent number 6,674,647
- Issue date Jan 6, 2004
- International Business Machines Corporation
- Mark V. Pierson
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
STRUCTURES FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
- Publication number 20240312954
- Publication date Sep 19, 2024
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURES FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
- Publication number 20230335531
- Publication date Oct 19, 2023
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
- Publication number 20230132060
- Publication date Apr 27, 2023
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP-CHIP ON LEADFRAME HAVING PARTIALLY ETCHED LANDING SITES
- Publication number 20220149003
- Publication date May 12, 2022
- TEXAS INSTRUMENTS INCORPORATED
- RONALDO MARASIGAN ARGUELLES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structures And Methods For Low Temperature Bonding Using Nanoparticles
- Publication number 20210225801
- Publication date Jul 22, 2021
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20200243499
- Publication date Jul 30, 2020
- SK HYNIX INC.
- Kun Young LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structures And Methods For Low Temperature Bonding Using Nanoparticles
- Publication number 20200152598
- Publication date May 14, 2020
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-POROUS COPPER TO COPPER INTERCONNECT
- Publication number 20200098723
- Publication date Mar 26, 2020
- International Business Machines Corporation
- Charles L. Arvin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-On-Package (PoP) Structure Including Stud Bulbs
- Publication number 20190123027
- Publication date Apr 25, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGES WITH SINTERED INTERCONNECTS FORMED OUT OF PADS
- Publication number 20190109084
- Publication date Apr 11, 2019
- International Business Machines Corporation
- Thomas J. Brunschwiler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-POROUS COPPER TO COPPER INTERCONNECT
- Publication number 20190067239
- Publication date Feb 28, 2019
- International Business Machines Corporation
- Charles L. Arvin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
- Publication number 20180218998
- Publication date Aug 2, 2018
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-On-Package (PoP) Structure Including Stud Bulbs
- Publication number 20180047709
- Publication date Feb 15, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP ALIGNMENT UTILIZING SUPEROMNIPHOBIC SURFACE TREATMENT OF SILIC...
- Publication number 20170278817
- Publication date Sep 28, 2017
- International Business Machines Corporation
- Eric J. CAMPBELL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP-CHIP ON LEADFRAME HAVING PARTIALLY ETCHED LANDING SITES
- Publication number 20170170101
- Publication date Jun 15, 2017
- TEXAS INSTRUMENTS INCORPORATED
- RONALDO MARASIGAN ARGUELLES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING
- Publication number 20170047307
- Publication date Feb 16, 2017
- Invensas Corporation
- Cyprian Emeka Uzoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL-SIDE REINFORCEMENT FLUX FOR ENCAPSULATION
- Publication number 20160163672
- Publication date Jun 9, 2016
- ALPHA METALS, INC.
- Ramakrishna Hosur Venkatagiriyappa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ORGANIC THIN FILM PASSIVATION OF METAL INTERCONNECTIONS
- Publication number 20160155667
- Publication date Jun 2, 2016
- Intel Corporation
- Aleksandar ALEKSOV
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING
- Publication number 20150243624
- Publication date Aug 27, 2015
- Tessera, Inc.
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Bonding Semiconductor Devices
- Publication number 20140242777
- Publication date Aug 28, 2014
- Varughese Mathew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ORGANIC THIN FILM PASSIVATION OF METAL INTERCONNECTIONS
- Publication number 20140138818
- Publication date May 22, 2014
- Alexsandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING
- Publication number 20140077351
- Publication date Mar 20, 2014
- Tessera, Inc.
- Belgacem Haba
- B82 - NANO-TECHNOLOGY
Information Patent Application
Package-On-Package (PoP) Structure and Method
- Publication number 20130134588
- Publication date May 30, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL CHIP SCALE PACKAGE DEVICE AND MANUFACTURING METHOD THEROF
- Publication number 20130099380
- Publication date Apr 25, 2013
- Richtek Technology Corporation
- Po-Jui Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE MOUNTING METHOD
- Publication number 20120329182
- Publication date Dec 27, 2012
- Teppei Kojio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRINTED WIRING BOARD
- Publication number 20120067628
- Publication date Mar 22, 2012
- IBIDEN CO., LTD.
- Toru NAKAI
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING
- Publication number 20120025365
- Publication date Feb 2, 2012
- Tessera Research LLC
- Belgacem Haba
- B82 - NANO-TECHNOLOGY
Information Patent Application
WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF
- Publication number 20110297425
- Publication date Dec 8, 2011
- Shinko Electric Industries Co., Ltd.
- Junichi Nakamura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
PRINTED WIRING BOARD
- Publication number 20090065243
- Publication date Mar 12, 2009
- IBIDEN CO., LTD.
- Toru Nakai
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
SEMICONDUCTOR DEVICE HAVING EXTERNAL CONNECTION TERMINALS AND METHO...
- Publication number 20090026615
- Publication date Jan 29, 2009
- NEC ELECTRONICS CORPORATION
- Fumiyoshi KAWASHIRO
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Applying a precursor material to the bonding area

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Structures for low temperature bonding using nanoparticles

Methods for low temperature bonding using nanoparticles

Structures and methods for low temperature bonding using nanoparticles

Flip-chip on leadframe having partially etched landing sites

Semiconductor memory device and method of manufacturing the same

Structures and methods for low temperature bonding using nanoparticles

Structures and methods for low temperature bonding using nanoparticles

Non-porous copper to copper interconnect

Chip packages with sintered interconnects formed out of pads

Non-porous copper to copper interconnect

Structures and methods for low temperature bonding using nanoparticles

Package-on-package (PoP) structure including stud bulbs

Chip alignment utilizing superomniphobic surface treatment of silic...

Package-on-package (PoP) structure including stud bulbs

Chip alignment utilizing superomniphobic surface treatment of silic...

Package on-package (PoP) structure including stud bulbs

Dual-side reinforcement flux for encapsulation

Organic thin film passivation of metal interconnections

Package on-Package (PoP) structure including stud bulbs and method

Microelectronic packages with nanoparticle joining

Package-on-package (PoP) structure including stud bulbs and method

Microelectronic packages with nanoparticle joining

Printed wiring board

Semiconductor device having external connection terminals and metho...

Method of manufacturing semiconductor device

Printed wiring board

Semiconductor device and manufacturing method thereof

Printed wiring board and production method for printed wiring board

Formation of electroplate solder on an organic circuit board for fl...

Low or no-force bump flattening structure and method

Patents Applicationslast 30 patents

STRUCTURES FOR LOW TEMPERATURE BONDING USING NANOPARTICLES

STRUCTURES FOR LOW TEMPERATURE BONDING USING NANOPARTICLES

METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES

FLIP-CHIP ON LEADFRAME HAVING PARTIALLY ETCHED LANDING SITES

Structures And Methods For Low Temperature Bonding Using Nanoparticles

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Structures And Methods For Low Temperature Bonding Using Nanoparticles

NON-POROUS COPPER TO COPPER INTERCONNECT

Package-On-Package (PoP) Structure Including Stud Bulbs

CHIP PACKAGES WITH SINTERED INTERCONNECTS FORMED OUT OF PADS

NON-POROUS COPPER TO COPPER INTERCONNECT

STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES

Package-On-Package (PoP) Structure Including Stud Bulbs

CHIP ALIGNMENT UTILIZING SUPEROMNIPHOBIC SURFACE TREATMENT OF SILIC...

FLIP-CHIP ON LEADFRAME HAVING PARTIALLY ETCHED LANDING SITES

STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING

DUAL-SIDE REINFORCEMENT FLUX FOR ENCAPSULATION

ORGANIC THIN FILM PASSIVATION OF METAL INTERCONNECTIONS

MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING

Method for Bonding Semiconductor Devices

ORGANIC THIN FILM PASSIVATION OF METAL INTERCONNECTIONS

MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING

Package-On-Package (PoP) Structure and Method

WAFER LEVEL CHIP SCALE PACKAGE DEVICE AND MANUFACTURING METHOD THEROF

SEMICONDUCTOR DEVICE MOUNTING METHOD

PRINTED WIRING BOARD

MICROELECTRONIC PACKAGES WITH NANOPARTICLE JOINING

WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF

PRINTED WIRING BOARD

SEMICONDUCTOR DEVICE HAVING EXTERNAL CONNECTION TERMINALS AND METHO...