Isolated-integrated

Industry

CPC
Y10S148/085

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

Current Industry

Y10S148/085Isolated-integrated

Industries

Patents Grantslast 30 patents

Information Patent Grant
Vertical transistor having top and bottom surface isolation
- Patent number 6,194,773
- Issue date Feb 27, 2001
- Texas Instruments Incorporated
- Satwinder Malhi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating integrated circuits with oxidized isolation
- Patent number 6,093,620
- Issue date Jul 25, 2000
- National Semiconductor Corporation
- Douglas L. Peltzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene isolation of CMOS transistors
- Patent number 5,981,326
- Issue date Nov 9, 1999
- Frank M. Wanlass
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of semiconductor structure having two levels of buried...
- Patent number 5,899,714
- Issue date May 4, 1999
- National Semiconductor Corporation
- Douglas R. Farrenkopf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure having two levels of buried regions
- Patent number 5,889,315
- Issue date Mar 30, 1999
- National Semiconductor Corporation
- Douglas R. Farrenkopf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Zener diodes on the same wafer with BiCDMOS structures
- Patent number 5,751,054
- Issue date May 12, 1998
- Siliconix Incorporated
- Hamza Yilmaz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing dielectrics dividing wafer with isolated r...
- Patent number 5,496,760
- Issue date Mar 5, 1996
- Fuji Electric Company, Ltd.
- Kazuo Matsuzaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated DMOS IC technology
- Patent number 5,485,027
- Issue date Jan 16, 1996
- Siliconix Incorporated
- Richard K. Williams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BICDMOS structures
- Patent number 5,426,328
- Issue date Jun 20, 1995
- Siliconix Incorporated
- Hamza Yilmaz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BiCDMOS structure
- Patent number 5,422,508
- Issue date Jun 6, 1995
- Siliconix Incorporated
- Hamza Yilmaz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making BiCDMOS structures
- Patent number 5,416,039
- Issue date May 16, 1995
- Siliconix Incorporated
- Hamza Yilmaz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectrics dividing wafer
- Patent number 5,381,033
- Issue date Jan 10, 1995
- Fuji Electric Company, Ltd.
- Kazuo Matsuzaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a BiCDMOS
- Patent number 5,374,569
- Issue date Dec 20, 1994
- Siliconix Incorporated
- Hamza Yilmaz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming high speed, high voltage fully isolated bipolar t...
- Patent number 5,344,785
- Issue date Sep 6, 1994
- United Technologies Corporation
- Rick C. Jerome
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a vertical transistor
- Patent number 5,294,559
- Issue date Mar 15, 1994
- Texas Instruments Incorporated
- Satwinder Malhi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complementary, isolated DMOS IC technology
- Patent number 5,156,989
- Issue date Oct 20, 1992
- Siliconix, Incorporated
- Richard K. Williams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a high voltage MOS transistor
- Patent number 5,132,235
- Issue date Jul 21, 1992
- Siliconix Incorporated
- Richard K. Williams
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of manufacturing the same
- Patent number 5,128,743
- Issue date Jul 7, 1992
- Hitachi, Ltd.
- Yoichi Tamaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a high breakdown active device structure with low...
- Patent number 5,091,336
- Issue date Feb 25, 1992
- Harris Corporation
- James D. Beasom
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making solid state device utilizing ion implantation tec...
- Patent number 5,082,793
- Issue date Jan 21, 1992
- Chou H. Li
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method of forming crystal array
- Patent number 5,064,771
- Issue date Nov 12, 1991
- Grumman Aerospace Corporation
- Allen L. Solomon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making solid-state device utilizing isolation grooves
- Patent number 4,946,800
- Issue date Aug 7, 1990
- Chou H. Li
- C30 - CRYSTAL GROWTH
Information Patent Grant
Method for forming SOI film
- Patent number 4,874,718
- Issue date Oct 17, 1989
- Mitsubishi Denki Kabushiki Kaisha
- Yasuo Inoue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for making a double wafer moated signal processor
- Patent number 4,784,970
- Issue date Nov 15, 1988
- Grumman Aerospace Corporation
- Allen L. Solomon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making field oxide region with self-aligned channel stop...
- Patent number 4,682,408
- Issue date Jul 28, 1987
- Matsushita Electronics Corporation
- Koji Takebayashi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar void free isolation structure
- Patent number 4,680,614
- Issue date Jul 14, 1987
- Klaus D. Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and manufacturing method
- Patent number 4,677,456
- Issue date Jun 30, 1987
- Raytheon Company
- Wolfgang M. Feist
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for dielectrically isolated semiconductor structure
- Patent number 4,649,630
- Issue date Mar 17, 1987
- Motorola, Inc.
- Bernard W. Boland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a recessed semiconductor device
- Patent number 4,642,880
- Issue date Feb 17, 1987
- Kabushiki Kaisha Toshiba
- Yoshihisa Mizutani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an integrated circuit structure with self-aligned...
- Patent number 4,641,416
- Issue date Feb 10, 1987
- Advanced Micro Devices, Inc.
- Ali Iranmanesh
- H01 - BASIC ELECTRIC ELEMENTS

Isolated-integrated

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Vertical transistor having top and bottom surface isolation

Method of fabricating integrated circuits with oxidized isolation

Damascene isolation of CMOS transistors

Fabrication of semiconductor structure having two levels of buried...

Semiconductor structure having two levels of buried regions

Zener diodes on the same wafer with BiCDMOS structures

Method for manufacturing dielectrics dividing wafer with isolated r...

Isolated DMOS IC technology

BICDMOS structures

BiCDMOS structure

Method of making BiCDMOS structures

Dielectrics dividing wafer

Method for forming a BiCDMOS

Method of forming high speed, high voltage fully isolated bipolar t...

Method of forming a vertical transistor

Complementary, isolated DMOS IC technology

Method for fabricating a high voltage MOS transistor

Semiconductor device and method of manufacturing the same

Method of making a high breakdown active device structure with low...

Method for making solid state device utilizing ion implantation tec...

Method of forming crystal array

Method for making solid-state device utilizing isolation grooves

Method for forming SOI film

Process for making a double wafer moated signal processor

Method for making field oxide region with self-aligned channel stop...

Planar void free isolation structure

Semiconductor structure and manufacturing method

Process for dielectrically isolated semiconductor structure

Method for manufacturing a recessed semiconductor device

Method of making an integrated circuit structure with self-aligned...