Passive alignment, i.e. self alignment

Industry

CPC
H01L2224/80143

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/80143Passive alignment, i.e. self alignment

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Dimension compensation control for directly bonded structures
- Patent number 12,009,338
- Issue date Jun 11, 2024
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Guilian Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light emitting element and display device including the same and me...
- Patent number 11,955,468
- Issue date Apr 9, 2024
- Samsung Display Co., Ltd.
- Yunku Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor interconnect structures with vertically offset bondin...
- Patent number 11,942,444
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Kyle K. Kirby
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor interconnect structures with vertically offset bondin...
- Patent number 11,587,895
- Issue date Feb 21, 2023
- Micron Technology, Inc.
- Kyle K. Kirby
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of transferring a plurality of micro light emitting diodes t...
- Patent number 11,387,212
- Issue date Jul 12, 2022
- BOE Technology Group Co., Ltd.
- Guan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip package structure and method for forming the same
- Patent number 11,056,459
- Issue date Jul 6, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chih-Hang Tung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Automatic registration between circuit dies and interconnects
- Patent number 10,971,468
- Issue date Apr 6, 2021
- 3M Innovative Properties Company
- Ankit Mahajan
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for bonding semiconductor chips to a landing wafer
- Patent number 10,797,016
- Issue date Oct 6, 2020
- Imec VZW
- Vikas Dubey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for direct bonding with self-alignment using ultrasound
- Patent number 10,438,921
- Issue date Oct 8, 2019
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Frank Fournel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device containing self-aligned interlockin...
- Patent number 10,381,322
- Issue date Aug 13, 2019
- SanDisk Technologies LLC
- Yasunobu Azuma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for wafer-level semiconductor die attachment
- Patent number 10,217,718
- Issue date Feb 26, 2019
- Denselight Semiconductors Pte Ltd
- Yee Loy Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip arranging method
- Patent number 9,806,057
- Issue date Oct 31, 2017
- Disco Corporation
- Kazuma Sekiya
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for aligning micro-electronic components
- Patent number 9,601,459
- Issue date Mar 21, 2017
- Imec VZW
- Vikas Dubey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for disposing fine objects, apparatus for arranging fine obj...
- Patent number 9,181,630
- Issue date Nov 10, 2015
- Sharp Kabushiki Kaisha
- Akihide Shibata
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Chip-on-wafer bonding method and bonding device, and structure comp...
- Patent number 9,142,532
- Issue date Sep 22, 2015
- BONDTECH CO., LTD.
- Tadatomo Suga
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Magnet assisted alignment method for wafer bonding and wafer level...
- Patent number 9,012,265
- Issue date Apr 21, 2015
- Ge Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-assembly of chips on a substrate
- Patent number 8,642,391
- Issue date Feb 4, 2014
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Lea Di Cioccio
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DIMENSION COMPENSATION CONTROL FOR DIRECTLY BONDED STRUCTURES
- Publication number 20240312953
- Publication date Sep 19, 2024
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Guilian Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR INTERCONNECT STRUCTURES WITH VERTICALLY OFFSET BONDIN...
- Publication number 20240222300
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Kyle K. Kirby
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE BONDING SYSTEM AND METHOD FOR SUBSTRATE BONDING
- Publication number 20240014153
- Publication date Jan 11, 2024
- TOKYO ELECTRON LIMITED
- Takashi FUJIBAYASHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D-STACKED SEMICONDUCTOR DEVICE WITH IMPROVED ALIGNMENT USING CARRI...
- Publication number 20230275063
- Publication date Aug 31, 2023
- Samsung Electronic Co., Ltd.
- Byounghak HONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING JOINT PORTION BETWEEN CONDUCTIVE CON...
- Publication number 20230260956
- Publication date Aug 17, 2023
- SK HYNIX INC.
- Mir IM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR INTERCONNECT STRUCTURES WITH VERTICALLY OFFSET BONDIN...
- Publication number 20230197656
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Kyle K. Kirby
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION, HATCHING, AND OTHER SURFACE PATTERNS IN DIELECTRIC SU...
- Publication number 20230060594
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Kyle K. Kirby
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR INTERCONNECT STRUCTURES WITH VERTICALLY OFFSET BONDIN...
- Publication number 20220344294
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Kyle K. Kirby
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE STRUCTURE WITH REDISTRIBUTION LAYER HAVING BONDING POR...
- Publication number 20210335750
- Publication date Oct 28, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hang TUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF TRANSFERRING A PLURALITY OF MICRO LIGHT EMITTING DIODES T...
- Publication number 20210335752
- Publication date Oct 28, 2021
- BOE TECHNOLOGY GROUP CO., LTD.
- Guan Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIMENSION COMPENSATION CONTROL FOR DIRECTLY BONDED STRUCTURES
- Publication number 20210296282
- Publication date Sep 23, 2021
- INVENSAS BONDING TECHNOLOGIES, INC.
- Guilian GAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LIGHT EMITTING ELEMENT AND DISPLAY DEVICE INCLUDING THE SAME AND ME...
- Publication number 20210035962
- Publication date Feb 4, 2021
- SAMSUNG DISPLAY CO., LTD.
- Yunku JUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20200058614
- Publication date Feb 20, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Hang TUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMISSIVE LED DISPLAY DEVICE MANUFACTURING METHOD
- Publication number 20180301433
- Publication date Oct 18, 2018
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Ivan-Christophe Robin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR DIRECT BONDING WITH SELF-ALIGNMENT USING ULTRASOUND
- Publication number 20180218997
- Publication date Aug 2, 2018
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Frank FOURNEL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Magnet Assisted Alignment Method for Wafer Bonding and Wafer Level...
- Publication number 20130252375
- Publication date Sep 26, 2013
- Ge Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR DISPOSING FINE OBJECTS, APPARATUS FOR ARRANGING FINE OBJ...
- Publication number 20130168708
- Publication date Jul 4, 2013
- Sharp Kabushiki Kaisha
- Akihide Shibata
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Application
ASSEMBLY OF SEMICONDUCTOR CHIPS/WAFERS
- Publication number 20110086468
- Publication date Apr 14, 2011
- Yacine Felk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ASSEMBLY OF CHIPS ON A SUBSTRATE
- Publication number 20110033976
- Publication date Feb 10, 2011
- COMMISS. A L'ENERGIE ATOM ET AUX ENERG ALTERNA
- Lea Di Cioccio
- H01 - BASIC ELECTRIC ELEMENTS

Passive alignment, i.e. self alignment

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Dimension compensation control for directly bonded structures

Light emitting element and display device including the same and me...

Semiconductor interconnect structures with vertically offset bondin...

Semiconductor interconnect structures with vertically offset bondin...

Method of transferring a plurality of micro light emitting diodes t...

Chip package structure and method for forming the same

Automatic registration between circuit dies and interconnects

Method for bonding semiconductor chips to a landing wafer

Method for direct bonding with self-alignment using ultrasound

Three-dimensional memory device containing self-aligned interlockin...

Method for wafer-level semiconductor die attachment

Chip arranging method

Method for aligning micro-electronic components

Method for disposing fine objects, apparatus for arranging fine obj...

Chip-on-wafer bonding method and bonding device, and structure comp...

Magnet assisted alignment method for wafer bonding and wafer level...

Self-assembly of chips on a substrate

Patents Applicationslast 30 patents

DIMENSION COMPENSATION CONTROL FOR DIRECTLY BONDED STRUCTURES

SEMICONDUCTOR INTERCONNECT STRUCTURES WITH VERTICALLY OFFSET BONDIN...

SUBSTRATE BONDING SYSTEM AND METHOD FOR SUBSTRATE BONDING

3D-STACKED SEMICONDUCTOR DEVICE WITH IMPROVED ALIGNMENT USING CARRI...

SEMICONDUCTOR DEVICE INCLUDING JOINT PORTION BETWEEN CONDUCTIVE CON...

SEMICONDUCTOR INTERCONNECT STRUCTURES WITH VERTICALLY OFFSET BONDIN...

CASTELLATION, HATCHING, AND OTHER SURFACE PATTERNS IN DIELECTRIC SU...

SEMICONDUCTOR INTERCONNECT STRUCTURES WITH VERTICALLY OFFSET BONDIN...

CHIP PACKAGE STRUCTURE WITH REDISTRIBUTION LAYER HAVING BONDING POR...

METHOD OF TRANSFERRING A PLURALITY OF MICRO LIGHT EMITTING DIODES T...

DIMENSION COMPENSATION CONTROL FOR DIRECTLY BONDED STRUCTURES

LIGHT EMITTING ELEMENT AND DISPLAY DEVICE INCLUDING THE SAME AND ME...

CHIP PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

EMISSIVE LED DISPLAY DEVICE MANUFACTURING METHOD

METHOD FOR DIRECT BONDING WITH SELF-ALIGNMENT USING ULTRASOUND

Magnet Assisted Alignment Method for Wafer Bonding and Wafer Level...

METHOD FOR DISPOSING FINE OBJECTS, APPARATUS FOR ARRANGING FINE OBJ...

ASSEMBLY OF SEMICONDUCTOR CHIPS/WAFERS

SELF-ASSEMBLY OF CHIPS ON A SUBSTRATE