Superlattice

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CPC
Y10S148/16

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

Current Industry

Y10S148/16Superlattice

Industries

Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional integrated circuits with protection layers
- Patent number 8,405,225
- Issue date Mar 26, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Three-dimensional integrated circuits with protection layers
- Patent number 8,148,826
- Issue date Apr 3, 2012
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chen-Hua Yu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Three-dimensional integrated circuits with protection layers
- Patent number 8,053,277
- Issue date Nov 8, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Three-dimensional integrated circuits with protection layers
- Patent number 7,812,459
- Issue date Oct 12, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
SixSnyGe1-x-y and related alloy heterostructures based on Si, Ge an...
- Patent number 7,598,513
- Issue date Oct 6, 2009
- Arizona Board of Regents, Acting for and on Behalf of Arizona State Universit...
- John Kouvetakis
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Forming a plurality of thin-film devices
- Patent number 7,195,950
- Issue date Mar 27, 2007
- Hewlett-Packard Development Company, L.P.
- Carl Philip Taussig
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional processor using transferred thin film circuits
- Patent number 6,624,046
- Issue date Sep 23, 2003
- Kopin Corporation
- Paul M. Zavracky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active matrix display device including a transistor
- Patent number 6,476,447
- Issue date Nov 5, 2002
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Dual gate oxide process for deep submicron ICS
- Patent number 6,358,819
- Issue date Mar 19, 2002
- LSI Logic Corporation
- Gail D. Shelton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating different gate oxide thicknesses within the...
- Patent number 6,335,262
- Issue date Jan 1, 2002
- International Business Machines Corporation
- Scott W. Crowder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film transistor having a multi-layer stacked channel and its m...
- Patent number 6,291,863
- Issue date Sep 18, 2001
- Hyundai Electronics Industries Co., Ltd.
- Ha Hyoung Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming semiconductor devices using gate insulator thickn...
- Patent number 6,228,663
- Issue date May 8, 2001
- Advanced Micro Devices, Inc.
- Mark I. Gardner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafer evaluation method
- Patent number 6,225,137
- Issue date May 1, 2001
- Oki Electric Industry Co., Ltd.
- Liu Guo Lin
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for preventing chip breakage during semiconduc...
- Patent number 6,171,873
- Issue date Jan 9, 2001
- International Business Machines Corporation
- Ronald Lee Mendelson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Insulation layer structure and method for making the same
- Patent number 6,150,220
- Issue date Nov 21, 2000
- Hyundai Electronics Industries Co., Ltd.
- Yun-Jun Huh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Active matrix display device
- Patent number 6,147,375
- Issue date Nov 14, 2000
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method for manufacturing a polysilicon TFT with a variable thicknes...
- Patent number 6,124,153
- Issue date Sep 26, 2000
- SamSung Electronics Co., Ltd.
- Joo-hyung Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sensitive technique for metal-void detection
- Patent number 6,100,101
- Issue date Aug 8, 2000
- Advanced Micro Devices Inc.
- Amit P. Marathe
- G01 - MEASURING TESTING
Information Patent Grant
Method for manufacturing mixed-mode devices
- Patent number 6,037,201
- Issue date Mar 14, 2000
- United Microelectronics Corp.
- Meng-Jin Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked devices
- Patent number 6,020,250
- Issue date Feb 1, 2000
- International Business Machines Corporation
- Donald McAlpine Kenney
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming SRAM cells and pairs of field effect transistors
- Patent number 5,989,946
- Issue date Nov 23, 1999
- Micron Technology, Inc.
- Jeffrey W. Honeycutt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional processor using transferred thin film circuits
- Patent number 5,976,953
- Issue date Nov 2, 1999
- Kopin Corporation
- Paul M. Zavracky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafer evaluating method and semiconductor device manu...
- Patent number 5,946,543
- Issue date Aug 31, 1999
- Mitsubishi Denki Kabushiki
- Yasuhiro Kimura
- G01 - MEASURING TESTING
Information Patent Grant
Method of fabricating a static random access memory
- Patent number 5,943,566
- Issue date Aug 24, 1999
- United Semiconductor Corp.
- Jyh-Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating shallow trench isolation structure
- Patent number 5,937,309
- Issue date Aug 10, 1999
- United Semiconductor Corp.
- Shu-Ya Chuang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress migration evaluation method
- Patent number 5,930,587
- Issue date Jul 27, 1999
- Lucent Technologies
- Vivian W. Ryan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a silicon nitride layer
- Patent number 5,907,792
- Issue date May 25, 1999
- Motorola,Inc.
- Ravi Droopad
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor integrated circuit using monolayer epitaxial growth
- Patent number 5,905,297
- Issue date May 18, 1999
- Fujitsu Limited
- Toshihiko Mori
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method and apparatus for preventing chip breakage during semiconduc...
- Patent number 5,888,838
- Issue date Mar 30, 1999
- International Business Machines Corporation
- Ronald Lee Mendelson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method for horizontal direction semiconductor PN juncti...
- Patent number 5,882,950
- Issue date Mar 16, 1999
- Korea Institute of Science and Technology
- Suk-Ki Min
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Three-Dimensional Integrated Circuits with Protection Layers
- Publication number 20120187576
- Publication date Jul 26, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL INTEGRATED CIRCUITS WITH PROTECTION LAYERS
- Publication number 20120032348
- Publication date Feb 9, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-Dimensional Integrated Circuits with Protection Layers
- Publication number 20100330743
- Publication date Dec 30, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-dimensional integrated circuits with protection layers
- Publication number 20080142990
- Publication date Jun 19, 2008
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sixsnyge1-x-y and related alloy heterostructures based on si, ge an...
- Publication number 20060163612
- Publication date Jul 27, 2006
- ARIZONA BOARD OF REGENTS
- John Kouvetakis
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Forming a plurality of thin-film devices
- Publication number 20060019504
- Publication date Jan 26, 2006
- Carl Philip Taussig
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for fabricating different gate oxide thickness within the sa...
- Publication number 20030094660
- Publication date May 22, 2003
- Scott W. Crowder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual gate oxide process for deep submicron ICS
- Publication number 20020058382
- Publication date May 16, 2002
- Gail D. Shelton
- H01 - BASIC ELECTRIC ELEMENTS

Superlattice

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Three-dimensional integrated circuits with protection layers

Three-dimensional integrated circuits with protection layers

Three-dimensional integrated circuits with protection layers

Three-dimensional integrated circuits with protection layers

SixSnyGe1-x-y and related alloy heterostructures based on Si, Ge an...

Forming a plurality of thin-film devices

Three dimensional processor using transferred thin film circuits

Active matrix display device including a transistor

Dual gate oxide process for deep submicron ICS

Method for fabricating different gate oxide thicknesses within the...

Thin film transistor having a multi-layer stacked channel and its m...

Method of forming semiconductor devices using gate insulator thickn...

Semiconductor wafer evaluation method

Method and apparatus for preventing chip breakage during semiconduc...

Insulation layer structure and method for making the same

Active matrix display device

Method for manufacturing a polysilicon TFT with a variable thicknes...

Sensitive technique for metal-void detection

Method for manufacturing mixed-mode devices

Stacked devices

Method of forming SRAM cells and pairs of field effect transistors

Three dimensional processor using transferred thin film circuits

Semiconductor wafer evaluating method and semiconductor device manu...

Method of fabricating a static random access memory

Method for fabricating shallow trench isolation structure

Stress migration evaluation method

Method of forming a silicon nitride layer

Semiconductor integrated circuit using monolayer epitaxial growth

Method and apparatus for preventing chip breakage during semiconduc...

Fabrication method for horizontal direction semiconductor PN juncti...

Patents Applicationslast 30 patents

Three-Dimensional Integrated Circuits with Protection Layers

THREE-DIMENSIONAL INTEGRATED CIRCUITS WITH PROTECTION LAYERS

Three-Dimensional Integrated Circuits with Protection Layers

Three-dimensional integrated circuits with protection layers

Sixsnyge1-x-y and related alloy heterostructures based on si, ge an...

Forming a plurality of thin-film devices

Method for fabricating different gate oxide thickness within the sa...

Dual gate oxide process for deep submicron ICS