the bonding area being disposed in a recess of the surface of the body

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

Current Industry

H01L2224/08111the bonding area being disposed in a recess of the surface of the body

Industries

Patents Grantslast 30 patents

Information Patent Grant
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Information Patent Grant
Method of forming package structure
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- Issue date Nov 14, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jing-Cheng Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging mechanisms for dies with different sizes of connectors
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- Issue date Nov 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hua Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of forming same
- Patent number 11,342,309
- Issue date May 24, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual-interface IC card module
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- Issue date Jan 11, 2022
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- Christian Zenz
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Information Patent Grant
Method of forming package structure
- Patent number 11,164,852
- Issue date Nov 2, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jing-Cheng Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device, manufacturing method, and solid-state imaging...
- Patent number 11,018,110
- Issue date May 25, 2021
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Akiko Hirata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging mechanisms for dies with different sizes of connectors
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- Issue date Mar 30, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hua Chen
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Information Patent Grant
Method and structure of three-dimensional chip stacking
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- Issue date Dec 15, 2020
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- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device for bonding conductive layers exposed from sur...
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- Issue date Nov 17, 2020
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Information Patent Grant
Semiconductor packages and methods of forming same
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- Issue date Jul 14, 2020
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Increased contact alignment tolerance for direct bonding
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- Issue date Mar 31, 2020
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Information Patent Grant
Method and structure of three-dimensional chip stacking
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- Issue date Dec 24, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
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Information Patent Grant
Dual-interface IC card module
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- Issue date Oct 29, 2019
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Information Patent Grant
Package structure and method of forming thereof
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- Issue date Feb 12, 2019
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device having a redistribution area
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- Issue date Oct 24, 2017
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- Jeonggi Jin
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Information Patent Grant
Stacked dies with wire bonds and method
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- Issue date Nov 29, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package, fabrication method therefor, and package-on...
- Patent number 9,502,391
- Issue date Nov 22, 2016
- NEPES CO., LTD.
- Yong-Tae Kwon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and stacked semiconductor package having the...
- Patent number 9,070,691
- Issue date Jun 30, 2015
- SK Hynix Inc.
- Jae Sung Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional integrated structure capable of detecting a tempe...
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- Issue date Nov 18, 2014
- STMicroelectronics (Crolles 2) SAS
- Laurent-Luc Chapelon
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor package and stacked semiconductor package having the...
- Patent number 8,823,158
- Issue date Sep 2, 2014
- SK Hynix Inc.
- Jae Sung Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and stacked semiconductor package having the...
- Patent number 8,299,591
- Issue date Oct 30, 2012
- Hynix Semiconductor Inc.
- Jae Sung Oh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
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Information Patent Application
HEATSINK FOR RING TYPE INTEGRATED CIRCUITS
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Information Patent Application
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
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- Publication date Dec 21, 2023
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- Chen-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW TEMPERATURE DIRECT BONDING
- Publication number 20230361074
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- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EXPANSION CONTROL FOR BONDING
- Publication number 20230299029
- Publication date Sep 21, 2023
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Jeremy Alfred Theil
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE STRUCTURE WITH WETTABLE SIDE SURFACE AND MANUFACTURING METH...
- Publication number 20220392862
- Publication date Dec 8, 2022
- Zhuhai ACCESS Semiconductor Co., Ltd
- Xianming CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Packages and Methods of Forming Same
- Publication number 20220285323
- Publication date Sep 8, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20220208649
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- Samsung Electronics Co., Ltd.
- Seungyeol Oh
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Packaging Mechanisms for Dies with Different Sizes of Connectors
- Publication number 20210217672
- Publication date Jul 15, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Hua Chen
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Semiconductor Packages and Methods of Forming Same
- Publication number 20200343224
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- Chen-Hua Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Producing a Connection Between Component Parts, and Comp...
- Publication number 20200294962
- Publication date Sep 17, 2020
- OSRAM OLED GmbH
- Simeon Katz
- H01 - BASIC ELECTRIC ELEMENTS
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SEMICONDUCTOR DEVICE FOR BONDING CONDUCTIVE LAYERS EXPOSED FROM SUR...
- Publication number 20200126941
- Publication date Apr 23, 2020
- Toshiba Memory Corporation
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Information Patent Application
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD, AND SOLID-STATE IMAGING...
- Publication number 20200035643
- Publication date Jan 30, 2020
- Sony Semiconductor Solutions Corporation
- AKIKO HIRATA
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DUAL-INTERFACE IC CARD MODULE
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- Publication date Nov 21, 2019
- NXP B.V.
- CHRISTIAN ZENZ
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Information Patent Application
PACKAGE STRUCTURE AND METHOD OF FORMING THEREOF
- Publication number 20180151546
- Publication date May 31, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jing-Cheng LIN
- H01 - BASIC ELECTRIC ELEMENTS
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DUAL-INTERFACE IC CARD MODULE
- Publication number 20170092612
- Publication date Mar 30, 2017
- NXP B.V.
- Christian Zenz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20170084589
- Publication date Mar 23, 2017
- MEDIATEK INC.
- Che-Hung KUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE HAVING A REDISTRIBUTION AREA
- Publication number 20170053882
- Publication date Feb 23, 2017
- Samsung Electronics Co., Ltd.
- Jeonggi Jin
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Method of Manufacturing Semiconductor Device and Semiconductor Device
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- RENESAS ELECTRONICS CORPORATION
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SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
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- Kazuya ASAOKA
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Stacked Dies With Wire Bonds and Method
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- Taiwan Semiconductor Manufacturing Company, Ltd.
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- H01 - BASIC ELECTRIC ELEMENTS
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- NEPES CO., LTD.
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- SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
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SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE...
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- Publication date Nov 13, 2014
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- H01 - BASIC ELECTRIC ELEMENTS
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THREE-DIMENSIONAL INTEGRATED STRUCTURE CAPABLE OF DETECTING A TEMPE...
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- Laurent-Luc Chapelon
- G01 - MEASURING TESTING
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SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE...
- Publication number 20130026651
- Publication date Jan 31, 2013
- Hynix Semiconductor Inc.
- Jae Sung OH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE...
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- Publication date Mar 25, 2010
- Jae Sung OH
- H01 - BASIC ELECTRIC ELEMENTS

the bonding area being disposed in a recess of the surface of the body

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method for producing a connection between component parts, and comp...

Method of forming package structure

Packaging mechanisms for dies with different sizes of connectors

Semiconductor packages and methods of forming same

Dual-interface IC card module

Method of forming package structure

Semiconductor device, manufacturing method, and solid-state imaging...

Packaging mechanisms for dies with different sizes of connectors

Method and structure of three-dimensional chip stacking

Semiconductor device for bonding conductive layers exposed from sur...

Semiconductor packages and methods of forming same

Increased contact alignment tolerance for direct bonding

Method and structure of three-dimensional chip stacking

Dual-interface IC card module

Package structure and method of forming thereof

Electronic device having a redistribution area

Stacked dies with wire bonds and method

Semiconductor package, fabrication method therefor, and package-on...

Semiconductor package and stacked semiconductor package having the...

Three-dimensional integrated structure capable of detecting a tempe...

Semiconductor package and stacked semiconductor package having the...

Semiconductor package and stacked semiconductor package having the...

Patents Applicationslast 30 patents

SEMICONDUCTOR STRUCTURE

HEATSINK FOR RING TYPE INTEGRATED CIRCUITS

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

LOW TEMPERATURE DIRECT BONDING

EXPANSION CONTROL FOR BONDING

PACKAGE STRUCTURE WITH WETTABLE SIDE SURFACE AND MANUFACTURING METH...

Semiconductor Packages and Methods of Forming Same

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Packaging Mechanisms for Dies with Different Sizes of Connectors

Semiconductor Packages and Methods of Forming Same

Method for Producing a Connection Between Component Parts, and Comp...

SEMICONDUCTOR DEVICE FOR BONDING CONDUCTIVE LAYERS EXPOSED FROM SUR...

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD, AND SOLID-STATE IMAGING...

DUAL-INTERFACE IC CARD MODULE

PACKAGE STRUCTURE AND METHOD OF FORMING THEREOF

DUAL-INTERFACE IC CARD MODULE

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

ELECTRONIC DEVICE HAVING A REDISTRIBUTION AREA

Method of Manufacturing Semiconductor Device and Semiconductor Device

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

Stacked Dies With Wire Bonds and Method

SEMICONDUCTOR PACKAGE, FABRICATION METHOD THEREFOR, AND PACKAGE-ON...

ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHO...

PACKAGE ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME

SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE...

THREE-DIMENSIONAL INTEGRATED STRUCTURE CAPABLE OF DETECTING A TEMPE...

SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE...

SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE...