BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings:
FIG. 1 shows a schematic view of the invention with two source modules with two angular adjustments of the reflector arrangement;
FIG. 2 shows a schematic diagram illustrating the wafer exposure in semiconductor lithography;
FIG. 3 shows a construction of the invention with two source modules, an auxiliary laser beam and two position-sensitive detectors;
FIG. 4 shows the exposure schedule for a 300-mm wafer in an arrangement with three source modules;
FIG. 5 shows the EUV source modules and rotary mirror controlled by control signals of the exposure system and position-sensitive detectors; and
FIG. 6 shows a construction of the invention with an auxiliary mirror and monitoring detector for additional source module testing in a passive circuit.