Embodiments of the present description generally relate to the field of microelectronic device fabrication and, more particularly, to the formation of seed layers for the fabrication of interconnects in integrated circuits.
The subject matter of the present disclosure is particularly pointed out and distinctly claimed in the concluding portion of the specification. The foregoing and other features of the present disclosure will become more fully apparent from the following description and appended claims, taken in conjunction with the accompanying drawings. It is understood that the accompanying drawings depict only several embodiments in accordance with the present disclosure and are, therefore, not to be considered limiting of its scope. The disclosure will be described with additional specificity and detail through use of the accompanying drawings, such that the advantages of the present disclosure can be more readily ascertained, in which:
In the following detailed description, reference is made to the accompanying drawings that show, by way of illustration, specific embodiments in which the claimed subject matter may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the subject matter. It is to be understood that the various embodiments, although different, are not necessarily mutually exclusive. For example, a particular feature, structure, or characteristic described herein, in connection with one embodiment, may be implemented within other embodiments without departing from the spirit and scope of the claimed subject matter. In addition, it is to be understood that the location or arrangement of individual elements within each disclosed embodiment may be modified without departing from the spirit and scope of the claimed subject matter. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the subject matter is defined only by the appended claims, appropriately interpreted, along with the full range of equivalents to which the appended claims are entitled. In the drawings, like numerals refer to the same or similar elements or functionality throughout the several views, and that elements depicted therein are not necessarily to scale with one another, rather individual elements may be enlarged or reduced in order to more easily comprehend the elements in the context of the present description.
Embodiments of the present description generally relate to the field of microelectronic device fabrication and, more particularly, to the formation of copper-containing seed layers for the fabrication of interconnects in integrated circuits. The copper-containing seed layer may be formed in an atomic layer deposition process with a copper pre-cursor and organometallic co-reagent.
The substrate 112 may be a silicon-containing material wherein the exposed substrate portion 108 corresponds to a circuit component (not shown) formed in the substrate 112 or may be a conductive trace, which may be made of copper, aluminum, silver, gold, and the like, as well as alloys thereof. In one embodiment, the substrate 112 is a copper trace. The first barrier layer 106 may be an etch stop layer, such as silicon carbide, silicon nitride, silicon oxycarbide, silicon oxycarbonitride, and the like. The dielectric material layer 104 may include, but is not limited to, interlayer dielectrics such as silicon dioxide, carbon-doped silicon dioxides, polymer-based materials (e.g. fluorocarbons, hydrocarbons), and low-k, carbon rich dielectrics.
As shown in
Excess copper pre-cursor may then be removed with a purge gas, as shown in step 220. As shown in step 230, the monolayer may be exposed to an organometallic co-reagent (shown as MR2 in
As shown in step 240 for
The organometallic co-reagent may be any appropriate co-reagent, including but not limited to homoleptic (i.e. all ligands (functional groups) are identical) or heteroleptic organomanganese, organoaluminum, organomagnesium, organozinc, or organotin compounds. The organometallic compounds may include, but are not limited to, alkyl groups, alkenyl groups, alkynyl groups, and the like. The co-reagent compounds may include, but are not limited to the compounds illustrated in Table 2. In Table 2, M may be zinc, magnesium, or manganese and R1, R2, R3, and R4 may represent a generic organic substituent or hydrogen. The substitution pattern may arise from any combination, where R1=R2=R3=R4, or where R1≠R2≠R3≠R4, or any permissible combination therebetween.
As shown in step 250 of
In one embodiment, where the copper-containing seed layer 122 is formed from the unstable organocopper intermediate, the copper-containing seed layer 122 may have a total combined impurity content of less than about 1% (atomic). In one embodiment, where the copper-containing seed layer 122 is formed form the unstable organocopper alloy intermediate, the concentration of alloy metal (e.g., manganese, aluminum, magnesium, zinc, or tin) may be between about 1% and 5% atomic.
It is understood that steps 210 through 260 may be repeated in the same sequence in multiple cycles to build a desired thickness for the copper-containing seed layer 122 (see
It is also understood that the first intermediate substrate 110 of
As illustrated in
In one embodiment, the copper pre-cursor (shown as CuL2 in
The use of the ALD process of the present description to form the copper-containing seed layer 122 allows a controlled thin film deposition and, by its nature, is highly uniform and conformal over three-dimensional structures, and, thus, may circumvent the limitations of current physical vapor deposition copper seed layer formation processes caused by the directional nature of physical vapor deposition, which may result in difficulties in uniformly depositing material at the bottom and on the sidewalls of high aspect ratio features, as will be understood to those skilled in the art. In one embodiment, the atomic layer deposition may be performed at a relatively low temperature between about 20° C. and 150° C. Having low substrate temperatures and the lack of plasma co-reagents (as are necessary in physical vapor deposition methods) may enable the formation of more conformal seed layers and may eliminate plasma damage to dielectric layers, particularly low-k dielectrics.
As shown in
In an embodiment of the present description, an interconnect barrier layer 132 may be formed between the copper-containing seed layer 122 and the dielectric material layer 104, as shown in
In an embodiment of the present description, an interconnect barrier layer may be self-formed, as illustrated in
It is also understood that the subject matter of the present description is not necessarily limited to specific applications illustrated in
The detailed description has described various embodiments of the devices and/or processes through the use of illustrations, block diagrams, flowcharts, and/or examples. Insofar as such illustrations, block diagrams, flowcharts, and/or examples contain one or more functions and/or operations, it will be understood by those skilled in the art that each function and/or operation within each illustration, block diagram, flowchart, and/or example can be implemented, individually and/or collectively, by a wide range of hardware, software, firmware, or virtually any combination thereof.
The described subject matter sometimes illustrates different components contained within, or connected with, different other components. It is understood that such illustrations are merely exemplary, and that many alternate structures can be implemented to achieve the same functionality. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively “associated” such that the desired functionality is achieved. Thus, any two components herein combined to achieve a particular functionality can be seen as “associated with” each other such that the desired functionality is achieved, irrespective of structures or intermediate components. Likewise, any two components so associated can also be viewed as being “operably connected”, or “operably coupled”, to each other to achieve the desired functionality, and any two components capable of being so associated can also be viewed as being “operably couplable”, to each other to achieve the desired functionality. Specific examples of operably couplable include but are not limited to physically mateable and/or physically interacting components and/or wirelessly interactable and/or wirelessly interacting components and/or logically interacting and/or logically interactable components.
It will be understood by those skilled in the art that terms used herein, and especially in the appended claims are generally intended as “open” terms. In general, the terms “including” or “includes” should be interpreted as “including but not limited to” or “includes but is not limited to”, respectively. Additionally, the term “having” should be interpreted as “having at least”.
The use of plural and/or singular terms within the detailed description can be translated from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or the application.
It will be further understood by those skilled in the art that if an indication of the number of elements is used in a claim, the intent for the claim to be so limited will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. Additionally, if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should typically be interpreted to mean “at least” the recited number.
The use of the terms “an embodiment,” “one embodiment,” “some embodiments,” “another embodiment,” or “other embodiments” in the specification may mean that a particular feature, structure, or characteristic described in connection with one or more embodiments may be included in at least some embodiments, but not necessarily in all embodiments. The various uses of the terms “an embodiment,” “one embodiment,” “another embodiment,” or “other embodiments” in the detailed description are not necessarily all referring to the same embodiments.
While certain exemplary techniques have been described and shown herein using various methods and systems, it should be understood by those skilled in the art that various other modifications may be made, and equivalents may be substituted, without departing from claimed subject matter or spirit thereof. Additionally, many modifications may be made to adapt a particular situation to the teachings of claimed subject matter without departing from the central concept described herein. Therefore, it is intended that claimed subject matter not be limited to the particular examples disclosed, but that such claimed subject matter also may include all implementations falling within the scope of the appended claims, and equivalents thereof.