Patent Application
20120298409
CROSS-REFERENCE TO RELATED PATENT APPLICATION
This application claims priority from Korean Patent Application No. 10-2011-0048500, filed on May 23, 2011, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.
1. Field
Apparatuses and methods consistent with exemplary embodiments relate to a circuit board and manufacturing the same.
2. Description of the Related Art
A circuit board used in a small electronic device such as a cellular phone or a smart phone is required to get smaller. As a solution, a circuit board having a fine circuit pattern formed thereon has developed.
In order to form the fine circuit pattern on the circuit board, an etching process and a semi-additive process are used.
The etching process is a process of forming a circuit pattern by etching a copper layer formed on a substrate which is a general process used to manufacture circuit boards.
A semi-additive process is a process of forming a circuit pattern by using plating which is often used to remedy shortcomings of the etching process.
In such semi-additive process, a copper plating layer is formed on a prepreg. A predetermined level of peel strength needs to be applied between the prepreg and the copper plating layer. For a prepreg used for a semi-additive process, contents of an epoxy resin and silica fillers are increased. Such a prepreg only used for a semi-additive process is expensive, thereby increasing circuit board manufacturing costs.
One or more exemplary embodiments may overcome the above disadvantages and other disadvantages not described above. However, it is understood that one or more exemplary embodiment are not required to overcome the disadvantages described above, and may not overcome any of the problems described above.
One or more exemplary embodiments provide a method of manufacturing a circuit board which uses a common prepreg and increases a peel strength between the prepreg and a copper plating layer by increasing a surface area of the prepreg.
One or more exemplary embodiments also provide a circuit board which uses a common prepreg and increases a surface area of the prepreg.
According to an aspect of an exemplary embodiment, there is provided a method of manufacturing a circuit board, the method including: providing a substrate with a first circuit pattern and a prepreg are sequentially stacked on a top surface of the substrate; forming a plurality of holes on a top surface of the prepreg; removing silica fillers contained in inner walls of the plurality of holes; performing copper plating on the top surface of the prepreg; and forming a second circuit pattern connected to the first circuit pattern on the prepreg.
The providing of the substrate may include: preparing the substrate with the first circuit pattern formed on the top surface of the substrate; sequentially disposing the prepreg and a copper foil on the substrate with the first circuit pattern formed on the top surface of the substrate; compressing the copper foil and the prepreg to the substrate; and removing the copper foil.
The copper foil may be a general copper foil, and may be disposed such that a smooth surface of the copper foil adjoins the prepreg. The silica fillers may be removed by using a hydrofluoric acid-containing mixture. After the top surface of the prepreg is swollen, de-smearing may be performed.
The performing of the copper plating may include: forming one or more craters on the top surface of the prepreg to expose some of copper wires included in the first circuit pattern to the outside; forming a seed layer composed of copper by using non-electrolysis means on the prepreg where the one or more holes are formed on the top surface of the prepreg; and forming a copper plating layer on the seed layer by using electrolysis means.
Similarly, a second circuit pattern and a second prepreg may be stacked on a bottom surface of the substrate, and the same processes performed on the first circuit pattern and the first prepreg may be simultaneously performed on the second circuit pattern and the second prepreg to achieve similar results.
According to an aspect of another exemplary embodiment, there is provided a circuit board including: a substrate with a first circuit pattern formed on a top surface of the substrate; a prepreg adhered to the first circuit pattern; a plurality of holes formed on a top surface of the prepreg; and one or more auxiliary holes formed on surfaces of the plurality of holes by removing silica fillers contained in the inner walls of the plurality of holes.
The circuit board may further include: a second circuit pattern formed on a bottom surface of the substrate; a second prepreg adhered to a bottom surface of the second circuit pattern; a plurality of second holes formed on a bottom surface of the second prepreg; and one or more second auxiliary holes formed on surfaces of the plurality of second holes by removing silica fillers contained in the inner walls of the plurality of second holes.
The above and other aspects will become more apparent by describing in detail exemplary embodiments with reference to the attached drawings, in which:
Hereinafter, exemplary embodiments will be described in detail with reference to the attached drawings. In the drawings, the same reference numerals denote the same members.
In the first process 111, a first circuit pattern 221 and a first prepreg 231 are sequentially stacked on a top surface of a substrate 211, and a second circuit pattern 222 and a second prepreg 232 are sequentially stacked on a bottom surface of the substrate 211. The first process 111 is performed by performing the following four steps.
In the first step, referring to
The substrate 211 may be formed of an insulating material through which an electric current does not flow. For example, any one of glass cloths such as FR4 or FR5, an epoxy matrix, and a polyimide-based material can be used. The substrate 211 may also be formed of a polymer material such as poly(methyl methacrylate) or polycarbonate. The substrate 211 may be a printed circuit board (PCB) or a flexible printed circuit board (FPCB).
In order to form the first and second circuit patterns 221 and 222 on the top and bottom surfaces of the substrate 211, conductive layers (not shown) formed of copper or the like are formed on the top and bottom surfaces of the substrate 211. In order to form the first and second circuit patterns 221 and 222 by using the conductive layers, a dry film resist or a photoresist may be applied to the conductive layers. Exposure, developing, and exfoliation using a mask may be performed after applying the dry film resist or the photoresist. When the exposure, developing, and exfoliation are completed, the first and second circuit patterns 221 and 222 are formed. The exposure, developing, and exfoliation are well known and thus a detailed explanation thereof will not be given.
In the second step, referring to
The first and second copper foils 241 and 242 may be common copper foils. In general, a copper foil has one surface which is soft and the other surface which is rougher than the other surface. In the present embodiment, soft surfaces of the first and second copper foils 241 and 242 face the first and second prepregs 231 and 232, and rough surfaces of the copper foils 241 and 242 are exposed to the outside. As such, it is very easy to separate the first and second copper foils 241 and 242 from the first and second prepregs 231 and 232 after the first and second copper foils 241 and 242 are compressed to the first and second prepregs 231 and 232. Also, since the first and second copper foils 241 and 242 are common copper foils, circuit board manufacturing costs are drastically reduced.
The first and second prepregs 231 and 232 each formed of an insulating material, through which electric current does not flow, insulate the first and second circuit patterns 221 and 222. The first and second prepregs 231 and 232 are prepregs commonly used with a multi-layer substrate, instead of being prepregs only used for a semi-additive process. Since prepregs used only in a semi-additive process are expensive, circuit board manufacturing costs are increased. Therefore, according to the exemplary embodiment, the first and second prepregs 231 and 232 are prepregs commonly used in the multi-layer substrate in order to reduce circuit board manufacturing costs.
In the third step, referring to
In the fourth step, referring to
In the second process 121, a plurality of holes 235 are formed in surfaces 231a and 232a of the first and second prepegs 231 and 232. The plurality of holes 235 may be formed by performing de-smearing on the first and second prepregs 231 and 232. The plurality of holes 235 may not have fixed shapes but rather have various shapes as shown in
In order to smoothly perform the de-smearing, swelling may be further performed on the surfaces 231a and 232a of the first and second prepregs 231 and 232. That is, the surfaces 231a and 232a of the first and second prepregs 231 and 232, which are compressed to the substrate 211 and then cured, are swollen, and the swollen portions of the surfaces 231 a and 232a of the first and second prepregs 231 and 232 are removed during the de-smearing, thereby enabling the plurality of holes 235 to be easily formed on the surfaces 231a and 232a of the first and second prepregs 231 and 232. A common technology in this field may be used to swell the first and second prepregs 231 and 232.
In the third process 131, silica fillers 233 contained in inner walls of the plurality of holes 235 are removed. As a result, roughness of the surfaces 231a and 232a of the first and second prepregs 231 and 232 are greatly increased as shown in
The first and second prepregs 231 and 232 which are common prepregs contain the silica fillers 233 which are particles as shown in
In the fourth process 141, copper plating is performed on the surfaces 231a and 232a of the first and second prepregs 231 and 232. The fourth process 141 is performed by performing the following three steps.
In a first step, referring to
In a second step, referring to
In a third step, referring to
In the fifth process 151, third and fourth circuit patterns 281 and 282 in contact with the first and second circuit patterns 221 and 222 are formed on the first and second prepregs 231 and 232. Accordingly, the circuit board 201 according to the present embodiment is completed.
In order to form the third and fourth circuit patterns 281 and 282 on the first and second prepregs 231 and 232, a dry film resist or a photoresist may be applied to the copper plating layers 271 and 272 formed on the first and second prepregs 231 and 232, and exposure, developing, and exfoliation using a mask may be performed. The exposure, developing, and exfoliation are well known and thus a detailed explanation thereof will not be given.
Although the first through fourth circuit patterns 221, 222, 281, and 282 are formed on both surfaces of the circuit board 201 (see
The first circuit pattern 221 is formed on the top surface of the substrate 211, and the first prepreg 231 is adhered to a top surface of the first circuit pattern 221. The plurality of first holes 235 are formed in a top surface of the first prepreg 231, and the single or plurality of auxiliary holes 237 are formed on surfaces of the plurality of first holes 235.
The second circuit pattern 222 is formed on the bottom surface of the substrate 211, and the second prepreg 232 is adhered to a bottom surface of the second circuit pattern 222. The plurality of second holes 235 are formed in a bottom surface of the second prepreg 232, and the single or plurality of auxiliary holes 237 are formed on surfaces of the plurality of second holes 235.
As such, since the plurality of holes 235 are formed on the surfaces 231 a and 232a of the first and second prepregs 231 and 232, and the auxiliary holes 237 are formed by removing the silica fillers 233 contained in the inner walls of the holes 235, surface areas of the first and second prepregs 231 and 232 are greatly increased.
Accordingly, when the copper plating layers 261, 262, 271, and 272 are formed on the surfaces 231a and 232a of the first and second prepregs 231 and 232, a peel strength between the first and second prepregs 231 and 232 and the copper plating layers 261, 262, 271, and 272 is drastically increased, thereby enabling a fine circuit pattern to be formed on the circuit board 201.
Meanwhile, referring to
According to an exemplary embodiment, since common prepregs are adhered to a top surface and a bottom surface of a substrate and a hydrofluoric acid-containing mixture is used when de-smearing is performed on the prepregs, silica fillers contained in the prepregs are removed.
Since the silica fillers contained in the prepregs are removed, surface areas of the prepregs are increased and thus a peel strength between the prepregs and copper plating layers is drastically increased when the copper plating layers are formed on the prepregs.
Since the peel strength between the prepregs and the copper plating layers is drastically increased, a fine circuit pattern may be formed on a circuit board. While exemplary embodiments have been particularly shown and described, it will be understood by one of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present inventive concept as defined by the following claims. The exemplary embodiments should be considered in a descriptive sense only and not for purposes of limitation.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2011-0048500 | May 2011 | KR | national |
