The present disclosure relates to elements of photolithographically manufactured integrated circuits (ICs), and more specifically, to the fabrication of a resistor structure with improved heat dissipation, which may be particularly applicable in higher power and alternating current (AC) applications.
Semiconductor devices, particularly ICs, are manufactured by depositing, patterning, and removing layers of material. Most ICs include resistors, which are typically formed using polysilicon on an insulator material. Typically, such a resistor includes two electrically conductive pads electrically connected by a single resistive element. However, resistors formed in such a manner can be limited in the amount of current that they may carry lest they overheat and degrade or cause other heat-related problems to neighboring structures.
A first aspect of the disclosure is directed to a compound resistor structure for a semiconductor device. A first layer can include a plurality of pads of a first electrically conductive material, the plurality of pads including a first pad, a last pad, and at least one interposed pad. A second layer can include at least two resistive elements of an electrically resistive material, each resistive element extending between and electrically connecting two of the plurality of pads such that the first pad is electrically connected to the last pad through the at least one interposed pad via the at least two resistive elements.
A second aspect of the disclosure includes a method of making a compound resistor structure in a semiconductor device. A plurality of pads can be formed from a layer of a first electrically conductive material. The pads can be spaced apart from each other and can include a first pad, at least one interposed pad, and a last pad. A plurality of resistive elements can also be formed, the plurality of resistive elements electrically connecting the first pad to the last pad via the at least one interposed pad.
A third aspect of the disclosure can include a compound resistor structure in which an array of pads can be formed from a first electrically conductive material. The array can include at least two rows of pads including a first row and a last row, each row including a first end pad at a first end of the respective row and a second end pad at a second end of the respective row opposite the respective first end. A first pad of the array can be a first end pad of the first row, and a last pad of the array being a second end pad of the last row. At least one electrical connector between adjacent rows can electrically connect at least one pad of a row to at least one pad of each adjacent row. A plurality of resistive elements can successively connect the pads of each row such that a first pad in a row is electrically connected to a last pad in a row through at least two of the plurality of resistive elements and at least one pad between the first pad of the respective row and the last pad of the respective row, and such that the first pad of the array is electrically connected to the last pad of the array through the plurality of resistive elements, the array of pads, and the at least one electrical connector.
The foregoing and other features of the disclosure will be apparent from the following more particular description of embodiments of the disclosure.
The embodiments of this disclosure will be described in detail, with reference to the following figures, wherein like designations denote like elements, and wherein:
It is noted that the drawings of the disclosure are not to scale. The drawings are intended to depict only typical aspects of the disclosure, and therefore should not be considered as limiting the scope of the disclosure. In the drawings, like numbering represents like elements between the drawings.
Various examples are disclosed herein of a resistor structure that uses standard materials and processes in new patterns or arrangements to provide resistors with improved heat dissipation. In a simplest form, a typical resistor having two conductive elements bridged by a resistive element is broken into three conductive elements and two resistive elements, which can be arranged in a linear fashion for convenience, but need not be. Also for convenience, each conductive element can be called a pad. Thus, a first end pad, an interposed or middle pad, and a second end pad can be arranged in alignment and spaced apart with a first resistive element electrically connecting the first end pad and the middle pad, and a second resistive element electrically connecting the middle pad and the second end pad. Additional pads and resistive elements can be used for additional capacity in a single line or row, and additional rows can be used and connected to each other for further capacity. To provide tuning of a compound resistor structure according to embodiments, particularly where two or more rows are employed, one or more fuses can be placed to connect corresponding pads of adjacent rows. Each fuse shunts current from one row to the next, and by blowing a fuse, the resistance of the compound resistor structure can be increased. In addition, to provide additional heat dissipation, one or more heat sinks or “bars” can be included adjacent or even interspersed between portions of a compound resistor structure according to embodiments. Such bars can be, for example, electrically isolated elements of the same material or layer used to form the pads. Advantageously, compound resistor structures according to embodiments disclosed herein can be formed using steps easily integrated into middle-end-of-line or back-end-of-line processes, and can include metal gates formed during deposition of a metal layer. With additional heat dissipation, a resistor structure according to embodiments can be operated at higher power than conventional resistor structures. Further, embodiments as disclosed herein can be fabricated using known semiconductor fabrication techniques.
As seen in
More specifically, each resistive element 120 can extend between and electrically connect two pads 110, though each connected pair of pads 110 is not unique. That is, one resistive element 120 can connect first end pad 112 and interposed pad 116, and another resistive element 120 can connect interposed pad 116 and second end pad 114, so that interposed pad 116 is connected to two resistive elements 120. The first pad, first end pad 112, is thereby electrically connected to the last pad, second end pad 114, through interposed pad 116 via resistive elements 120. While pads 110 are here shown as equal in size with equal space between them, this need not be the case, and pads 110 can have varied thickness, length, width, and/or space therebetween if desired and/or appropriate. Further, it should be understood that more pads 110 and resistive elements 120 can be employed to provide a compound resistor 100 with desired electrical and/or thermal properties. In addition, pads 110 and resistive elements 120 need not be arranged in a row, but can be arranged in any shape or pattern as may be suitable or desired, such as, but not limited to, an “L” shape or a polygon, for example.
As particularly shown in
For convenience, rows 410 in
As seen in
The compound resistor structure 400 of
While only one heat sink 750 is shown between each pair of adjacent rows or lines 710, it should be apparent that more than one heat sink 750 could be used, and that the size and arrangement thereof can also be varied as may be desired and/or suitable without departing from the scope of embodiments disclosed herein. Further, while a heat sink 750 is shown adjacent each of the “top” and “bottom” of compound resistor structure 700, more than one can be placed in either location, either can be omitted, or both can be omitted as may be suitable and/or desired. In addition, while heat sinks 750 are shown as being parallel to rows or lines 710, they need not be, and one or more heat sinks 750 can be arranged at other angles along rows or lines 710, or even along ends of rows or lines 710, such as perpendicular to rows or lines 710.
As with the example of a compound resistor structure 400 of
A method of making a compound resistor structure in a semiconductor device, such as the examples shown in the FIGS., can include forming a plurality of pads from a layer of a first electrically conductive material. This can include forming the pads spaced apart from each other, and the plurality of pads can include a first pad, at least one interposed pad, and a last pad. For example, a metal layer, such as of copper (Cu), aluminum (Al), manganese (Mn), and/or another suitable metal, can be deposited using well known semiconductor fabrication techniques to form the plurality of pads. In particular, embodiments contemplate deposition during back end of line (BEOL) processes. “Deposition” as used throughout the disclosure may include any now known or later developed techniques appropriate for the material to be deposited, including, but not limited to, for example: chemical vapor deposition (CVD), low-pressure CVD (LPCVD), plasma-enhanced CVD (PECVD), semi-atmosphere CVD (SACVD) and high density plasma CVD (HDPCVD), rapid thermal CVD (RTCVD), ultra-high vacuum CVD (UHVCVD), limited reaction processing CVD (LRPCVD), metalorganic CVD (MOCVD), sputtering deposition, ion beam deposition, electron beam deposition, laser assisted deposition, thermal oxidation, thermal nitridation, spin-on methods, physical vapor deposition (PVD), atomic layer deposition (ALD), chemical oxidation, molecular beam epitaxy (MBE), plating, evaporation.
After or before the plurality of pads has been formed, embodiments can include forming a plurality of resistive elements electrically connecting the first pad to the last pad via the at least one interposed pad. That is, each resistive element can engage two pads to electrically connect them, so that the first pad can be electrically connected to an interposed pad by one resistive element, and each interposed pad can be electrically connected to another pad, such as another interposed pad or to the last pad, by another resistive element. In embodiments, forming the plurality of resistive elements can include depositing a layer of resistive material over the pads and removing the resistive material from at least a portion of each pad of the plurality of pads, thereby forming with remaining resistive material the plurality of resistive elements that electrically connect adjacent pads of the plurality of pads. As with the plurality of pads, the plurality of resistive elements can be formed using well known photolithographic and semiconductor fabrication techniques. The plurality of resistive elements can be formed from any suitable material, such as, but not limited to, tungsten silicide (WSi) and/or tantalum nitride (TaN). Silicide may be formed using any now known or later developed technique, e.g., performing an in-situ pre-clean, depositing a metal such as titanium, nickel, cobalt, etc., annealing to have the metal react with silicon, and removing unreacted metal.
To electrically isolate the pads in the plurality of pads from each other, embodiments can include, before forming the plurality of resistive elements, depositing a layer of a first electrically insulative material between the pads and removing any of the first electrically insulative material covering top surfaces of the pads of the plurality of pads. Again, well known semiconductor fabrication processes can be used to achieve the deposition and removal, and the first electrically insulative material can include any suitable material, such as silicon dioxide, for example. Alternatively, the first electrically insulative material could be deposited before formation of the plurality of pads, and cavities can be formed to receive the plurality of pads, with excess of the first electrically conductive material being removed before deposition of the resistive elements. Further, where the resistive elements are formed below the pads, embodiments can include depositing a layer of resistive material before forming the plurality of pads, depositing a layer of a first electrically insulative material between the resistive elements of the plurality of resistive elements and removing any of the first electrically insulative material covering top surfaces of the resistive elements of the plurality of resistive elements. Forming the plurality of pads can include depositing a layer of a first electrically conductive material over the resistive elements of the plurality of resistive elements and removing the first electrically conductive material from at least a portion of each resistive element of the plurality of resistive elements, thereby forming with remaining first electrically conductive material the plurality of pads, pads of the plurality of pads thereby being electrically connected by resistive elements
In a simplest embodiment, the plurality of pads can be arranged in a line, but the plurality of pads can also be arranged in more than one line, the lines spaced apart from each other and connected by electrical connectors.
Embodiments including multiple lines of pads effectively create an array of pads arranged in rows and columns when viewed from a point along a line perpendicular to a plane connecting the top surfaces of the pads. Thus, a method of making a compound resistor structure according to embodiments where the plurality of pads includes at least one line of pads can include forming an array of pads from a first electrically conductive material, the array including at least two rows of pads including a first row and a last row. Each row can include a first end pad at a first end of the respective row and a second end pad at a second end of the respective row opposite the respective first end. A first pad of the array can be a first end pad of the first row, and a last pad of the array can be a second end pad of the last row.
To increase heat dissipation, the method according to embodiments can further comprise forming at least one heat sink, each heat sink adjacent and electrically isolated from a respective one of the at least one line of pads. The forming the at least one heat sink and the forming of the plurality of pads can be performed simultaneously, the at least one heat sink thereby being formed from the same material as the plurality of pads. In addition, where the at least one line of pads includes at least two lines of pads, forming the at least one heat sink can include forming a heat sink between and electrically isolated from two adjacent lines. For example, in a compound resistor structure according to embodiments including three lines of pads, a heat sink can be formed between the first line of pads and an adjacent interposed line of pads, and another heat sink can be formed between the interposed line of pads and the last row of pads.
In embodiments including multiple lines of pads, so that the first pad is in a first line of pads and the last pad is in a last line of pads, the method can include forming at least one electrical connector between adjacent lines of pads so that electrical current can flow from the first pad to the last pad via at least a portion of each line of pads and the at least one electrical connector. Thus, in a compound resistor structure according to embodiments including three lines of pads, a pad of the first line of pads can be electrically connected to a pad of the interposed line of pads by a first electrical connector, and a pad of the interposed line of pads can be electrically connected to a pad of the last line of pads by a second electrical connector. See, for example, the example of
While embodiments have been shown as having the pads and resistive elements in direct contact, such as in adjacent layers, this need not be the case. As seen in
Additionally, while rows of pads have been shown as in a single plane, one or more rows can be above or below one or more other rows and connected by vias. For example, as shown in
In
Accordingly, the described disclosure provides a compound resistor structure that can include fuses for tuning electrical properties thereof and heat sinks for enhanced heat dissipation. By breaking a conventional resistor of a given resistance into multiple parts, a given resistance can be used at higher current and/or power levels than would be possible with a conventional resistor. In addition, compound resistor structures according to embodiments can be used in alternating current (AC) applications in which conventional resistors cannot.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. “Optional” or “optionally” means that the subsequently described event or circumstance may or may not occur, and that the description includes instances where the event occurs and instances where it does not.
Approximating language, as used herein throughout the specification and claims, may be applied to modify any quantitative representation that could permissibly vary without resulting in a change in the basic function to which it is related. Accordingly, a value modified by a term or terms, such as “about,” “approximately” and “substantially,” are not to be limited to the precise value specified. In at least some instances, the approximating language may correspond to the precision of an instrument for measuring the value. Here and throughout the specification and claims, range limitations may be combined and/or interchanged, such ranges are identified and include all the sub-ranges contained therein unless context or language indicates otherwise. “Approximately” as applied to a particular value of a range applies to both values, and unless otherwise dependent on the precision of the instrument measuring the value, may indicate +/−10% of the stated value(s).
The methods and/or structures as described above are, e.g., used in the fabrication of integrated circuit chips, in a packaged form (3D package). The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor.
The descriptions of the various embodiments of the present disclosure have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.