Patent Application
20070278574
The thermally soft insulator (TSI) layer 104 has a flow temperature in the range of about 500° C. to 900° C., where the flow temperature is greater than the solid phase temperature and less than the liquid phase temperature. The TSI insulator layer 104 may be considered to be mechanically soft at the flow temperature, soft enough to isolate any differences in thermal expansion between the Si substrate 102 and the compound semiconductor 106. That is, the TSI layer 104 may be considered to be “soft” at the flow temperature. The compound semiconductor layer 106 can be a material such as GaN, GaAs, GaAlN, or SiC. However, the basic principle of the invention can be applied to any wafer with a thermal mismatch issue between film layers. While the invention has practical application to Si substrates, it is not limited to any particular type of underlying substrate material.
With respect to both
If the doped silicate glass material is BPSG, then it includes phosphorus in the range of about 2 to 4 atomic percentage (at %) and boron in the range of about 3 to 7 at %. If the doped silicate glass is PSG, then it includes phosphorus in the range of about 5 to 9 at %. If BSG, the doped silicate glass includes boron in the range of about 5 to 8 at %. The flow temperature of the TSI material can be varied by adjusting the above-mentioned doping ratios.
A thin layer of thermal oxide is grown on the donor wafer. The thickness of this thermal oxide can be from about 2 nm to 100 nm. Optionally, a thin layer of thermal oxide (2 nm to 100 nm) may also be grown onto the handle wafer.
BPSG, with 2 at % to 4 at % of phosphorus, and 3 at % to 7 at % boron, is deposited onto the handle wafer. The thickness of the BPSG layer can be 50 nm to 1000 nm. The BPSG doping density may be lower at the bottom and the top surfaces of the film, with a maximum in the center portion of the film. If the GaN is formed by epitaxial (epi) growth in subsequent processes, this form of distribution is likely to occur, even the initial doping of the thermally soft insulator is uniform across the thickness of the film.
High energy hydrogen ions are implanted into the donor wafers for wafer splitting. The donor wafer is bonded to the handle wafer, and the donor wafer is split away to expose the top Si layer.
Optionally, the top <111> Si layer may be etched to form <111> Si islands prior to the formation of the GaN and lattice mismatch buffer layer, in order to have better stress release effect.
Any conventional method may be used to grow the lattice mismatch buffer layer and the GaN layer. The BPSG BOX SOI wafer may also used as substrate to grow any other compound material besides the GaN shown in this example.
Step 702 forms a Si substrate. Step 704 forms a thermally soft insulator layer overlying the Si substrate. Step 706 forms a compound semiconductor layer overlying the thermally soft insulator layer. The compound semiconductor layer may be GaN, GaAs, GaAlN, or SiC. The thermally soft insulator has a liquid phase temperature lower than the liquid phase temperatures of Si and the compound semiconductor.
In one aspect, Step 705b forms a silicon oxide layer immediately overlying the thermally soft insulator layer. Step 705f forms a top Si layer immediately overlying the silicon oxide layer, and Step 705i forms a lattice mismatch buffer layer interposed between the top Si layer and the compound semiconductor layer. For example, the lattice mismatch buffer layer may be a material such as AlN, InGaN, or AlGaN.
In one aspect, Step 702 provides a Si handle wafer with a top surface, and forming the thermally soft insulator layer in Step 704 includes depositing the thermally soft insulator overlying the Si handle wafer top surface. The thermally soft insulator may have a flow temperature in the range of about 500° C. to 900° C., where the flow temperature is greater than the solid phase temperature and less than the liquid phase temperature. In one aspect, Step 703 thermally oxidizes the handle wafer top surface, prior to forming the thermally soft insulator layer.
Some examples of a thermally soft insulator include boronsilicate glass (BSG), phosphosilicate glass (PSG), and boronphosphosilicate glass (BPSG). In one aspect, Step 704 deposits the doped silicate glass material to a thickness in the range of about 50 to 1000 nanometers (nm). For example, forming BPSG may include substeps. Step 704a deposits silicate glass, and Step 704b dopes the silicate glass with phosphorus in the range of about 2 to 4 atomic percentage (at %) and boron in the range of about 3 to 7 at %. Alternately, if PSG is formed, Step 704b dopes the silicate glass with phosphorus in the range of about 5 to 9 at %. If BSG is formed, Step 704b dopes the silicate glass with boron in the range of about 5 to 8 at %.
In another aspect, Step 705a provides a donor Si wafer with a top surface, and forming the silicon oxide layer in Step 705b includes thermally oxidizes the donor wafer top surface. For example, the thermally oxidized layer may have a thickness in the range of about 2 to 100 nm. In one aspect, the donor wafer may have a <111> crystallographic orientation.
Step 705c implants the donor wafer with hydrogen ions, forming an implant layer. Step 705d bonds the thermally soft insulator layer of the handle wafer to the silicon oxide layer of the donor wafer. Step 705e splits the bonded wafers along the implant layer, exposing the top Si layer. Then, forming the top Si layer in Step 705f includes planarizing the top Si layer. In one aspect, the planarized thickness is in the range of about 5 and 20 nm. In another aspect following the formation of the top Si layer, Step 705g etches the top Si layer. Step 705h forms Si islands separated from adjacent Si islands by trenches in the top Si layer.
A compound semiconductor-on-Si substrate with a thermally soft insulator has been provided, along with a corresponding method of fabrication. Examples of specific layer orderings and materials have been given to illustrate the invention. Although the invention has been presented in the context of Si and GaN materials, the general principles are applicable to the thermal expansion mismatch between other materials. However, the invention is not limited to merely these examples. Other variations and embodiments of the invention will occur to those skilled in the art.
