Claims
- 1. A semiconductor device comprising:
- (a) a semiconductive substrate of N type conductivity and having first and second opposite surfaces;
- (b) a thyristor formed on said substrate to have a base layer of P type conductivity formed in the first surface of said substrate, a first emitter layer of N type conductivity formed in said base layer, a conductive layer electrically connected to said emitter layer to serve as a cathode electrode, a first gate electrode being in contact with said base layer and serving as a current gate, a second emitter layer of P type conductivity formed in the second surface of the substrate, a drain layer formed in the second emitter layer, and a conductive layer for electrically connecting said second emitter layer with said drain layer and serving as an anode electrode of said thyristor; and
- (c) means associated with said second emitter layer of P type conductivity for accelerating flow of carriers in said thyristor to said anode electrode to turn off said thyristor, said means comprising a metal oxide semiconductor field effect transistor having a second gate electrode including a conductive layer insulatively disposed above said second surface to cover a layer portion of said second emitter layer which is defined between said substrate and said drain layer, said second gate electrode serving as a voltage gate.
- 2. The device according to claim 1, wherein said first and second gate electrodes are applied with first and second voltages of opposite polarities, respectively, when said thyristor is turned off.
- 3. The device according to claim 2, wherein said first voltage has a negative polarity, and said second voltage has a positive polarity.
- 4. The device according to claim 3, wherein said first gate electrode is applied with a certain voltage having a positive polarity with respect to a potential on said cathode electrode when said thyristor is turned on, said second gate electrode being applied with a voltage of a polarity different from that of said certain voltage.
- 5. The device according to claim 4, wherein said base layer and said second emitter layer are of a first type conductivity, whereas said first emitter layer and said drain layer are of a second type conductivity.
- 6. The device according to claim 2, wherein said substrate has at said first surface a concave portion having a bottom in which said base layer is exposed, said first gate electrode being formed on the bottom of said concave portion so as to be in direct contact with said base layer.
- 7. The device according to claim 6, wherein said base layer has a concave portion in which said first gate electrode is formed.
- 8. A thyristor comprising:
- (a) a semiconductive substrate having first and second opposite surface;
- (b) a semiconductor base layer of a first type conductivity provided in the first surface of said substrate;
- (c) a first semiconductor emitter layer of a second type conductivity selectively provided in said first base layer;
- (d) a first main electrode electrically connected with said first emitter layer;
- (e) a first conductive layer which is in contact with said first base layer to serve as a first gate electrode acting as a current gate
- (f) a second semiconductor emitter layer of the first type conductivity provided in the second surface of said substrate;
- (g) a semiconductor drain layer provided in said second semiconductive emitter layer which is positioned between said substrate and said drain layer;
- (h) a second main electrode electrically connected to said second emitter layer and said drain layer;
- (i) a second conductive layer insulatively provided above said second surface of said substrate to cover said layer portion of said second emitter layer thereby to serve as a second gate electrode acting as a voltage gate of said device; and
- (j) said first type conductivity being P type conductivity, while said second type conductivity being N type conductivity.
- 9. The thyristor according to claim 8, wherein said second gate electrode has a metal insulation semiconductor structure.
- 10. The thyristor according to claim 8, wherein said first gate electrode comprises a plurality of parallel elongated polycrystalline silicon layers, and a metal layer which connects in common said polycrystalline silicon layers.
- 11. The thyristor according to claim 10, wherein said base layer has a concave portion at said first surface of said substrate, at least one of said polycrystalline silicon layers being formed in said concave portion.
- 12. The thyristor according to claim 8, wherein said first gate electrode comprises a plurality of parallel elongated semiconductive diffusion layers of the first type conductivity, and a metal layer which connects in common said semiconductive diffusion layers.
- 13. The thyristor according to claim 12, wherein said base layer has a concave portion at said first surface of said substrate, at least one of said diffusion layers being formed in said concave portion.
- 14. A semiconductor device comprising:
- (a) a semiconductive substrate of a first conductivity type and having first and second opposite surfaces;
- (b) a thyristor arranged on said substrate and having a base layer of a second conductivity type arranged in the first surface of said substrate, a first emitter layer of the first conductivity type arranged in said base layer, a cathode electrode electrically connected to said first emitter layer, a first gate electrode being in direct contact with said base layer on a cathode side of said thyristor and constituting a current gate structure, a second emitter layer of the second conductivity type arranged in the second surface of said substrate, a drain layer arranged in said second emitter layer, and an anode electrode arranged on said second surface for causing said second emitter layer and said drain layer to be electrically coupled to each other; and
- turn-off accelerator means associated with said second emitter layer, for accelerating a flow of charge carriers toward said anode electrode to turn off said thyristor, said turn-off accelerator means comprising a metal oxide semiconductor field effect transistor having an insulated second gate electrode arranged on said second surface to overlie a layer portion of said second emitter layer which is defined between said substrate and said drain layer, said second gate electrode constituting voltage gate structure on an anode side of said thyristor.
- 15. The device according to claim 14, wherein said first conductivity type is N type and said second conductivity type is P type.
- 16. The device according to claim 15, wherein said base layer has a groove in which said first gate electrode is placed.
- 17. The device according to claim 15, wherein said first emitter layer is greater in dopant impurity than said base layer.
- 18. The device according to claim 17, wherein said drain layer is greater in dopant impurity than said second emitter layer.
Priority Claims (3)
Number |
Date |
Country |
Kind |
62-41309 |
Feb 1987 |
JPX |
|
62-110743 |
May 1987 |
JPX |
|
62-304634 |
Dec 1987 |
JPX |
|
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of application Ser. No. 07/351,086, filed on May 12, 1988, now abandoned, which is a continuation-in-part of copending U.S. patent application Ser. No. 07/160,277 filed Feb. 25, 1988, now abandoned.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
4816892 |
Temple |
Mar 1989 |
|
4821083 |
Ogura et al. |
Apr 1989 |
|
4825270 |
Satou et al. |
Apr 1989 |
|
Continuations (1)
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Number |
Date |
Country |
Parent |
351086 |
May 1988 |
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Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
160277 |
Feb 1988 |
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