BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1(
a)-1(d) illustrate schematically a range of thickness variations occurring on a printed wiring board (PWB) at a land grid array (LGA) site.
FIG. 2 illustrates the effect of a significant PWB thickness variation on a typical LGA load configuration.
FIG. 3 illustrates the LGA load configuration of FIG. 2 with the addition of a customizable backer structure according to the present invention.
FIGS. 4(
a)-4(c) illustrate the three layers of a customizable backer structure according to the present invention using a prepreg sheet.
FIGS. 5(
a)-5(c) illustrate the three layers of a customizable backer structure according to the present invention using a stencil applied adhesive.
FIG. 6(
a) illustrates the effect of a significant PWB thickness variation on a typical column grid array (CGA) load configuration.
FIG. 6(
b) illustrates the CGA load configuration of FIG. 6(a) with the addition of a customizable backer structure according to the present invention
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
The invention will now be described in more detail by way of example with reference to the embodiments shown in the accompanying figures. It should be kept in mind that the following described embodiments are only presented by way of example and should not be construed as limiting the inventive concept to any particular physical configuration.
Further, if used and unless otherwise stated, the terms “upper,” “lower,” “front,” “back,”“over,” “under,” and similar such terms are not to be construed as limiting the invention to a particular orientation. Instead, these terms are used only on a relative basis.
The present invention is directed to an apparatus and method for mounting multi-chip land grid array modules to printed wiring boards using a customizable backer for achieving consistent loading and engagement of the array package connections.
FIGS. 1(
a)-1(d) illustrate schematically a range of thickness variations that might occur in PWB 10 in the vicinity of an LGA site, progressing from essentially no thickness variation in the case of FIG. 1(a) to a significant variation in the case of FIG. 1(d). FIG. 2 illustrates schematically the effect of a significant PWB variation at the LGA site on a typical LGA load configuration, which is designed to apply a uniform load to the LGA connections. In the exemplary LGA configuration shown, semiconductor chips 21a and 21b are mounted on carrier substrate 22 to form an LGA module that has an array of contact pads (not shown) on the lower surface that are electrically connected to circuit elements on the chips. The upper surface of PWB 10 has an array of contact pads (not shown) that are aligned with those on the carrier substrate 22. Electrical connection of the pads on the carrier substrate 22 to the matching pads on the upper surface of the PWB 10 is made through electrically conductive elements in the LGA interposer 23 that is interposed between them. In the example shown, the stack of LGA components—LGA module, interposer and PWB—is sandwiched between heatsink 24, which also provides cooling to the semiconductor chips 21a and 21b, and a backside stiffener plate 25. A thin insulating sheet 26 is commonly interposed between stiffener plate 25 and PWB 10 to prevent unwanted electrical contact with any circuits on the back surface of the PWB.
Load posts 27 pass through holes in the stiffener plate 25 and the PWB 10 and are in threaded engagement with heatsink 24. The other ends of the load posts 27 have a head or similar means for retaining the ends or corners of spring member 28. Turning an actuation screw 29, threaded through the center of spring member 28, allows a mechanical load of the desired level to be applied to the LGA stack. However, as FIG. 2 illustrates, load application may not be sufficient to ensure adequate and consistent LGA connector loads across the entire contact array if there is a significant variation in PWB thickness at the LGA site.
FIG. 3 is a schematic illustration of the of the same LGA load configuration shown in FIG. 2, but with the addition of the customizable insulating backer structure 30 of the present invention. Common elements having the same numerical designators require no further explanation. The elements that comprise the customizable insulator backer structure are a first insulating sheet 34, a second insulating sheet 32, and a customizable shaping layer 36 sandwiched between the first and second insulating sheets. The customizable insulating backer structure is interposed between the stiffener plate 25 and PWB 10 and provides the appropriate amount of PWB shape bias to compensate for PWB shape variations at the LGA site and facilitate uniform mechanical loading of the LGA connections.
The following explains in further detail how the customizable insulating backer structure of the present invention is formed. An electrically insulating, high flow, low temperature laminate prepreg 42 (see FIG. 4) or low temperature curable, stencil deposited organic adhesive, such as an epoxy, silicone, acrylate, or urethane based material 52 (see FIG. 5), is used and applied to electrically insulating film or organic sheet 34 predisposed atop the standard metal stiffener plate 25. Once this material is applied to the first insulating sheet 34, a stiffener/insulator sub-assembly is created, and it is then sandwiched with the second thin organic insulating sheet 32 that makes contact with the PWB backside during LGA hardware assembly. After assembly the LGA card/module assembly is exposed for a given time duration to a low temperature process regime (25° C.-150° C. depending on the material used) to facilitate flow and cure of the organic material between the first and second insulating sheets. After thermal exposure, the result is a rigid customized insulating backer that takes on the specific shape characteristics of individual board assemblies, as shown in FIG. 3.
This structure and process sequence eliminates PWB board yield losses, specialized assembly routings, and drastically improves LGA load uniformity on complex module-to-board interconnections. If PWB rework is required after assembly, the resultant backup structure is also readily removed from the PWB and can be reused with the PWB upon reassembly. The customizable insulator sandwich structure can also facilitate presence of backside components on the PWB if present within the LGA site.
It should be understood that the invention is not necessarily limited to the specific process, arrangement, materials and components shown and described above, but may be susceptible to numerous variations within the scope of the invention. For example, although the above-described exemplary aspects of the invention are believed to be particularly well suited for LGA connections, it is contemplated that the concepts of the presently disclosed customizable backer can be used in other applications as well, such as in conjunction with column grid array (CGA) and ball grid array (BGA) module packages possessing affixed heatsinks under load, in order to mitigate interconnection creep and board relaxation that can contribute to resultant load loss and strain build-up on critical thin bondline thermal interfaces. FIG. 6 discloses by way of example, a CGA connection in which a column grid array module comprised of semiconductor chips 61a and 61b, and carrier substrate 62, is mounted on PWB 10. Heat sink 63 is held in contact with the semiconductor chips by fasteners 64, which engage load frame 65. A stiffener plate 66 is held against the backside of PWB 10 by fasteners 67, which also engage load frame 65. Insulative plastic members 71 are inserted between and along two opposing edges of the carrier substrate 62 and the PWB 10 to eliminate gross crushing of CGA connections held under highly high compressive loads that are required to secure heat sink 63. As illustrated in FIG. 6(a), a variation in thickness of PWB 10 at the CGA connection site can lead to strain on the CGA connection as well as the thermal interface between the heatsink and the semiconductor chips. However, introduction of a customizable backer structure as shown in FIG. 6(b), comprised of a first insulating sheet 68, a second insulating sheet 69, and a customizable shaping layer 70, placed between the stiffener plate 66 and the PWB 10 in the manner earlier described, serves to minimize potential solder creep and board relaxation, and mitigate thermal interface bondline stress/strain buildup.
It will be apparent to one skilled in the art that the manner of making and using the claimed invention has been adequately disclosed in the above-written description of the preferred embodiments taken together with the drawings.
It will be understood that the above description of the preferred embodiments of the present invention are susceptible to various modifications, changes and adaptations, and the same are intended to be comprehended within the meaning and range of equivalents of the appended claims.
Patent Application
20080009152
