Claims
- 1. A thin film for a semiconductor device, comprising a diffusion barrier layer as a stuffed layer containing an insulating material bonded to a refractory metal material.
- 2. The thin film of claim 1, wherein the insulating material is formed of at least one of oxide or nitride.
- 3. The thin film of claim 1 wherein the refractory metal material is formed of at least one of 4B, 5B or 6B groups which include Ti, Ta, Mo and W.
- 4. The thin film of claim 1 wherein the diffusion barrier layer is in an amorphous or microcrystalline state.
- 5. The thin film of claim 1, wherein the thin film comprises Ta—CeO2.
- 6. The thin film of claim 1, wherein the thin film has been formed by co-sputtering.
- 7. The thin film of claim 1, wherein the thin film is thermally stabilized.
- 8. A thin film for a semiconductor device, comprising a stuffed layer containing an insulating material bonded to a refractory metal material, wherein the insulating material is formed of at least one of oxide or nitride.
- 9. A thin film for a semiconductor device, comprising an insulating material bonded to a refractory metal material, wherein the thin film comprises Ta—CeO2.
Priority Claims (1)
Number |
Date |
Country |
Kind |
98-001544 |
Jan 1998 |
KR |
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Parent Case Info
This application is a divisional of application Ser. No. 09/233,040, filed on Jan. 20, 1999, now U.S. Pat. No. 6,482,734 which is a CIP of Ser. No. 09/196,330 filed Nov. 19, 1998, now abandoned the entire contents of which are hereby incorporated by reference and for which priority is claimed under 35 U.S.C. § 120; and this application claims priority of application No. 1544/1998 filed in Korea on Jan. 20, 1998 under 35 U.S.C. § 119.
US Referenced Citations (16)
Foreign Referenced Citations (3)
Number |
Date |
Country |
0722190 |
Jul 1996 |
EP |
7335759 |
Dec 1995 |
JP |
8139092 |
May 1996 |
JP |
Non-Patent Literature Citations (4)
Entry |
Stanley Wolf et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, pp. 175, 176 and 261. |
Stanley Wolf et al., Silicon Processing for the VLSI Era, vol. 2: Process Integration, pp. 121-125. |
McGraw-Hill, Inc., “VLSI Technology”, Second Edition, pp. 16 and 308-310. |
E. Kolowa et al. “Sputtered Ta-Si-N Diffusion Barriers in Cu Metallizations for Si”, IEEE Electron Device Letters, vol. 12, No. 6 (Jun. 1991). |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
09/196330 |
Nov 1998 |
US |
Child |
09/233040 |
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US |