The present invention generally relates to electronic assemblies and methods of fabricating electronic assemblies, and more particularly relates to electronic assemblies that include an electrical insulator layer directly bonded to a heat sink and methods of fabricating such electronic assemblies.
Electronic assemblies are used in a wide variety of industries including the automotive industry, the consumer products industry, and the like. Bonding and joining technology is fundamental in the manufacture of these electronic assemblies. Power modules are examples of one type of electronic assembly in which forming robust bonds between the various components can be challenging. Power modules typically include electronic components that have high power losses in terms of heat, such as semiconductor dies that include power transistors, diodes, and the like. These modules may be part of a more extensive electronic system responsible for controlling speed and torque of electrical loads like motors.
Typically, power modules include a thermal stack that comprises multiple dies, e.g., semiconductor dies, bonded to a high power substrate, such as a Direct Bonded Copper (DBC) substrate, a Direct Bonded Aluminum (DBA) substrate, or an Active Metal Brazing (AMB) substrate, which is bonded to a heat sink. These high power substrates are relatively expensive and are typically configured as a tri-layer structure that includes a ceramic layer interposed between two metal layers. The assembly of the substrate with the heat sink usually employs a conventional bonding and joining technology such as soldering to form a solder joint(s) that bonds the substrate to the heat sink. Unfortunately, the solder joint(s) often rapidly degrades at the relatively high module temperatures achieved during normal operation of power modules and the differences in thermal expansion of the individual layers of the substrate, the solder joint(s), and the heat sink. Additionally, the substrate can also crack from stresses produced from these differences in thermal expansion during normal operation. As such, performance and reliability of the electronic assembly can be affected. Also, electronic assemblies that include tri-layer structures of traditional high power substrates can require additional packaging space to accommodate the thickness of the tri-layer structure. In applications where packaging space is limited, e.g., integrating an inverter into a motor, the integration of the electronic assembly may be limited and/or require complex shapes, e.g., circular inverter, resulting in cost prohibitive substrates.
Accordingly, it is desirable to provide electronic assemblies that are less costly and/or that have improved performance and reliability, and methods for fabricating such electronic assemblies. Moreover, it is desirable to provide electronic assemblies that have greater packaging flexibility and integration in applications where packaging space is limited, and methods for fabricating such electronic assemblies. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.
An electronic assembly is provided herein. In one embodiment, the electronic assembly comprises a heat sink, a metal layer, and an electrical insulator layer. The metal layer defines at least a portion of an electrical circuit. The electrical insulator layer is disposed between the heat sink and the metal layer and is directly bonded to the heat sink.
In another embodiment, the electronic assembly comprises a heat sink and a metal layer that defines at least a portion of an electrical circuit. An electrical insulator layer is disposed between and directly bonded to the heat sink and the metal layer. The electrical insulator layer has a dielectric strength of at least about 2 kV/mm. A die is bonded to the metal layer and is electrically coupled to the electrical circuit.
A method of fabricating an electronic assembly is provided herein. In one embodiment, the method comprises the steps of forming an electrical insulator layer that is disposed between a heat sink and a metal layer and that is directly bonded to the heat sink. At least a portion of an electrical circuit is defined in the metal layer.
The embodiments will hereinafter be described in conjunction with the following drawing figures, wherein like numerals denote like elements, and wherein:
The following detailed description is merely exemplary in nature and is not intended to limit the invention or the application and uses. Furthermore, there is no intention to be bound by any theory presented in the preceding technical field, background, brief summary or the following detailed description.
Various embodiments contemplated herein relate to electronic assemblies and methods of fabricating electronic assemblies. Unlike the prior art, the embodiments described herein provide an electronic assembly that has an electrical insulator layer formed between a heat sink and a metal layer. The electrical insulator layer is directly bonded to the heat sink. In one embodiment, the electrical insulator layer is formed of a dielectric material (e.g., an enamel or polymer) that is dried, heated, and/or cured directly on the surfaces of both the heat sink and the metal layer to affix the electrical insulator layer to these surfaces without the use of solder or other bonding or joining material.
In an embodiment, the metal layer is patterned and etched, for example, to define at least a portion of an electrical circuit. A die is bonded, e.g. with solder, sintered metal, or the like, to the metal layer and is electrically coupled to the electrical circuit. The electrical insulator layer electrically isolates the heat sink from the electrical circuit formed in the metal layer. As such, the electrical insulator layer and the metal layer effectively function together as a high power substrate that is configured as a bi-layer structure. In one embodiment, this bi-layer structure is less expensive than the tri-layer structures of traditional high power substrates, such as DBC substrates, DBA substrate, and AMB substrate. Moreover, the electrical insulator layer does not require the use of solder or other bonding or joining material to bond to the heat sink and therefore, degradation of any bonding or joining material, e.g., solder joint, that would otherwise be used to bond to the heat sink is eliminated. Additionally, in one embodiment, the bi-layer structure has fewer layers with different thermal expansions than tri-layer structures of traditional high power substrates and therefore, less stress is produced during normal operation of the electronic assembly, thereby reducing, minimizing, or eliminating cracking between the layers. Also, because the bi-layer structure has fewer layers than tri-layer structures of traditional high power substrates, the overall thickness of the electronic assembly can be reduced allowing for greater packaging flexibility and integration in applications where packaging space is limited.
The die 12 may be, for example, a semiconductor die that includes power transistors, diodes, and/or the like, or any other electronic device. The metal layer 14 defines at least a portion of an electrical circuit 20. As shown, the die 12 is electrically coupled to the electrical circuit 20 via a plurality of wire bonds 22 and is bonded to a surface 23 of the metal layer 14 via a bond joint 24. The bond joint 24 may be formed of solder to define a solder joint or alternatively, may be formed from sintered metal or other bonding or joining material known to those skilled in the art.
In an embodiment and as will be discussed in further detail below, the electrical insulator layer 16 is directly bonded to the heat sink 18. As illustrated, the electrical insulator layer 16 is also directly bonded to the metal layer 14. As such, the electronic assembly 10 forms a thermal stack 26 for transferring heat from the die 12 to the heat sink 18. The heat sink 18 includes multiple channels 28 through which coolant (e.g., air, water, a water and ethylene glycol mixture, and the like) can flow, for example, via natural convection or forced convection. In particular, when the electronic assembly 10 is operating, the flow of coolant through the channels 28 reduces the temperature of the heat sink 18 and, in turn, reduces the temperatures of the electrical insulator layer 16, the metal layer 14, and the die 12.
The electrical insulator layer 16 comprises a dielectric material and electrically isolates the heat sink 18 from the electrical circuit 20 formed in the metal layer 14. The thickness (indicated by double headed arrow 30) and dielectric properties of the electrical insulator layer 16 are adapted so that the electrical insulator layer 16 has a relatively high dielectric strength for electrical isolation. In an embodiment, the electrical insulator layer 16 has a dielectric strength of about 2 kV/mm or greater, such as about 8 kV/mm or greater, for example from about 8 to about 100 kV/mm. In one embodiment, the thickness 30 of the electrical insulator layer 16 is from about 0.1 to about 0.7 mm.
In one embodiment, the dielectric material of the electrical insulator layer 16 comprises an enamel and/or a polymer(s). For example, the dielectric material of the electrical insulator layer 16 may be an enamel that comprises silicon oxide and metal oxide(s). Alternatively, the dielectric material of the electrical insulator layer 16 may be a polymer or polymers, such as polydimethylsiloxane, epoxy, polyester, polyvinyl ester, and/or a bismaleimide-based polymer, for example polydimethylsiloxane.
In an embodiment, the electrical insulator layer 16 has a relatively high thermal conductivity. In one example, the electrical insulator layer 16 has a thermal conductivity of about 0.3 W/m° K or greater, such as from about 0.3 to about 1000 W/m° K or greater. A filler having a relatively high electrical resistivity, such as from about 102 to about 1014 (ohms cm) or greater, and a relatively high thermal conductivity, such as from about 30 to about 300 W/m° K or greater, may be dispersed in or otherwise incorporated into the dielectric material to increase the thermal conductivity of the electrical insulator layer 16 while maintaining dielectric properties suitable for electrical isolation. In one embodiment, the filler comprises aluminum oxide, boron nitride, magnesium oxide, silicon carbide, silicon, aluminum nitride, and/or beryllium oxide.
Referring to
In one embodiment, at least a portion of an electrical circuit 20 (see
The process continues as discussed above in relation to
Accordingly, electronic assemblies and methods of fabricating electronic assemblies have been described. Unlike the prior art, the embodiments described herein provide an electronic assembly that has an electrical insulator layer formed between a heat sink and a metal layer. In one embodiment, the electrical insulator layer is directly bonded to the heat sink and the metal layer without the use of solder or other bonding or joining material. The metal layer defines at least a portion of an electrical circuit. A die is bonded, e.g. with solder, sintered metal, or the like, to the metal layer and is electrically coupled to the electrical circuit. The electrical insulator layer electrically isolates the heat sink from the electrical circuit formed in the metal layer. As such, the electrical insulator layer and the metal layer can effectively function together as a cost effective bi-layer substrate structure. Moreover, the electrical insulator layer does not require the use of solder or other bonding or joining material to bond to the heat sink and therefore, degradation of any bonding or joining material, e.g., solder joint(s), that would otherwise be used to bond to the heat sink(s) is eliminated. Additionally, in one embodiment, the bi-layer structure has fewer layers with different thermal expansions than tri-layer structures of traditional high power substrates and therefore, less stress is produced during normal operation of the electronic assembly, thereby reducing, minimizing, or eliminating cracking between the layers. Also, because the bi-layer structure has fewer layers than tri-layer structures of traditional high power substrates, the overall thickness of the electronic assembly can be reduced allowing for greater packaging flexibility and integration in applications where packaging space is limited.
While at least one embodiment has been presented in the foregoing detailed description, it should be appreciated that a vast number of variations exist. It should also be appreciated that the embodiment or embodiments are only examples, and are not intended to limit the scope, applicability, or configuration of the disclosure in any way. Rather, the foregoing detailed description will provide those skilled in the art with a convenient road map for implementing the embodiment or embodiments. It should be understood that various changes may be made in the function and arrangement of elements without departing from the scope of the disclosure as set forth in the appended claims and the legal equivalents thereof.
This application claims the benefit of U.S. Provisional Patent Application No. 61/636,486 filed Apr. 20, 2012, the entire contents of which are herein incorporated by reference.
Number | Date | Country | |
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61636486 | Apr 2012 | US |