Electronic package arrangements and related methods

Information

  • Patent Grant
  • 11114363
  • Patent Number
    11,114,363
  • Date Filed
    Monday, September 23, 2019
    4 years ago
  • Date Issued
    Tuesday, September 7, 2021
    2 years ago
Abstract
Electronic package arrangements and related methods are disclosed that provide one or more of improved thermal management and electromagnetic shielding. Electronic packages are disclosed that include arrangements of one or more electronic devices, overmold bodies, and heat spreaders or metal frame structures. The heat spreaders or metal frame structures may be arranged over the electronic devices to form heat dissipation paths that draw operating heat away from the electronic devices in one or more directions including above and below the electronic packages. The heat spreaders or metal frame structures may also be arranged to form electromagnetic shields that reduce crosstalk between the electronic devices within the electronic packages and to suppress unwanted emissions from either escaping or entering the electronic packages.
Description
FIELD OF THE DISCLOSURE

The present disclosure relates to electronic package arrangements and related methods, and particularly to electronic package arrangements with one or more of improved thermal management and electromagnetic shielding.


BACKGROUND

Electronic packages, components, and modules have become ubiquitous in modern society. The electronics industry routinely announces accelerated clocking speeds and smaller integrated circuit modules. While the benefits of these devices are myriad, smaller and faster electronic devices create problems. In particular, high clock speeds inherently require fast transitions between signal levels. Fast transitions between signal levels create electromagnetic emissions throughout the electromagnetic spectrum. Such emissions are regulated by the Federal Communications Commission (FCC) and other regulatory agencies. Furthermore, fast speed transitions inherently mean higher frequencies. Higher frequencies mean shorter wavelengths, requiring shorter conductive elements to act as antennas to broadcast these electromagnetic emissions. The electromagnetic emissions radiate from a source and may impinge upon other electronic devices. If the signal strength of the emission at the impinged upon electronic device is high enough, the emission may interfere with the operation of the impinged upon electronic device. This phenomenon is sometimes called electromagnetic interference (EMI) or crosstalk. Dealing with EMI and crosstalk is sometimes referred to as electromagnetic compatibility (EMC). Other devices, such as transceiver modules, inherently have many radiating elements that raise EMI concerns. Thus, even electronic packages and modules that do not have high clock speeds may need to address EMI issues.


One way to reduce EMI to comply with FCC regulations is to electromagnetically shield the electronic modules. Typically a shield is formed from a grounded conductive material that surrounds an electronic module. When electromagnetic emissions from the electronic module strike the interior surface of the conductive material, the electromagnetic emissions are electrically shorted through the grounded conductive material, thereby reducing emissions. Likewise, when emissions from another radiating element strike the exterior surface of the conductive material, a similar electrical short occurs, and the electronic module experiences reduced EMI from other electronic modules.


Another problem associated with smaller and faster electronic devices involves thermal management. Tightly-packed high frequency devices within electronic packages tend to generate increased levels of heat in compact spaces. Thermal crowding within such electronic packages can lead to increased operating temperatures and decreased performance of electronic devices housed therein.


As electronic packages continue to become smaller from miniaturization, creating effective electromagnetic shields and providing effective thermal management that does not materially add size becomes more difficult. Thus, the art continues to seek improved electronic packages capable of overcoming such challenges.


SUMMARY

The present disclosure relates to electronic package arrangements and related methods, and particularly to electronic package arrangements that provide one or more of improved thermal management and electromagnetic shielding. Electronic packages are disclosed that include arrangements of one or more electronic devices, overmold bodies, and heat spreaders or metal frame structures. The heat spreaders or metal frame structures may be arranged over the electronic devices to form heat dissipation paths that draw operating heat away from the electronic devices in one or more directions including above and below the electronic packages. The heat spreaders or metal frame structures may also be arranged to form electromagnetic shields that reduce crosstalk between the electronic devices within the electronic packages and to suppress unwanted emissions from either escaping or entering the electronic packages.


In one aspect, an electronic package comprises: a substrate forming a first face and a second face that opposes the first face; a first electronic device mounted on the first face of the substrate; an overmold body on the first face and arranged around peripheral edges of the first electronic device, the overmold body forming a first recess that extends through the overmold body to the first face; and a heat spreader arranged over the first electronic device such that the first electronic device is between the heat spreader and the substrate, and the heat spreader is further arranged within the first recess such that the heat spreader is thermally coupled to the first electronic device and the first face of the substrate. In certain embodiments, a top surface of the overmold body is coplanar with a top surface of the first electronic device. In certain embodiments, an interface between the heat spreader and the first electronic device is devoid of the overmold body. In certain embodiments, a thermal interface material is arranged between the heat spreader and the substrate. In certain embodiments, a gap is formed between the heat spreader and the overmold body within the recess. The gap may comprise a thermal interface material. In certain embodiments, the electronic package further comprises a second electronic device mounted on the first face of the substrate, wherein the first recess is arranged between the first electronic device and the second electronic device. In certain embodiments, the heat spreader is electrically grounded to form an electromagnetic shield between the first electronic device and the second electronic device within the first recess. In certain embodiments, the electronic package further comprises a second recess that extends along a periphery of the first electronic device and the second electronic device such that heat spreader further forms the electromagnetic shield around the periphery of the first electronic device and the second electronic device. In certain embodiments, the first recess is continuous with the second recess. In certain embodiments, the first recess is formed to surround the first electronic device on the first face of the substrate. In certain embodiments, the heat spreader forms an electromagnetic shield that encloses the first electronic device on the first face of the substrate.


In another aspect, a method comprises: providing a substrate comprising a first face and a second face that opposes the first face; mounting a first electronic device on the first face of the substrate; forming an overmold body around peripheral edges of the first electronic device, the overmold body forming a recess that extends through the overmold body to the first face of the substrate; placing a heat spreader over the first electronic device and within the recess such that the heat spreader is thermally coupled to the first electronic device and the first face of the substrate. In certain embodiments, forming the overmold body comprises a film-assisted molding process. In certain embodiments, the method further comprises planarizing the overmold body to expose a top surface of the first electronic device before placing the heat spreader over the first electronic device. In certain embodiments, a gap is formed between the heat spreader and the overmold body within the recess.


In another aspect, an electronic package comprises: a substrate forming a first face and a second face that opposes the first face; a first electronic device mounted on the first face of the substrate; an overmold body on the first face, the overmold body forming a first recess that extends through the overmold body to the first face of the substrate; and a metal frame structure arranged over the overmold body and within the first recess such that the metal frame structure forms an electromagnetic shield for the first electronic device. In certain embodiments, a gap is formed between the metal frame structure and the overmold body within the first recess. In certain embodiments, the gap comprises a thermal interface material. In certain embodiments, a portion of the overmold body is arranged between the metal frame structure and the first electronic device. In certain embodiments, the electronic package further comprises a second electronic device mounted on the first face of the substrate, wherein the first recess is arranged between the first electronic device and the second electronic device such that the metal frame structure forms the electromagnetic shield between the first electronic device and the second electronic device. In certain embodiments, the electronic package further comprises a second recess that extends along a periphery of the first electronic device and the second electronic device such that metal frame structure further forms the electromagnetic shield around the periphery of the first electronic device and the second electronic device. In certain embodiments, the first recess is continuous with the second recess.


In another aspect, any of the foregoing aspects, and/or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.


Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.





BRIEF DESCRIPTION OF THE DRAWING FIGURES

The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.



FIG. 1A is a cross-sectional view of an electronic package arrangement for a heat spreader, one or more electronic devices, and an overmold body according to embodiments disclosed herein.



FIG. 1B is a top view of the electronic package of FIG. 1A.



FIG. 2A is a cross-sectional view of the electronic package of FIG. 1A that includes or is mounted to a bottom heat sink.



FIG. 2B is a cross-sectional view of the electronic package of FIG. 2A that includes or is mounted to a top heat sink.



FIGS. 3A-3E are cross-sectional views of the electronic package of FIG. 1A at various state of fabrication according to embodiments disclosed herein.



FIG. 4 is a cross-sectional view of an electronic package where an overmold body is formed above electronic devices according to embodiments disclosed herein.



FIG. 5A is a cross-sectional view of an electronic package where an overmold body forms a plurality of recesses according to embodiments disclosed herein.



FIG. 5B is a cross-sectional view of the electronic package of FIG. 5A that further includes a top heat sink.



FIG. 6A is a cross-sectional view of an electronic package where a heat spreader forms an electromagnetic shield around a periphery of and between electronic devices according to embodiments disclosed herein.



FIG. 6B is a cross-sectional view of the electronic package of FIG. 6A that further includes a top heat sink.



FIG. 7 is a partial perspective view of a lead frame structure according to embodiments disclosed herein.





DETAILED DESCRIPTION

The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.


It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.


It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.


Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.


The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.


Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.


The present disclosure relates to electronic package arrangements and related methods, and particularly to electronic package arrangements that provide one or more of improved thermal management and electromagnetic shielding. Electronic packages are disclosed that include arrangements of one or more electronic devices, overmold bodies, and heat spreaders or metal frame structures. The heat spreaders or metal frame structures may be arranged over the electronic devices to form heat dissipation paths that draw operating heat away from the electronic devices in one or more directions including above and below the electronic packages. The heat spreaders or metal frame structures may also be arranged to form electromagnetic shields that reduce crosstalk between the electronic devices within the electronic packages and to suppress unwanted emissions from either escaping or entering the electronic packages.



FIG. 1A is a cross-sectional view of an electronic package 10 according to embodiments disclosed herein. The electronic package 10 includes a substrate 12 that forms a first face 12′ and a second face 12″ that generally opposes the first face 12′. As illustrated, the first face 12′ and the second face 12″ form opposing major faces of the substrate 12. The substrate 12 may provide one or more of mechanical support and electrical connections for the electronic package 10. In certain embodiments, the substrate 12 comprises a laminate material of one or more alternating layers or sheets of conductive and non-conductive materials with matched or similar coefficients of thermal expansion. The laminate material may comprise organic materials or inorganic materials. In certain embodiments, the substrate 12 may comprise a printed circuit board (PCB), while in other embodiments, the substrate 12 may comprise a low temperature co-fired ceramic (LTCC) substrate.


In FIG. 1A, one or more electronic devices 14-1, 14-2 are mounted on the first face 12′ of the substrate 12. While first and second electronic devices 14-1, 14-2 are drawn for illustrative purposes, the electronic package 10 may include any number of electronic devices of various types depending on the application. The electronic devices 14-1, 14-2 may include one or more of electrical die, chips, components, and sub-modules. For example, one or more of the electronic devices 14-1, 14-2 may include an electronic circuit built on its own semiconductor substrate, such as a processor, volatile memory, non-volatile memory, a radio frequency (RF) circuit, a micro-electro-mechanical system (MEMS) device, an integrated passive device (IPD), or various other integrated circuits (ICs). In certain embodiments, one or more of the electronic devices 14-1, 14-2 may include filters, capacitors, inductors, resistors, power resistors, amplifiers, low-noise amplifiers (LNA) such as gallium arsenide (GaAs)-based LNAs, power amplifiers (PAs), switching devices, silicon-on-insulator (SOI) switching devices, attenuators, transmit/receive modules, or electronic circuits having combinations thereof. The one or more electronic devices 14-1, 14-2 may include one or more Group III-V semiconductor materials such as GaAs- and gallium nitride (GaN)-based devices. In certain embodiments, the electronic devices 14-1, 14-2 may comprise electrically active devices, electrically passive devices, or combinations thereof. One or more of the electronic devices 14-1, 14-2 may be flip-chip mounted to the substrate 12 such that electrical connections are made without the use of wirebonds. In operation, the electronic devices 14-1, 14-2 may generate heat and may accordingly be referred to as heat-generating devices.


A body, such as an overmold body 16 or overmold material, is arranged over the substrate 12 and surrounding each of the electronic devices 14-1, 14-2 on the first face 12′. The overmold body 16 may comprise one or more insulating or dielectric materials such as plastics, thermoplastics, and epoxy mold compounds. In this regard, the overmold body 16 may be configured to provide encapsulation and electrical isolation for the electronic devices 14-1, 14-2 that are mounted on the substrate 12. In certain embodiments, the overmold body 16 forms a recess 18 or cavity that extends through the overmold body 16 to the first face 12′ of the substrate 12. The recess 18 may be formed through an entire thickness of the overmold body 16 to the first face 12′. Notably, the recess 18 is spaced from the electronic devices 14-1, 14-2 such that overmold body 16 is arranged around peripheral edges 14-1′, 14-2′ of each of the electronic devices 14-1, 14-2. In this manner, portions of the overmold body 16 are positioned between each of the electronic devices 14-1, 14-2 and the recess 18. As illustrated, the recess 18 may be arranged between the first electronic device 14-1 and the second electronic device 14-2.


The electronic package 10 further includes a heat spreader 20 that is arranged over the electronic devices 14-1, 14-2 and the overmold body 16 such that the electronic devices 14-1, 14-2 are between the heat spreader 20 and the substrate 12. In certain embodiments, top surfaces 14-1″, 14-2″ of one or more of the electronic devices 14-1, 14-2 may be coplanar with a top surface 16′ of the overmold body 16. This provides an arrangement where an interface is formed between the heat spreader 20 and the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2 that is devoid of the overmold body 16. As such, the heat spreader 20 may be arranged on the overmold body 16 and on one or more of the electronic devices 14-1, 14-2 without having portions of the overmold body 16 provided between the heat spreader 20 and the electronic devices 14-1, 14-2. In this regard, the heat spreader 20 may be configured to have improved thermal coupling with the electronic devices 14-1, 14-2. In certain embodiments, the interface between the heat spreader 20 and the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2 that is devoid of the overmold body 16 need not extend across the entirety of the top surfaces 14-1″, 14-2″ to provide improved thermal coupling.


Additionally, the heat spreader 20 may be arranged within the recess 18 to be thermally coupled with the first face 12′ of the substrate 12. In this regard, a heat dissipation path, or a low thermal impedance path, is formed that may effectively draw heat away from the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2, laterally across portions of the overmold body 16, and through the recess 18 to the substrate 12. As such, the heat dissipation path provided by the heat spreader 20 allows the electronic devices 14-1, 14-2 to have reduced junction temperatures during operation, thereby providing improved electrical performance, reliability and life-time. In certain embodiments, the heat spreader 20 comprises a thermally conductive material, such as a metal or a thermally conductive ceramic. In particular, the heat spreader 20 may comprise one or more of copper (Cu), Cu alloys, aluminum (Al), Al alloys, and aluminum nitride (AlN), among other materials. The heat spreader 20 may be formed separately from the electronic package 10 and the heat spreader 20 may subsequently be attached to the electronic package 10. For example, the heat spreader 20 may initially be formed as part of a lead frame structure that is subsequently divided into a plurality of individual heat spreaders. The heat spreader 20 may form a single continuous piece of material that is arranged over the electronic devices 14-1, 14-2 and within the recess 18 to the substrate 12. As such, the heat spreader 20 may be referred to as an insert for the electronic package 10.


In certain embodiments, the recess 18 may be formed with a larger lateral dimension across the first face 12′ of the substrate 12 than the portion of the heat spreader 20 that extends within the recess 18. By forming the recess 18 in this manner, alignment tolerances for placement of the heat spreader 20 may be improved, thereby reducing the need for complex aligner and placement equipment. In this regard, one or more gaps 22 may be formed between the heat spreader 20 and portions of the overmold body 16 within in the recess 18. The one or more gaps 22 may comprise air gaps. In other embodiments, the one or more gaps 22 may comprise or be filled with a thermal interface material, such as a thermal epoxy, grease, adhesive, or the like, that may facilitate attachment of the heat spreader 20 while also providing additional thermal coupling within the recess 18. Since the heat spreader 20 is a structure that is attached to the electronic package 10 in certain embodiments, the thermal interface material may be provided between the heat spreader 20 and the substrate 12 in various locations, such as between the heat spreader 20 and the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2, between the heat spreader 20 and portions of the substrate 12 within the recess 18, and within the gaps 22 as described above.


For applications where reduced electromagnetic interference (EMI) is desirable, the heat spreader 20 may form an electromagnetic shield between the electronic devices 14-1, 14-2 within the recess 18 of the electronic package 10. In particular, the heat spreader 20 may comprise an electrically conductive metal that is electrically grounded within the recess 18 by way of a metallic structure 24 of the substrate 12. The metallic structure 24 may form one or more electrically grounded vias within the substrate 12 or, in alternative arrangements, an electrically grounded single metal block or embedded slug within the substrate 12. In this manner, electromagnetic emissions between the electronic devices 14-1, 14-2 that strike the heat spreader 20 are electrically shorted to ground, thereby reducing EMI or crosstalk. By forming the heat spreader 20 as an electromagnetic shield, sub-regions, or sub-channels, of the electronic package 10 are formed or divided on the substrate 12 by the heat spreader 20, each of which may be filled or occupied by sub-groups of the electronic devices 14-1, 14-2, portions of the overmold body 16, and the gaps 22. The heat spreader 20 may sub-divide the electronic package 10 to electrically isolate one or more of the electronic devices 14-1, 14-2 from each other. Accordingly, the heat spreader 20 may be configured to provide one or more of improved thermal spreading and improved EMI shielding for the electronic package 10. By providing a single element (e.g., the heat spreader 20) that provides both improved thermal dissipation and electromagnetic shielding, dimensions of the electronic package 10 may be scaled smaller for high frequency applications without sacrificing device performance, reliability, and life-time.



FIG. 1B is a top view of the electronic package 10 of FIG. 1A. In certain embodiments, the heat spreader 20 occupies a smaller surface area of the electronic package 10 than the overmold body 16. In other embodiments, the heat spreader 20 may be arranged to substantially cover the entire overmold body 16. While the heat spreader 20 is illustrated with a rectangular shape, many alternative shapes are contemplated without deviating from the concepts disclosed herein. For example, the shape of the heat spreader 20 from the top view may be tailored to different layouts of electronic devices (14-1, 14-2 of FIG. 1A) that vary for different applications.



FIG. 2A is a cross-sectional view of the electronic package 10 of FIG. 1A that includes or is mounted to a bottom heat sink 26. As illustrated, the bottom heat sink 26 is arranged such that the substrate 12 is between the bottom heat sink 26 and the electronic devices 14-1, 14-2. The bottom heat sink 26 may include a highly thermally conductive material, such as one or more metals, ceramics, plastics, and combinations thereof. In certain embodiments, the bottom heat sink 26 comprises Al or alloys thereof. The bottom heat sink 26 may be formed as an integrated piece of the electronic package 10, or the bottom heat sink 26 may form part of a larger housing or fixture the electronic package 10 is mounted to. Thermal interface material may be provided between the electronic package 10 and the bottom heat sink 26. In this arrangement, a heat dissipation path provided by the heat spreader 20 draws heat away from the top surfaces 14-1″, 14-2″ of the electronic device 14-1, 14-2, across portions of the overmold body 16, into the recess 18, and through the substrate 12 to the bottom heat sink 26. In certain embodiments, the metallic structure 24 of the substrate forms part of the heat dissipation path between the heat spreader 20 and the bottom heat sink 26. Additionally, for electromagnetic shielding applications, the heat spreader 20 may be electrically grounded to the bottom heat sink 26 by way of the metallic structure 24.



FIG. 2B is a cross-sectional view of the electronic package 10 of FIG. 2A that includes or is mounted to a top heat sink 28. Since the heat spreader 20 is accessible for thermal coupling above the electronic devices 14-1, 14-2, the top heat sink 28 may be arranged such that the electronic devices 14-1, 14-2 are between the top heat sink 28 and the substrate 12. In a similar manner to the bottom heat sink 26, the top heat sink 28 may include a highly thermally conductive material, such as one or more metals, ceramics, plastics, and combinations thereof. In certain embodiments, the top heat sink 28 comprises Al or alloys thereof. The top heat sink 28 may be formed as an integrated piece of the electronic package 10 or top heat sink 28 may form part of a larger housing or fixture the electronic package 10 is mounted to. In certain embodiments, a combination of the top heat sink 28 and the bottom heat sink 26 provides heat dissipation paths above and below the electronic devices 14-1, 14-2 for improved thermal management of device operating temperatures. In FIG. 2B, a thermal interface material 30, such as a thermal epoxy, grease or adhesive, is illustrated between the top heat sink 28 and the heat spreader 20; however, thermal interface materials may be present in other locations of the electronic package 10 as previously described. The thermal interface material 30 may provide a compliant thermal interface between the top heat sink 28 and the heat spreader 20. In other embodiments, the thermal interface material 30 may be omitted.



FIGS. 3A-3E are cross-sectional views of the electronic package 10 of FIG. 1A at various state of fabrication according to embodiments disclosed herein. In FIG. 3A, the electronic devices 14-1, 14-2 are mounted to the first face 12′ of the substrate 12. The metallic structure 24 is provided in the substrate 12 in an arrangement that is vertically positioned between the electronic devices 14-1, 14-2, although the metallic structure 24 may be provided in other locations depending on the application. In FIG. 3B, the overmold body 16 is formed over the substrate 12 and the electronic devices 14-1, 14-2. In certain embodiments, the overmold body 16 is formed to entirely cover the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2. The recess 18 may be formed in the overmold body 16 in a position that is registered with the metallic structure 24. In certain embodiments, the overmold body 16 and the recess 18 may be formed by a molding process where the substrate 12 and the electronic devices 14-1, 14-2 are loaded into a mold housing that includes a shape corresponding to the recess 18. The material of the overmold body 16 may then flow and be subsequently solidified or cured in other spaces of the mold housing, thereby forming the overmold body 16 and the recess 18. In certain embodiments, the molding process for the overmold body 16 comprises a film-assisted molding (FAM) process or a FAM transfer molding process. In other embodiments, the molding process may use a corresponding mold, mold frame, or mold chase tooling design without employing FAM techniques.


In FIG. 3C, the overmold body 16 is planarized to expose the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2. Planarizing the overmold body 16 may comprise a grinding or polishing step. In certain embodiments where the electronic devices 14-1, 14-2 are flip-chip mounted to the substrate 12, planarizing may be referred to as back grinding. In this manner, the top surface 16′ of the overmold body 16 is formed to be coplanar with the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2. While both top surfaces 14-1″, 14-2″ are illustrated as coplanar with the top surface 16′ of the overmold body 16, the electronic devices 14-1, 14-2 may have differing heights or thicknesses above the substrate 12. In certain embodiments, certain ones of the electronic devices 14-1, 14-2 that generate higher levels of operating heat may have greater heights or thicknesses than other electronic devices 14-1, 14-2. As such, the planarizing step may be halted such that only the certain ones of the electronic devices 14-1, 14-2 having the greatest heights are coplanar with the top surface 16′ of the overmold body 16.


In FIG. 3D, the heat spreader 20 is positioned over the substrate 12 such that a protrusion 20′ of the heat spreader 20 is registered with the recess 18. The heat spreader 20 may initially be formed as part of a larger foil or lead frame structure. The protrusion 20′ may be formed by a masked etching process, such as laser etching and the like. In FIG. 3E, the heat spreader 20 is attached or otherwise fixed to the electronic package 10, thereby forming the one or more gaps 22 between the heat spreader 20 and the overmold body 16. As previously described, embodiments with the gaps 22 allow larger alignment tolerances for placement of the heat spreader 20 within the recess 18.



FIG. 4 is a cross-sectional view of an electronic package 32 where the overmold body 16 is formed above the electronic devices 14-1, 14-2 according to embodiments disclosed herein. In certain embodiments, thermal management may be less of a concern for operating temperatures of certain electronic devices 14-1, 14-2. In this regard, the top surface 16′ of the overmold body 16 need not be formed coplanar with the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2. As illustrated, the top surface 16′ of the overmold body 16 is provided above the top surfaces 14-1″, 14-2″ of the electronic devices 14-1, 14-2 in a manner such that portions of the overmold body 16 are arranged between the heat spreader 20 and the electronic devices 14-1, 14-2. As such, the heat spreader 20 may comprise a metal frame structure that forms an electromagnetic shield between the first electronic device 14-1 and the second electronic device 14-2 while being thermally decoupled from the electronic devices 14-1, 14-2 by portions of the overmold body 16. As before, the one or more gaps 22 formed between the heat spreader 20 and the overmold body 16 may comprise one or more of air and a thermal interface material. In FIG. 4, the bottom heat sink 26 is provided as previously described for FIG. 2A. In certain embodiments, the electronic package 32 may further comprise the top heat sink (28 of FIG. 2B).



FIG. 5A is a cross-sectional view of an electronic package 34 where the overmold body 16 forms a plurality of recesses 18-1, 18-2 according to embodiments disclosed herein. The plurality of recesses 18-1, 18-2 may be formed in a similar manner to the recess 18 as described for FIG. 3B and FIG. 3C. In FIG. 5A, the recesses 18-1, 18-2 are formed along a periphery of the first face 12′ of substrate 12 relative to where the electronic devices 14-1, 14-2 are mounted. In this manner, the heat spreader 20 may be formed over the electronic devices 14-1, 14-2 and within the recesses 18-1, 18-2 to be electrically grounded to portions of the substrate 12 along the periphery of the electronic devices 14-1, 14-2. As illustrated, the heat spreader 20 may be electrically grounded by way of a plurality of metallic structures 24-1, 24-2 that are formed in the substrate 12. By electrically grounding the heat spreader 20 to the substrate 12 around the periphery of the electronic devices 14-1, 14-2, the heat spreader 20 forms an electromagnetic shield that is configured to suppress unwanted emissions from either escaping or entering the electronic package 34. In the cross-sectional view of FIG. 5A, the recesses 18-1, 18-2 appear in separate areas of the overmold body 16; however, in certain embodiments, the recesses 18-1, 18-2 may form a single continuous recess or border that extends along the substrate 12 to either partially or completely surround the electronic devices 14-1, 14-2 on first face 12′ the substrate 12. In this manner, the heat spreader 20 may form an electromagnetic shield that either partially or fully encloses the electronic devices 14-1, 14-2. When the heat spreader 20 is positioned within the recesses 18-1, 18-2, the one or more gaps 22 may be formed as previously described. As illustrated in FIG. 5A, the bottom heat sink 26 may be provided as previously described for FIG. 2A. FIG. 5B is a cross-sectional view of the electronic package 34 of FIG. 5A that further includes the top heat sink 28. As illustrated, in certain embodiments, the top heat sink 28 may be attached to the heat spreader 20 with or without the thermal interface material 30 as previously described.



FIG. 6A is a cross-sectional view of an electronic package 36 where the heat spreader 20 forms an electromagnetic shield around a periphery of the electronic devices 14-1, 14-2 and between the electronic devices 14-1, 14-2 according to embodiments disclosed herein. In this manner, the recesses 18-1, 18-2 are formed in the overmold body 16 as described for FIG. 5A, while a recess 18-3 is formed in the overmold body 16 as described for FIG. 1A. Corresponding metallic structures 24-1 to 24-3 of the substrate 12 are registered with corresponding ones of the recesses 18-1 to 18-3. As such, the heat spreader 20 may be electrically grounded between the electronic devices 14-1, 14-2 and along the periphery of the electronic devices 14-1, 14-2. In this arrangement, the heat spreader 20 provides electromagnetic shielding to reduce crosstalk between the electronic devices 14-1, 14-2 and to suppress unwanted emissions from either escaping or entering the electronic package 36. In certain embodiments, the recesses 18-1 to 18-3 may form a continuous recess or border that extends between and around the periphery of the electronic devices 14-1, 14-2 along the first face 12′ of the substrate 12. In other embodiments, one or more of the recess 18-1 to 18-3 may be discontinuous. For example, the recess 18-3 may extend between the electronic devices 14-1, 14-2 and be discontinuous with either of the other recesses 18-1, 18-2. When the heat spreader 20 is positioned within the recesses 18-1 to 18-3, the one or more gaps 22 may be formed as previously described. As illustrated in FIG. 6A, the bottom heat sink 26 may be provided as previously described for FIG. 2A. FIG. 6B is a cross-sectional view of the electronic package 36 of FIG. 6A that further includes the top heat sink 28. As illustrated, in certain embodiments, the top heat sink 28 may be attached to the heat spreader 20 with or without the thermal interface material 30 as previously described.



FIG. 7 is a partial perspective view of a lead frame structure 38 according to embodiments disclosed herein. The lead frame structure 38 may comprise a foil or a frame of metal where a plurality of the heat spreaders 20 have been formed. In certain embodiments, the lead frame structure 38 comprises one or more of Cu, Cu alloys, Al, and Al alloys. Each of the heat spreaders 20 and corresponding protrusions 20′ may be formed by an etching process, such as laser etching or masked laser etching as previously described. The plurality of heat spreaders 20 are connected by tabs 40 of the lead frame structure 38 that are subsequently severed to form individual ones of the heat spreaders 20. In certain embodiments, the lead frame structure 38 may be attached to an array of electronic devices (e.g., 10 of FIG. 1A) such that individual ones of the heat spreaders 20 are attached to corresponding electronic devices. Accordingly, the tabs 40 may be severed to form individual electronic devices, each of which includes one of the heat spreaders 20. In other embodiments, individual heat spreaders 20 may be singulated from the lead frame structure 38 prior to being attached to corresponding electronic devices.


In certain embodiments, any of the foregoing aspects, and/or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.


Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims
  • 1. An electronic package comprising: a substrate forming a first face and a second face that opposes the first face;a first electronic device mounted on the first face of the substrate;an overmold body on the first face of the substrate and arranged around peripheral edges of the first electronic device, the overmold body forming a first recess that extends through the overmold body to the first face of the substrate;a heat spreader arranged over the first electronic device such that the first electronic device is between the heat spreader and the substrate, and the heat spreader is further arranged within the first recess such that the heat spreader is thermally coupled to the first electronic device and the first face of the substrate; anda bottom heat sink on the second face of the substrate, wherein a heat dissipation path is formed between the heat spreader and the bottom heat sink that extends through the first recess and the substrate.
  • 2. The electronic package of claim 1, wherein a top surface of the overmold body is coplanar with a top surface of the first electronic device.
  • 3. The electronic package of claim 1, wherein an interface between the heat spreader and the first electronic device is devoid of the overmold body.
  • 4. The electronic package of claim 1, wherein a thermal interface material is arranged between the heat spreader and the substrate.
  • 5. The electronic package of claim 1, wherein a gap is formed between the heat spreader and the overmold body within the first recess.
  • 6. The electronic package of claim 5, wherein the gap comprises a thermal interface material.
  • 7. The electronic package of claim 1, further comprising a second electronic device mounted on the first face of the substrate, wherein the first recess is arranged between the first electronic device and the second electronic device.
  • 8. The electronic package of claim 7, wherein the heat spreader is electrically grounded to form an electromagnetic shield between the first electronic device and the second electronic device within the first recess.
  • 9. The electronic package of claim 8, further comprising a second recess that extends along a periphery of the first electronic device and the second electronic device such that the heat spreader further forms the electromagnetic shield around the periphery of the first electronic device and the second electronic device.
  • 10. The electronic package of claim 9, wherein the first recess is continuous with the second recess.
  • 11. The electronic package of claim 1, wherein the first recess is formed to surround the first electronic device on the first face of the substrate.
  • 12. The electronic package of claim 11, wherein the heat spreader forms an electromagnetic shield that encloses the first electronic device on the first face of the substrate.
  • 13. A method comprising: providing a substrate comprising a first face and a second face that opposes the first face;mounting a first electronic device on the first face of the substrate;forming an overmold body around peripheral edges of the first electronic device, the overmold body forming a recess that extends through the overmold body to the first face of the substrate;forming a heat spreader from a lead frame structure; andplacing the heat spreader over the first electronic device and within the recess such that the heat spreader is thermally coupled to the first electronic device and the first face of the substrate.
  • 14. The method of claim 13, wherein forming the overmold body comprises a film-assisted molding process.
  • 15. The method of claim 13, further comprising planarizing the overmold body to expose a top surface of the first electronic device before placing the heat spreader over the first electronic device.
  • 16. The method of claim 13, wherein a gap is formed between the heat spreader and the overmold body within the recess.
  • 17. An electronic package comprising: a substrate forming a first face and a second face that opposes the first face;a first electronic device mounted on the first face of the substrate;an overmold body on the first face of the substrate, the overmold body forming a first recess that extends through the overmold body to the first face of the substrate;a metal frame structure arranged over the overmold body and within the first recess such that the metal frame structure forms an electromagnetic shield for the first electronic device; anda bottom heat sink on the second face of the substrate, wherein a heat dissipation path is formed between the metal frame structure and the bottom heat sink that extends through the first recess and the substrate.
  • 18. The electronic package of claim 17, wherein a gap is formed between the metal frame structure and the overmold body within the first recess.
  • 19. The electronic package of claim 18, wherein the gap comprises a thermal interface material.
  • 20. The electronic package of claim 17, wherein a portion of the overmold body is arranged between the metal frame structure and the first electronic device.
  • 21. The electronic package of claim 17, further comprising a second electronic device mounted on the first face of the substrate, wherein the first recess is arranged between the first electronic device and the second electronic device such that the metal frame structure forms the electromagnetic shield between the first electronic device and the second electronic device.
  • 22. The electronic package of claim 21, further comprising a second recess that extends along a periphery of the first electronic device and the second electronic device such that the metal frame structure further forms the electromagnetic shield around the periphery of the first electronic device and the second electronic device.
  • 23. The electronic package of claim 22, wherein the first recess is continuous with the second recess.
RELATED APPLICATIONS

This application claims the benefit of provisional patent application Ser. No. 62/782,373, filed Dec. 20, 2018, the disclosure of which is hereby incorporated herein by reference in its entirety.

US Referenced Citations (261)
Number Name Date Kind
3566190 Huebner et al. Feb 1971 A
3907616 Wiemer Sep 1975 A
3907617 Zwernemann Sep 1975 A
4680676 Petratos et al. Jul 1987 A
5329695 Traskos et al. Jul 1994 A
5389738 Piosenka et al. Feb 1995 A
5406630 Piosenka et al. Apr 1995 A
5436203 Lin Jul 1995 A
5459368 Onishi et al. Oct 1995 A
5473512 Degani et al. Dec 1995 A
5592391 Muyshondt et al. Jan 1997 A
5623293 Aoki Apr 1997 A
5639989 Higgins, III Jun 1997 A
5646828 Degani et al. Jul 1997 A
5650659 Mostafazadeh et al. Jul 1997 A
5870289 Tokuda et al. Feb 1999 A
5977626 Wang et al. Nov 1999 A
6004180 Knall et al. Dec 1999 A
6011698 Buehler Jan 2000 A
6137693 Schwiebert et al. Oct 2000 A
6150193 Glenn Nov 2000 A
6163454 Strickler Dec 2000 A
6297957 Johnson et al. Oct 2001 B1
6429386 DiBene, II et al. Aug 2002 B2
6448583 Yoneda et al. Sep 2002 B1
6448793 Barratt et al. Sep 2002 B1
6466416 Honjo et al. Oct 2002 B1
6515870 Skinner et al. Feb 2003 B1
6534859 Shim et al. Mar 2003 B1
6538196 MacDonald et al. Mar 2003 B1
6590152 Horio et al. Jul 2003 B1
6599779 Shim et al. Jul 2003 B2
6613660 Kahlert et al. Sep 2003 B2
6633073 Rezvani et al. Oct 2003 B2
6657592 Dening et al. Dec 2003 B2
6707168 Hoffman et al. Mar 2004 B1
6717485 Kolb et al. Apr 2004 B2
6791795 Ohtomo et al. Sep 2004 B2
6807731 Brandenburg et al. Oct 2004 B2
6825560 Walker et al. Nov 2004 B1
6838750 Nuytkens et al. Jan 2005 B2
6887787 Farnworth May 2005 B2
6894229 Cheah May 2005 B1
6900383 Babb et al. May 2005 B2
6946324 McLellan et al. Sep 2005 B1
6947295 Hsieh Sep 2005 B2
6998532 Kawamoto et al. Feb 2006 B2
7030469 Mahadevan et al. Apr 2006 B2
7042398 Tang et al. May 2006 B2
7087461 Park et al. Aug 2006 B2
7087462 Park et al. Aug 2006 B1
7109410 Arnold et al. Sep 2006 B2
7109817 Kolb et al. Sep 2006 B2
7125744 Takehara et al. Oct 2006 B2
7148574 Lee et al. Dec 2006 B2
7187060 Usui Mar 2007 B2
7227719 Sasaki et al. Jun 2007 B2
7259041 Stelzl et al. Aug 2007 B2
7330084 Lee et al. Feb 2008 B2
7342303 Berry et al. Mar 2008 B1
7348663 Kirloskar et al. Mar 2008 B1
7433203 Yi et al. Oct 2008 B1
7443693 Arnold et al. Oct 2008 B2
7445968 Harrison et al. Nov 2008 B2
7451539 Morris et al. Nov 2008 B2
7478474 Koga Jan 2009 B2
7488903 Kawagishi et al. Feb 2009 B2
7514772 Kobayashi et al. Apr 2009 B2
7548430 Huemoeller et al. Jun 2009 B1
7598606 Chow et al. Oct 2009 B2
7633170 Yang et al. Dec 2009 B2
7633765 Scanlan et al. Dec 2009 B1
7635918 Yoshida Dec 2009 B2
7636245 Clancy et al. Dec 2009 B2
7643311 Coffy Jan 2010 B2
7651889 Tang et al. Jan 2010 B2
7665201 Sjoedin Feb 2010 B2
7671451 Lee et al. Mar 2010 B2
7700411 Yang et al. Apr 2010 B2
7701728 Hatanaka et al. Apr 2010 B2
7745910 Olson et al. Jun 2010 B1
7772046 Pagaila et al. Aug 2010 B2
7829981 Hsu Nov 2010 B2
7902643 Tuttle Mar 2011 B2
7902644 Huang et al. Mar 2011 B2
7928538 Salzman Apr 2011 B2
7989928 Liao et al. Aug 2011 B2
8013258 Wu Sep 2011 B2
8053872 Swan et al. Nov 2011 B1
8061012 Carey et al. Nov 2011 B2
8062930 Shah et al. Nov 2011 B1
8071431 Hoang et al. Dec 2011 B2
8084300 San Antonio et al. Dec 2011 B1
8093690 Ko et al. Jan 2012 B2
8093691 Fuentes et al. Jan 2012 B1
8110441 Chandra et al. Feb 2012 B2
8186048 Leahy et al. May 2012 B2
8220145 Hiner et al. Jul 2012 B2
8268677 Pagaila Sep 2012 B1
8296938 Carey et al. Oct 2012 B2
8296941 Hiner et al. Oct 2012 B2
8349659 Swan et al. Jan 2013 B1
8359739 Carey et al. Jan 2013 B2
8373264 Welch et al. Feb 2013 B2
8409658 Hiner et al. Apr 2013 B2
8410584 An et al. Apr 2013 B2
8434220 Rao et al. May 2013 B2
8507319 Chow et al. Aug 2013 B2
8552539 Foster Oct 2013 B1
8614899 Madsen et al. Dec 2013 B2
8664774 Mosinskis Mar 2014 B1
8720051 Leahy et al. May 2014 B2
8748230 Welch et al. Jun 2014 B2
8835226 Morris et al. Sep 2014 B2
8861221 Pagaila Oct 2014 B2
8959762 Leahy et al. Feb 2015 B2
8987889 Welch et al. Mar 2015 B2
9048020 Calvillo Cortes et al. Jun 2015 B2
9137934 Morris et al. Sep 2015 B2
9450547 Szymanowski et al. Sep 2016 B2
9589927 Szymanowski et al. Mar 2017 B2
9627230 Carey et al. Apr 2017 B2
9661739 Leahy et al. May 2017 B2
9935075 Huang et al. Apr 2018 B2
9978691 Kuo et al. May 2018 B2
20020036345 Iseki et al. Mar 2002 A1
20020118529 Babin et al. Aug 2002 A1
20020142516 Light Oct 2002 A1
20030011049 Nuytkens et al. Jan 2003 A1
20030048581 Ohtomo et al. Mar 2003 A1
20030062541 Warner Apr 2003 A1
20030090883 Asahi et al. May 2003 A1
20030151122 Davies Aug 2003 A1
20040063246 Karnezos Apr 2004 A1
20040103509 Bidard et al. Jun 2004 A1
20040104473 Farnworth Jun 2004 A1
20040178500 Usui Sep 2004 A1
20040209434 Seaford et al. Oct 2004 A1
20040214023 Park et al. Oct 2004 A1
20040222511 Zhang Nov 2004 A1
20040232536 Fukuzumi Nov 2004 A1
20040238934 Warner et al. Dec 2004 A1
20050046001 Warner Mar 2005 A1
20050153061 Nuytkens et al. Jul 2005 A1
20060033184 Park et al. Feb 2006 A1
20060113642 Kajiki et al. Jun 2006 A1
20060119448 Lee et al. Jun 2006 A1
20060151203 Krueger et al. Jul 2006 A1
20060223577 Ouzillou Oct 2006 A1
20060244131 Kobayashi et al. Nov 2006 A1
20060266547 Koga Nov 2006 A1
20060273467 Brandenburg Dec 2006 A1
20060273813 Coffy Dec 2006 A1
20060274517 Coffy Dec 2006 A1
20070030661 Morris et al. Feb 2007 A1
20070042593 Lee et al. Feb 2007 A1
20070045248 Schein et al. Mar 2007 A1
20070058748 Kim et al. Mar 2007 A1
20070062637 Sjoedin Mar 2007 A1
20070155053 Karnezos Jul 2007 A1
20070163802 Monthei Jul 2007 A1
20070200210 Zhao et al. Aug 2007 A1
20070221399 Nishizawa et al. Sep 2007 A1
20070222697 Caimi et al. Sep 2007 A1
20070290322 Zhao et al. Dec 2007 A1
20080019112 Hatanaka et al. Jan 2008 A1
20080054421 Dimaano et al. Mar 2008 A1
20080067645 Foong Mar 2008 A1
20080108179 Mistry et al. May 2008 A1
20080112151 Thompson et al. May 2008 A1
20080139013 Tomura et al. Jun 2008 A1
20080142938 Chow et al. Jun 2008 A1
20080157316 Yang Jul 2008 A1
20080210462 Kawagishi et al. Sep 2008 A1
20080224306 Yang Sep 2008 A1
20080308912 Cha et al. Dec 2008 A1
20080317188 Staszewski et al. Dec 2008 A1
20090000114 Rao et al. Jan 2009 A1
20090000815 Hiner et al. Jan 2009 A1
20090000816 Hiner et al. Jan 2009 A1
20090002969 Madsen et al. Jan 2009 A1
20090002970 Leahy et al. Jan 2009 A1
20090002971 Carey et al. Jan 2009 A1
20090002972 Carey et al. Jan 2009 A1
20090009979 Mori et al. Jan 2009 A1
20090016039 Imamura Jan 2009 A1
20090025211 Hiner et al. Jan 2009 A1
20090051011 Usami Feb 2009 A1
20090066588 Cheng et al. Mar 2009 A1
20090067149 Bogursky et al. Mar 2009 A1
20090072357 Tang et al. Mar 2009 A1
20090072364 Punzalan et al. Mar 2009 A1
20090079041 Huang et al. Mar 2009 A1
20090140402 Ohtani Jun 2009 A1
20090227273 McCune, Jr. Sep 2009 A1
20090233562 Kim et al. Sep 2009 A1
20090270054 Ridgers et al. Oct 2009 A1
20090302438 Chauhan et al. Dec 2009 A1
20090315156 Harper Dec 2009 A1
20100032815 An et al. Feb 2010 A1
20100051343 Lam Mar 2010 A1
20100052125 Sasaki et al. Mar 2010 A1
20100123233 Yoon et al. May 2010 A1
20100199492 Hiner et al. Aug 2010 A1
20100207258 Eun et al. Aug 2010 A1
20100224992 McConnelee et al. Sep 2010 A1
20100279730 Ortiz Nov 2010 A1
20110003435 Tang et al. Jan 2011 A1
20110014880 Nicolson et al. Jan 2011 A1
20110017263 Gibson et al. Jan 2011 A1
20110038136 Carey et al. Feb 2011 A1
20110084368 Hoang et al. Apr 2011 A1
20110084378 Welch et al. Apr 2011 A1
20110085314 Franz Apr 2011 A1
20110114369 Lee et al. May 2011 A1
20110182048 Roethlingshoefer et al. Jul 2011 A1
20110225803 Hiner et al. Sep 2011 A1
20110235282 Leahy et al. Sep 2011 A1
20110298109 Pagaila et al. Dec 2011 A1
20110298110 Pagaila et al. Dec 2011 A1
20110298670 Jung et al. Dec 2011 A1
20110316657 Park et al. Dec 2011 A1
20120002377 French et al. Jan 2012 A1
20120025356 Liao et al. Feb 2012 A1
20120044653 Morris et al. Feb 2012 A1
20120074538 Tsai et al. Mar 2012 A1
20120075821 Pagaila Mar 2012 A1
20120126378 San Antonio et al. May 2012 A1
20120139640 Calvillo Cortes et al. Jun 2012 A1
20120182706 Siomkos et al. Jul 2012 A1
20120217048 Leahy et al. Aug 2012 A1
20120217624 Morris et al. Aug 2012 A1
20120218729 Carey et al. Aug 2012 A1
20120270371 DeBar et al. Oct 2012 A1
20120286415 Sakai et al. Nov 2012 A1
20130324069 Chen et al. Dec 2013 A1
20140077349 Higgins, III Mar 2014 A1
20140097007 Nagai et al. Apr 2014 A1
20140182920 Yanagisawa et al. Jul 2014 A1
20140262442 Nomura et al. Sep 2014 A1
20140268587 Nomura et al. Sep 2014 A1
20140307394 Lobianco et al. Oct 2014 A1
20140340859 Morris et al. Nov 2014 A1
20140353807 Welch Dec 2014 A1
20140355222 Dang et al. Dec 2014 A1
20150091157 Chi et al. Apr 2015 A9
20150124421 Leahy et al. May 2015 A1
20150170986 Szymanowski et al. Jun 2015 A1
20150296631 Morris et al. Oct 2015 A1
20160087588 Szymanowski et al. Mar 2016 A1
20160148882 Kim et al. May 2016 A1
20160211222 Kuo et al. Jul 2016 A1
20170117230 Kumbhat et al. Apr 2017 A1
20170118877 Kumbhat et al. Apr 2017 A1
20170127581 Figueredo et al. May 2017 A1
20170133326 Dang et al. May 2017 A1
20170194281 DeLaCruz et al. Jul 2017 A1
20180033764 Huang et al. Feb 2018 A1
20180130755 Lee et al. May 2018 A1
20190371738 Morris et al. Dec 2019 A1
20200008327 Lear et al. Jan 2020 A1
Foreign Referenced Citations (25)
Number Date Country
1855451 Nov 2006 CN
1715520 Oct 2006 EP
1717857 Nov 2006 EP
1764834 Mar 2009 EP
H11163583 Jun 1999 JP
2004207352 Jul 2004 JP
2005039007 Feb 2005 JP
2005109306 Apr 2005 JP
2006332255 Dec 2006 JP
2007311396 Nov 2007 JP
2011523120 Aug 2011 JP
5254446 Aug 2013 JP
20060113412 Nov 2006 KR
201108360 Mar 2011 TW
201142965 Dec 2011 TW
0035085 Jun 2000 WO
03058812 Jul 2003 WO
2004019490 Mar 2004 WO
2004060034 Jul 2004 WO
2007060784 May 2007 WO
2007132560 Nov 2007 WO
2009099699 Aug 2009 WO
2009144960 Dec 2009 WO
2010014103 Feb 2010 WO
2010021262 Feb 2010 WO
Non-Patent Literature Citations (129)
Entry
Hearing Notice for Indian Patent Application No. 8469/DELNP/2009, mailed Dec. 26, 2019, 3 pages.
Notice of Allowance for U.S. Appl. No. 16/390,761, dated Mar. 24, 2020, 7 pages.
Notice of Allowance for U.S. Appl. No. 11/952,690, dated Aug. 30, 2010, 9 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,690, dated Mar. 25, 2010, 9 pages.
Non-Final Rejection for U.S. Appl. No. 12/913,364, dated Feb. 13, 2012, 6 pages.
Notice of Allowance for U.S. Appl. No. 12/913,364, dated Jun. 8, 2012, 8 pages.
Non-Final Office Action for U.S. Appl. No. 13/189,838, dated Mar. 14, 2014, 14 pages.
Final Office Action for U.S. Appl. No. 13/189,838, dated Jun. 19, 2014, 10 pages.
Advisory Action for U.S. Appl. No. 13/189,838, dated Aug. 28, 2014, 2 pages.
Non-Final Office Action for U.S. Appl. No. 13/189,838, dated Oct. 28, 2014, 11 pages.
Final Office Action for U.S. Appl. No. 13/189,838, dated Feb. 20, 2015, 13 pages.
Non-Final Office Action for U.S. Appl. No. 13/034,755, dated Aug. 15, 2013, 6 pages.
Final Office Action for U.S. Appl. No. 13/034,755, dated Jan. 31, 2014, 10 pages.
Advisory Action for U.S. Appl. No. 13/034,755, dated Mar. 4, 2014, 3 pages.
Notice of Allowance for U.S. Appl. No. 13/034,755, dated Oct. 17, 2014, 7 pages.
Non-Final Office Action for U.S. Appl. No. 13/034,787, dated Jan. 16, 2013, 9 pages.
Final Office Action for U.S. Appl. No. 13/034,787, dated Mar. 19, 2013, 9 pages.
Advisory Action for U.S. Appl. No. 13/034,787, dated May 17, 2013, 3 pages.
Non-Final Office Action for U.S. Appl. No. 13/034,787, dated Aug. 9, 2013, 9 pages.
Final Office Action for U.S. Appl. No. 13/034,787, dated Nov. 15, 2013, 12 pages.
Advisory Action for U.S. Appl. No. 13/034,787, dated Jan. 27, 2014, 4 pages.
Advisory Action for U.S. Appl. No. 13/034,787, dated Feb. 26, 2014, 4 pages.
Notice of Allowance for U.S. Appl. No. 13/034,787, dated May 1, 2014, 9 pages.
Corrected Notice of Allowability for U.S. Appl. No. 13/034,787, dated Jul. 29, 2014, 5 pages.
Non-Final Office Action for U.S. Appl. No. 12/797,381, dated Jan. 8, 2013, 20 pages.
Final Office Action for U.S. Appl. No. 12/797,381, dated May 16, 2013, 19 pages.
Advisory Action for U.S. Appl. No. 12/797,381, dated Jul. 17, 2013, 3 pages.
Examiner's Answer for U.S. Appl. No. 12/797,381, dated Dec. 31, 2013, 6 pages.
Final Office Action for U.S. Appl. No. 13/036,272, dated Oct. 20, 2014, 6 pages.
Advisory Action for U.S. Appl. No. 13/036,272, dated Jan. 8, 2015, 3 pages.
Author Unknown, “Cho-Shield Conductive Coatings,” Chomerics—EMI Products, Copyright: 2001, 1 page, Retrieved from http://www.chomerics.com/products/choshield_coatings.htm.
Author Unknown, “Cho-Shield Conductive Coatings,” Chomerics: A Division of Parker Hannifin Corporation, Dec. 8, 2000, 3 pages, Retrieved from: http://www.chomerics.com/products/choshield_coatings.htm.
Author Unknown, “Fractional-N RF Synthesizer with Modulator and Digital IF Filter (RF6001),” RF Micro Devices: Part of the Polaris Total Radio Solution, 2005, 2 pages.
Notice of Allowance for U.S. Appl. No. 13/189,838, dated May 4, 2015, 8 pages.
Notice of Allowance for U.S. Appl. No. 13/189,838, dated Jul. 30, 2015, 5 pages.
Non-Final Office Action for U.S. Appl. No. 13/036,272, dated Apr. 14, 2015, 7 pages.
Non-Final Office Action for U.S. Appl. No. 14/447,847, dated May 7, 2015, 7 pages.
Final Office Action for U.S. Appl. No. 14/447,847, dated Sep. 14, 2015, 8 pages.
Non-Final Office Action for U.S. Appl. No. 13/906,892, dated Aug. 10, 2015, 10 pages.
International Preliminary Report on Patentability and Written Opinion for International Patent Application No. PCT/US2008/068153, dated Jan. 5, 2010, 6 pages.
Non-Final Office Action for U.S. Appl. No. 14/595,401, dated Mar. 28, 2016, 14 pages.
Examination Report for Indian Patent Application No. 8469/DELNP/2009, dated Apr. 11, 2017, 7 pages.
Final Office Action for U.S. Appl. No. 14/595,401, dated Oct. 6, 2016, 15 pages.
Notice of Allowance for U.S. Appl. No. 14/595,401, dated Jan. 6, 2017, 8 pages.
Non-Final Office Action for U.S. Appl. No. 14/750,384, dated Aug. 10, 2017, 9 pages.
Notice of Allowance for U.S. Appl. No. 14/750,384, dated Nov. 22, 2017, 8 pages.
Decision on Appeal for U.S. Appl. No. 12/797,381, mailed Mar. 11, 2016, 6 pages.
Final Office Action for U.S. Appl. No. 13/036,272, dated Nov. 19, 2015, 9 pages.
Advisory Action for U.S. Appl. No. 13/036,272, dated Feb. 5, 2016, 3 pages.
Non-Final Office Action for U.S. Appl. No. 13/036,272, dated Apr. 8, 2016, 7 pages.
Notice of Allowance for U.S. Appl. No. 13/036,272, dated Sep. 30, 2016, 5 pages.
Final Office Action for U.S. Appl. No. 14/447,847, dated Dec. 11, 2015, 8 pages.
Notice of Allowance for U.S. Appl. No. 11/199,319, dated Oct. 2, 2008, 6 pages.
Non-Final Office Action for U.S. Appl. No. 11/435,913, dated May 21, 2010, 5 pages.
Final Office Action for U.S. Appl. No. 11/435,913, dated Nov. 17, 2009, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/435,913, dated Mar. 2, 2009, 8 pages.
Final Office Action for U.S. Appl. No. 11/435,913, dated Aug. 15, 2008, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/435,913, dated Jan. 7, 2008, 7 pages.
Non-Final Office Action for U.S. Appl. No. 11/768,014, dated Jan. 21, 2009, 9 pages.
Non-Final Office for U.S. Appl. No. 11/768,014, dated Mar. 25, 2010, 9 pages.
Non-Final Office for U.S. Appl. No. 11/768,014, dated Jul. 10, 2009, 7 pages.
Notice of Allowance for U.S. Appl. No. 13/187,814, dated Sep. 10, 2012, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,484, dated Jan. 8, 2010, 17 pages.
Final Office Action for U.S. Appl. No. 11/952,484, dated Oct. 5, 2010, 19 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,484, dated Oct. 27, 2011, 22 pages.
Non-Final Office Action for U.S. Appl. No. 13/415,643, dated Jan. 3, 2013, 17 pages.
Quayle Action for U.S. Appl. No. 13/415,643, mailed Jul. 11, 2013, 6 pages.
Notice of Allowance for U.S. Appl. No. 13/415,643, dated Aug. 15, 2013, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,513, dated May 10, 2011, 19 pages.
Final Office Action for U.S. Appl. No. 11/952,513, dated Oct. 26, 2011, 16 pages.
Notice of Allowance for U.S. Appl. No. 11/952,513, dated Mar. 6, 2012, 9 pages.
Non-Final Office Action for U.S. Appl. No. 13/117,284, dated Nov. 9, 2011, 12 pages.
Final Office Action for U.S. Appl. No. 13/117,284, dated Feb. 29, 2012, 8 pages.
Notice of Allowance for U.S. Appl. No. 13/117,284, dated May 1, 2012, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,545, dated Oct. 23, 2009, 12 pages.
Non-Final Office Action for U.S. Appl. No. 12/766,347, dated Jun. 29, 2012, 11 pages.
Notice of Allowance for U.S. Appl. No. 11/952,592, dated Aug. 6, 2012, 7 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,592, dated Sep. 19, 2011, 9 pages.
Final Office Action for U.S. Appl. No. 11/952,592, dated Feb. 24, 2011, 9 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,592, dated Dec. 15, 2010, 9 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,592, dated Jul. 28, 2009, 7 pages.
Final Office Action for U.S. Appl. No. 11/952,592, dated Apr. 16, 2010, 8 pages.
Final Office Action for U.S. Appl. No. 11/952,592, dated Jan. 18, 2012, 10 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,592, dated Jun. 12, 2012, 10 pages.
Notice of Allowance for U.S. Appl. No. 11/952,617, dated Jan. 8, 2013, 8 pages.
Notice of Allowance for U.S. Appl. No. 11/952,617, dated Jun. 4, 2012, 9 pages.
Final Office Action for U.S. Appl. No. 11/952,617, dated Feb. 16, 2012, 7 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,617, dated Jul. 28, 2011, 9 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,617, dated Sep. 26, 2008, 10 pages.
Final Office Action for U.S. Appl. No. 11/952,617, dated Nov. 20, 2009, 16 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,634, dated Jun. 13, 2011, 7 pages.
Final Office Action for U.S. Appl. No. 11/952,634, dated Feb. 1, 2011, 7 pages.
Final Office Action for U.S. Appl. No. 11/952,634, dated Dec. 23, 2010, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,634, dated Jul. 21, 2010, 7 pages.
Notice of Allowance for U.S. Appl. No. 13/151,499, dated Dec. 19, 2013, 8 pages.
International Search Report for PCT/US2008/068153, dated Dec. 9, 2008, 3 pages.
Office Action for Chinese Patent Application No. 200880104171.1, dated Jun. 2, 2011, 20 pages.
Second Office Action for Chinese Patent Application No. 200880104171.1, dated Feb. 16, 2012, 8 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,670, dated Jun. 22, 2011, 4 pages.
Non-Final Office Action for U.S. Appl. No. 11/952,670, dated May 27, 2010, 6 pages.
Notice of Allowance for U.S. Appl. No. 11/952,670, dated Oct. 21, 2009, 6 pages.
Notice of Allowance for U.S. Appl. No. 11/952,670, dated Aug. 24, 2012, 7 pages.
Non-Final Office Action for U.S. Appl. No. 16/372,910, dated Mar. 30, 2020, 13 pages.
International Search Report and Written Opinion for International Patent Application No. PCT/US2019/066721, dated Apr. 24, 2020, 16 pages.
Notice of Allowance for U.S. Appl. No. 14/447,847, dated Feb. 29, 2016, 7 pages.
Notice of Allowance for U.S. Appl. No. 14/447,847, dated Mar. 31, 2016, 7 pages.
Corrected Notice of Allowability for U.S. Appl. No. 14/447,847, dated Jul. 15, 2016, 4 pages.
Final Office Action for U.S. Appl. No. 13/906,892, dated Feb. 11, 2016, 10 pages.
Advisory Action for U.S. Appl. No. 13/906,892, dated Jun. 15, 2016, 2 pages.
Final Office Action for U.S. Appl. No. 13/906,892, dated Aug. 26, 2016, 11 pages.
Advisory Action for U.S. Appl. No. 13/906,892, dated Nov. 28, 2016, 3 pages.
Final Office Action for U.S. Appl. No. 13/906,892, dated Dec. 15, 2016, 11 pages.
Advisory Action for U.S. Appl. No. 13/906,892, dated Mar. 14, 2017, 3 pages.
Non-Final Office Action for U.S. Appl. No. 13/906,892, dated Apr. 3, 2017, 9 pages.
Notice of Allowance for U.S. Appl. No. 13/906,892, dated May 19, 2017, 9 pages.
Non-Final Office Action for U.S. Appl. No. 16/390,761, dated Dec. 27, 2019, 9 pages.
Final Office Action for U.S. Appl. No. 16/372,910, dated Aug. 13, 2020, 13 pages.
Advisory Action for U.S. Appl. No. 16/372,910, dated Oct. 27, 2020, 3 pages.
Non-Final Office Action for U.S. Appl. No. 16/390,761, dated Aug. 20, 2020, 9 pages.
Non-Final Office Action for U.S. Appl. No. 16/893,941, dated Sep. 23, 2020, 8 pages.
Non-Final Office Action for U.S. Appl. No. 16/417,815, dated Sep. 16, 2020, 14 pages.
Non-Final Office Action for U.S. Appl. No. 16/372,910, dated Dec. 31, 2020, 13 pages.
Final Office Action for U.S. Appl. No. 16/390,761, dated Dec. 28, 2020, 8 pages.
Advisory Action for U.S. Appl. No. 16/390,761, dated Feb. 25, 2021, 3 pages.
Notice of Allowance for U.S. Appl. No. 16/893,941, dated Feb. 26, 2021, 7 pages.
Notice of Allowance for U.S. Appl. No. 16/372,910, dated May 18, 2021, 8 pages.
Non-Final Office Action for U.S. Appl. No. 16/390,761, dated Apr. 15, 2021, 6 pages.
Non-Final Office Action for U.S. Appl. No. 16/417,815, dated Mar. 22, 2021, 15 pages.
International Preliminary Report on Patentability for International Patent Application No. PCT/US2019/066721, dated Jul. 1, 2021, 10 pages.
Related Publications (1)
Number Date Country
20200203248 A1 Jun 2020 US
Provisional Applications (1)
Number Date Country
62782373 Dec 2018 US