EXPOSURE MASK AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME

Abstract
A method for manufacturing a semiconductor device comprises forming a photoresist pattern by an exposure process with an exposure mask including a shifter pattern and further performing a reflow process on the photoresist pattern to obtain a line/space pattern having a wave type with a uniform a pattern line-width and an improved profile.
Description
BACKGROUND OF THE INVENTION

The present invention generally relates to an exposure mask and a method for manufacturing a semiconductor device using the same, and more specifically, to a technology of forming a photoresist pattern by an exposure and developing process with an exposure mask including a shifter pattern and further performing a reflow process on the photoresist pattern to obtain a line/space pattern of a wave type with a uniform a pattern line-width and an improved profile.


As semiconductor devices have become smaller recently, the pattern transformation and the Optical Proximity Correction (OPC) process have overcome defects generated by a photo process due to large memory capacity.


BRIEF SUMMARY OF THE INVENTION

Various embodiments of the present invention are directed at providing an exposure mask and a method for manufacturing a semiconductor device using the same which comprises forming a photoresist pattern by an exposure and developing process with an exposure mask including a shifter pattern and further performing a reflow process on the photoresist pattern.


According to an embodiment of the present invention, an exposure mask for fabricating a semiconductor device comprises a substrate, and first and second island type shifter patterns. The substrate includes a transparent pattern, a first opaque pattern, a second opaque pattern neighboring the first opaque pattern and a third opaque pattern neighboring the second opaque pattern. The first island type shifter pattern is formed overlapping with the transparent pattern. The second island type shifter pattern is formed between the second opaque pattern and the third opaque pattern, and overlapping with the transparent pattern. The first island type shifter pattern and the second island type shifter pattern are arranged diagonally. The opaque patterns are formed of chromium (Cr). The shifter patterns are formed of molybdenum silicon (MoSi). The opaque patterns are each a line/space pattern of a straight type. In one embodiment of the present invention, the shifter patterns are straight, circular, lozenge-shaped (i.e., diamond-shaped), or square.


According to an embodiment of the present invention, a method for manufacturing a semiconductor device comprises: forming a photoresist film over a semiconductor substrate; performing an exposure process with the above-described exposure mask to form a line/space of wave type photoresist pattern; and performing a reflow process on the photoresist pattern. The photoresist film includes a base resin with one or more repeating units selected from the group consisting of vinyl phenol, poly hydroxyl styrene, polynorbonene, poly Amanda, poly imide, polyacrylate, polymeta acrylate and combinations thereof. The reflow process is performed at a temperature ranging from about 80° C. to about 250° C. The reflow process is performed for about 5 seconds to about 100 seconds.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a layout illustrating a conventional exposure mask.



FIG. 2 is a cross-sectional diagram illustrating an exposure mask of a semiconductor device according to an embodiment of the present invention.



FIGS. 3
a through 3c are diagrams illustrating a method for manufacturing a semiconductor device using the exposure mask according to an embodiment of the present invention.





DETAILED DESCRIPTION OF THE SPECIFIC EMBODIMENT

The present invention will be described in detail with reference to the accompanying drawings.



FIG. 1 is a layout illustrating a conventional exposure mask. The exposure mask comprises a transparent pattern 10 and an opaque pattern 20 that is a line/space pattern 20 of a straight type.


When the line/space pattern is formed with the exposure mask, the formation process requires a change in consideration of operation factors of devices. Although the exposure mask including the line/space pattern has excellent characteristics, it is difficult to change the exposure mask by the OPC process. As a result, the process margin is reduced.



FIG. 2 is a cross-sectional diagram illustrating an exposure mask for a semiconductor device according to an embodiment of the present invention. The exposure mask comprises a shifter pattern 115 formed over a substrate 105 including a transparent pattern 100 and an opaque pattern 110.


The opaque pattern 110, which is formed of chromium (Cr), is a line/space pattern of a straight type. The shifter pattern 115, which is formed of molybdenum silicon (MoSi), is formed in a region where a pattern having a larger line-width than the designed line-width or a line/space pattern of a wave type is formed. In some embodiments, the shifter pattern 115 is formed over the opaque pattern 110. The shifter pattern 115, however, may be overlapped with the transparent pattern 100.


FIG. 2(ii) shows an electric field over the exposure mask passed through structure FIG. 2(i). FIG. 2(iii) shows an electric field over a wafer. FIG. 2(iv) shows the intensity of the electric field over the wafer.


A light source energy of the region where the shifter pattern 115 is formed is different from that of the region where the shifter pattern 115 is not formed. The shifter pattern 115 is selectively positioned on the exposure mask 105, so that the light source energy corresponding to the shifter pattern 115 is applied to a photoresist film formed over the wafer.


As a result, different parts of the photoresist film are developed to different degrees during the developing process. The photoresist film is converted to a photoresist pattern having a line/space pattern of a wave type.


A pattern having a large line-width or a line/space pattern of a wave type is formed by an energy difference of the light sources passed through the region where the shifter pattern 115 is formed and through the region where the shifter pattern 115 is not formed.



FIGS. 3
a through 3c are diagrams illustrating a method for manufacturing a semiconductor device using the exposure mask of FIG. 2 according to an embodiment of the present invention.



FIG. 3
a shows the bottom of the exposure mask comprising a first shifter pattern 115a and a second shifter pattern 115b extending over the transparent pattern 100, a first opaque pattern 110a, a second opaque pattern 110b and a third opaque pattern 110c. The first opaque pattern 110a is formed neighboring the second opaque pattern 110b, and the second opaque pattern 110b is formed neighboring the third opaque pattern 110c. The first opaque pattern 110a, the second opaque pattern 110b and the third opaque pattern 110c, which are formed of chromium (Cr), may be a line/space pattern of a straight type or a contact hole pattern.


The first shifter pattern 115a and the second shifter pattern 115b are formed of molybdenum silicon (MoSi). The first shifter pattern 115a and the second shifter pattern 115b are formed where a line-width of the pattern is formed to be larger or where a line/space pattern of a wave type is formed.


In one embodiment of the present invention, the first shifter pattern 115a and the second shifter pattern 115b are island-type patterns. In some embodiments, the first shifter pattern 115a and the second shifter pattern 115b are formed to be straight, circular, lozenge-shaped (i.e., diamond-shaped), square, or other shapes according to the application.



FIG. 3
b shows a simulation image of the pattern after the exposure process with the exposure mask of FIG. 3a and the reflow process. FIG. 3c shows the pattern formed over the substrate after the reflow process is performed at approximately 135° C. for approximately 95 seconds.



FIG. 3
b and FIG. 3c are diagrams illustrating according to the method for manufacturing a semiconductor device using the exposure mask of FIG. 3a accordance with an embodiment of the present invention,



FIGS. 3
b and 3c show a method for manufacturing a semiconductor device with an exposure mask of FIG. 3a, wherein (i) is a plane diagram and (ii) is a cross-sectional diagram taken along X-X′ of (i).


A photoresist film (not shown) is formed over a semiconductor substrate 200.


An exposure process is performed using the exposure mask of FIG. 3a to form a pattern having a larger line-width than that of the designed pattern or the first photoresist pattern 210 which is a line/space pattern of a wave type.


In some embodiments, the exposure process is performed with a light source selected from the group consisting of i-line, KrF, ArF, EUV, E-Beam, and X-ray.


In the present embodiment, the photoresist film comprising a base resin with one or more repeating unit selected from the group consisting of vinyl phenol, poly hydroxyl styrene, polynorbonene, poly Amanda, poly imide, polyacrylate, polymeta acrylate and combination thereof. Such a photoresist film has been disclosed in U.S. Pat. No. 5,212,043, U.S. Pat. No. 5,750,680, U.S. Pat. No. 6,051,678, U.S. Pat. No. 6,132,926, U.S. Pat. No. 6,143,463, U.S. Pat. No. 6,150,069, U.S. Pat. No. 6,180,316 B1, U.S. Pat. No. 6,225,020 B1, U.S. Pat. No. 6,235,448 B1, and U.S. Pat. No. 6,235,447 B1, which are incorporated by reference.


A reflow process is performed on the first photoresist pattern 210 to form a second photoresit pattern 210a. The reflow process is performed to remove the residual solvent in a developing process for forming the first photoresist pattern 210.


The reflow process has been disclosed in Japanese Journal of Applied Physics (Vol. 37 (1998) pp. 6863-6868) The reflow process is performed at a glass transition temperature in the present embodiment, e.g., at a temperature ranging from about 80° C. to about 1650° C., more preferably from about 250° C. to about 600° C. The reflow process is performed in an oven for about 5 seconds to about 100 seconds in the present embodiment.


After the exposure process, a line/space pattern of a large wave type is formed by a chemical reaction difference between the region where the first shifter pattern 115a or the second shifter pattern 115b is provided and the region where the first shifter pattern 115a or the second shifter pattern 115b is not provided, during the reflow process of the first photoresist pattern 210.


As described above, in a method for manufacturing a semiconductor device according to an embodiment of the present invention, a shifter pattern is formed on an exposure mask comprising a opaque pattern which is a line/space pattern of a straight type so that a line/space pattern of a wave type or a pattern of a large line-width is formed to reduce the number of exposure used.


The above embodiments of the present invention are illustrative and not limitative. Various alternatives and equivalents are possible. The invention is not limited by the lithography steps described herein. Nor is the invention limited to any specific type of semiconductor device. For example, the present invention may be implemented in a dynamic random access memory (DRAM) device or non volatile memory device. Other additions, subtractions, or modifications are obvious in view of the present disclosure and are intended to fall within the scope of the appended claims.

Claims
  • 1. An exposure mask for fabricating a semiconductor device, the mask comprising: a substrate including a transparent pattern, a first opaque pattern, a second opaque pattern neighboring the first opaque pattern and a third opaque pattern neighboring the second opaque pattern;a first island type shifter pattern formed overlapping with the transparent pattern; anda second island type shifter pattern formed between the second opaque pattern and the third opaque pattern, and overlapping with the transparent pattern,wherein the first island type shifter pattern and the second island type shifter pattern are arranged diagonally.
  • 2. The exposure mask according to claim 1, wherein the first opaque pattern, the second opaque pattern and the third opaque pattern are a line/space pattern of a straight type.
  • 3. The exposure mask of claim 2, wherein the first shifter pattern and the second shifter pattern are formed in a region such that the first shifter pattern and the second shifter pattern have a larger line-width than the line/space pattern.
  • 4. The exposure mask according to claim 1, wherein the first opaque pattern, the second opaque pattern and the third opaque pattern are formed of chromium (Cr).
  • 5. The exposure mask according to claim 1, wherein the first shifter pattern and the second shifter patter are formed of molybdenum silicon (MoSi).
  • 6. The exposure mask according to claim 1, wherein the first shifter pattern and the second shifter pattern are straight, circular, lozenge-shaped, or square.
  • 7. The exposure mask of claim 1, wherein the first shifter pattern and the second shifter pattern are provided below the first opaque pattern, the second opaque pattern or the third opaque pattern.
  • 8. A method for manufacturing a semiconductor device, the method comprising: forming a photoresist film over a semiconductor substrate;performing an exposure process with an exposure mask of claim 1 to form a line/space of wave type photoresist pattern; andperforming a reflow process on the photoresist pattern.
  • 9. The method according to claim 8, wherein the photoresist film comprising a base resin with one or more repeating units selected from the group consisting of vinyl phenol, poly hydroxyl styrene, polynorbonene, poly Amanda, poly imide, polyacrylate, polymeta acrylate and combinations thereof.
  • 10. The method according to claim 8, wherein the reflow process is performed at a temperature ranging from about 80° C. to about 1650° C.
  • 11. The method according to claim 8, wherein the reflow process is performed at a temperature ranging from about 250° C. to about 600° C.
  • 12. The method according to claim 8, wherein the reflow process is performed for about 5 seconds to about 100 seconds.
Priority Claims (1)
Number Date Country Kind
10-2006-0067912 Jul 2006 KR national
CROSS-REFERENCES TO RELATED APPLICATIONS

The present application is a continuation-in-part of U.S. patent application Ser. No. 11/617,658, filed on Dec. 28, 2006, and which claims priority to Korean patent application number 10-2006-0067912, filed on Jul. 20, 2006, both of which are incorporated by reference in their entirety.

Continuation in Parts (1)
Number Date Country
Parent 11617658 Dec 2006 US
Child 12696964 US