Claims
- 1. A method of forming a partially filled via in a circuit board layer comprising the steps of:(a) providing a circuit board layer, the circuit board layer having a first surface, a second surface, and defining a via; (b) filling a portion of the via with a non-conductive plug material in a volatile solvent; (c) evaporating the volatile solvent; and (d) curing the non-conductive plug material to form a partially filled via.
- 2. The method of claim 1 wherein step (a) comprises:(a-a) providing a circuit board layer, the circuit board layer having a first surface, a second surface, and defining a via; and (a-b) plating the via with a conductive material.
- 3. The method of claim 1 wherein the non-conductive plug material is selected from the group consisting of polymer based thermosets, polymer based thermoplastics, and solder masks.
- 4. The method of claim 1 wherein step (b) comprises filling a portion of the via with a non-conductive plug material in a volatile solvent wherein the non-conductive plug material does not extend all the way through the via to the solder side of the circuit board layer.
- 5. The method of claim 1 wherein step (c) comprises evaporating the volatile solvent at a controlled rate, such that the creation of one or more voids in the non-conductive plug material is minimized.
- 6. The method of claim 5 wherein step (c) comprises evaporating the volatile solvent at a temperature between about 40° C. and about 100° C. for between about 30 minutes and about 90 minutes.
- 7. A circuit board layer comprising a partially filled via, the partially filled via having been formed by a method comprising the steps of:(a) providing a circuit board layer, the circuit board layer having a first surface, a second surface, and defining a via; (b) filling a portion of the via with a non-conductive plug material in a volatile solvent; (c) evaporating the volatile solvent; and (d) curing the non-conductive plug material to form a partially filled via.
- 8. The circuit board layer of claim 7 wherein step (a) comprises:(a-a) providing a circuit board layer, the circuit board layer having a first surface, a second surface, and defining a via; and (a-b) plating the via with a conductive material.
- 9. The circuit board layer of claim 7 wherein the non-conductive plug material is selected from the group consisting of polymer based thermosets, polymer based thermoplastics, and solder masks.
- 10. The circuit board layer of claim 7 wherein step (b) comprises filling a portion of the via with a non-conductive plug material in a volatile solvent wherein the non-conductive plug material does not extend all the way through the via to the solder side of the circuit board layer.
- 11. The circuit board layer of claim 7 wherein step (c) comprises evaporating the volatile solvent at a controlled rate, such that the creation of one or more voids in the non-conductive plug material is minimized.
- 12. The circuit board layer of claim 11 wherein step (c) comprises evaporating the volatile solvent at a temperature between about 40° C. to about 100° C. for between about 30 minutes and about 90 minutes.
RELATED APPLICATIONS
This application is a continuation-in-part of copending U.S. patent application Ser. No. 09/159,429, filed Sep. 24, 1998, and also claims the benefit of copending U.S. Provisional Patent Application Ser. No. 60/098,819, filed Sep. 2, 1998, the entire disclosure of which is incorporated by reference herein.
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Continuation in Parts (1)
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|
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