Claims
- 1. A circuitized chip carrier comprising:a circuitized substrate formed into a predetermined three dimensional shape which functions as an air flow baffle; electronic component connection means on the circuitized substrate at locations that expose connected electronic components to cooling air passing through the air flow baffle; and interconnection pads on the circuitized substrate for connecting the circuitized substrate to another substrate, module or other chip carrier, wherein a multiplicity of wiring traces on a first and a second side of the substrate connect said interconnection pads to said electronic component connection means.
- 2. A circuitized chip carrier as in claim 1, wherein the circuitized substrate is a rigid or semi-rigid material molded or formed into the predetermined shape forming an air flow baffle.
- 3. A circuitized chip carrier as in claim 1, wherein the circuitized substrate is a flexible material and further comprising means for holding said circuitized flexible material in the predetermined shape.
- 4. A circuitized chip carrier as in claim 3, wherein said means for holding is selected from the group consisting of slotted end caps, slotted bars, spacer frames, and pins.
- 5. A circuitized chip carrier as in claim 3, wherein said means for holding a form is also a means for electrical connection and conduction to a multiplicity of sections of said circuitized substrate.
- 6. A circuitized chip carrier as in claim 1, wherein said interconnection pads are comprised of dendritic attachments, solder attachments or conductive adhesives or a combination thereof.
- 7. A circuitized chip carrier as in claim 1, wherein said predetermined shape forming an air flow baffle is a coil.
- 8. A circuitized chip carrier as in claim 7, wherein said coil is comprised of progressively smaller geometric shapes selected from the group consisting of triangles, squares, polygons, or circles.
- 9. A circuitized chip carrier as in claim 1, wherein said predetermined shape forming an air flow baffle is a serpentine form.
- 10. A circuitized chip carrier as in claim 9, wherein said serpentine form is comprised of a series of geometric shapes selected from the group consisting of triangles, squares, polygons, or circles.
- 11. A circuitized chip carrier as in claim 1, further comprising electronic components mounted to the electronic component connection means on a flexible circuitized substrate.
- 12. A circuitized chip carried as in claim 11, wherein the electronic component connection means are surface component contact pads.
- 13. A circuitized chip carrier as in claim 11, wherein electronic component connection means are plated through holes for pin component mounting.
- 14. A circuitized chip carrier as in claim 1, wherein a first portion of said multiplicity of interconnection pads connects directly with a first substrate and a second portion of said electrical connection pads connects directly with a second substrate.
- 15. A circuitized chip carrier as recited in claim 1 further comprising circuit lines imprinted on at least one side of said carrier.
- 16. A circuitized chip carrier as recited in claim 1 further comprising circuit lines imprinted on both a first and a second side of said carrier.
- 17. A circuitized chip carrier as recited in claim 16 further comprising through holes in said circuitized substrate which provide electrical communication between said circuit lines on said first side of said circuit carrier and said circuit lines on said second side of said carrier.
- 18. A circuitized chip carrier as recited in claim 15 further comprising:a layer of insulation over said circuit lines; and openings in said insulation positioned at said electronic component connection means.
- 19. A circuitized chip carrier as recited in claim 1 wherein said circuitized substrate comprises:at least one internal layer of circuitry; an external layer of circuitry on at least one external side; and at least one communication path between said internal layer of circuitry and said external layer of circuitry.
- 20. A circuitized chip carrier as recited in claim 19, wherein said communication path is a plated through hole.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a continuation of the patent application U.S. Ser. No. 09/010,667, filed Jan. 22, 1998, and the complete contents thereof is incorporated by reference.
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Number |
Date |
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2844096 |
May 1979 |
DE |
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JP |
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Continuations (1)
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Number |
Date |
Country |
Parent |
09/010667 |
Jan 1998 |
US |
Child |
09/437441 |
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US |