Patent Application
20230328877
The present disclosure relates to a high frequency module and a communication apparatus, and more particularly, to a high frequency module and a communication apparatus including a circuit component, a resin, and a shield electrode.
In Patent Document 1, a high frequency module including a mounting substrate having a first main surface and a second main surface, a transmission power amplifier (circuit component) mounted on the first main surface of the mounting substrate, a resin member (resin layer) covering the transmission power amplifier, and a shield electrode layer (shield layer) is disclosed.
In the high frequency module disclosed in Patent Document 1, the shield electrode layer is formed to cover top and side surfaces of the resin member.
Patent Document 1: International Publication No. 2019/181590
In a high frequency module, the stress generated by the thermal expansion and contraction or the like inside the high frequency module may be required to be reduced.
A possible benefit of the present disclosure is to provide a high frequency module and a communication apparatus capable of reducing the stress generated by the thermal expansion and contraction or the like inside the high frequency module.
A high frequency module according to an aspect of the present disclosure includes a mounting substrate, a circuit component, a resin layer, and a shield layer. The mounting substrate has a first main surface and a second main surface that face each other. The circuit component is mounted on the first main surface of the mounting substrate. The resin layer is disposed on the first main surface of the mounting substrate and covers at least part of an outer peripheral surface of the circuit component. The shield layer covers at least part of the resin layer and a main surface of the circuit component that is far from the mounting substrate. The high frequency module has a gap at at least one of a position between the circuit component and the resin layer, a position between the circuit component and the shield layer, a position inside the resin layer, and a position inside the shield layer.
A communication apparatus according to an aspect of the present disclosure includes the high frequency module according to the above-mentioned aspect and a signal processing circuit. The signal processing circuit is connected to the high frequency module and performs signal processing on a high frequency signal.
A high frequency module and a communication apparatus according to the present disclosure can reduce the stress generated by the thermal contraction and expansion or the like inside the high frequency module.
As illustrated in
The high frequency module 100 and a communication apparatus 300 according to the embodiments will be described below with reference to
First, a circuit configuration of the high frequency module 100 and the communication apparatus 300 according to an embodiment will be described with reference to
The high frequency module 100 according to an embodiment is used for, for example, the communication apparatus 300. The communication apparatus 300 is, for example, a mobile phone (for example, a smartphone). However, the communication apparatus 300 is not necessarily a mobile phone and may be, for example, a wearable terminal (for example, a smartwatch). The high frequency module 100 is, for example, a module capable of supporting 4G (fourth generation mobile communication) standards and 5G (fifth generation mobile communication) standards. The 4G standards are, for example, 3GPP LTE standards (LTE: Long Term Evolution). The 5G standards are, for example, 5G NR (New Radio). The high frequency module 100 is a module capable of supporting carrier aggregation and dual connectivity.
For example, the high frequency module 100 is configured to be capable of amplifying a transmission signal (high frequency signal) inputted from a signal processing circuit 301 and outputting the amplified transmission signal to an antenna 310. The high frequency module 100 is also configured to be capable of amplifying a reception signal (high frequency signal) inputted from the antenna 310 and outputting the amplified reception signal to the signal processing circuit 301. The signal processing circuit 301 is not a component element of the high frequency module 100 but is a component element of the communication apparatus 300 that includes the high frequency module 100. For example, the high frequency module 100 is controlled by the signal processing circuit 301 provided in the communication apparatus 300. The communication apparatus 300 includes the high frequency module 100 and the signal processing circuit 301. The communication apparatus 300 further includes antennas 310 to 312.
The signal processing circuit 301 includes, for example, an RF signal processing circuit 302 and a baseband signal processing circuit 303. The signal processing circuit 301 is connected to the high frequency module 100 and performs signal processing on a high frequency signal transferred to and from the high frequency module 100.
For example, the RF signal processing circuit 302 is an RFIC (Radio Frequency Integrated Circuit) and performs signal processing on a high frequency signal. For example, the RF signal processing circuit 302 performs signal processing such as up-conversion on a high frequency signal (transmission signal) outputted from the baseband signal processing circuit 303 and outputs the high frequency signal on which signal processing has been performed. Furthermore, for example, the RF signal processing circuit 302 performs signal processing such as down-conversion on a high frequency signal (reception signal) outputted from the high frequency module 100 and outputs the high frequency signal on which signal processing has been performed to the baseband signal processing circuit 303.
The baseband signal processing circuit 303 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 303 generates an I-phase signal and a Q-phase signal from a baseband signal. The baseband signal is, for example, an audio signal, an image signal, or the like inputted from the outside. The baseband signal processing circuit 303 combines an I-phase signal with a Q-phase signal to perform IQ modulation processing, and outputs a transmission signal. At this time, a transmission signal is generated as a modulation signal (IQ signal) that is obtained by modulating the amplitude of a carrier signal of a predetermined frequency, the amplitude modulation being performed at a period longer than the period of the carrier signal. For example, a reception signal processed by the baseband signal processing circuit 303 is used as an image signal for image display or an audio signal for conversation.
The high frequency module 100 transfers high frequency signals (reception signals and transmission signals) to and from the antennas 310 to 312 and the signal processing circuit 301. The high frequency module 100 includes a power amplifier 111 and a low noise amplifier 121. The high frequency module 100 also includes a plurality of (in the illustrated example, four) transmission filters 112A to 112D and a plurality of (in the illustrated example, six) reception filters 122A to 122F. The high frequency module 100 also includes a transformer 113, a matching circuit 116, matching circuits 117A to 117F, matching circuits 118A to 118D, and matching circuits 119A to 119C. The high frequency module 100 also includes a first switch 104 and a second switch 105. The high frequency module 100 also includes a controller 115.
The high frequency module 100 includes a plurality of external connection terminals 80. The plurality of external connection terminals 80 include antenna terminals 81 to 83, signal input terminals 84 and 85, a signal output terminal 86, and a plurality of ground terminals 87 (see
The power amplifier 111 is provided on a signal path T1 for transmission signals. The power amplifier 111 includes an input terminal and an output terminal.
The input terminal of the power amplifier 111 is connected to the signal processing circuit 301 with the signal input terminal 84 interposed therebetween. The signal input terminal 84 is a terminal through which a high frequency signal (transmission signal) from the signal processing circuit 301 is inputted to the high frequency module 100. The output terminal of the power amplifier 111 is connected to a common terminal 105e of the second switch 105 with the transformer 113 and the matching circuit 116 interposed therebetween. The power amplifier 111 is controlled by the controller 115.
The power amplifier 111 amplifies a transmission signal of a first frequency band inputted to the input terminal and outputs the amplified transmission signal through the output terminal. The first frequency band includes, for example, four communication bands (first to fourth communication bands). The first to fourth communication bands correspond to transmission signals passing through the transmission filters 112A to 112D in a one-to-one relationship. For example, the first to fourth communication bands are different four communication bands among frequency bands defined by the 3GPP LTE standards and the 5G NR standards.
The low noise amplifier 121 is provided on a signal path R1 for reception signals. The low noise amplifier 121 includes six input terminals and one output terminal.
The six input terminals of the low noise amplifier 121 correspond to the six matching circuits 117A to 117F in a one-to-one relationship and correspond to the six reception filters 122A to 122F in a one-to-one relationship. The six input terminals of the low noise amplifier 121 are connected to the corresponding reception filters 122A to 122F with the corresponding matching circuits 118A to 118D interposed therebetween. The output terminal of the low noise amplifier 121 is connected to the signal processing circuit 301 with the signal output terminal 86 interposed therebetween. The signal output terminal 86 is a terminal through which a high frequency signal (reception signal) from the low noise amplifier 121 is outputted to the signal processing circuit 301.
The low noise amplifier 121 amplifies a reception signal of a second frequency band inputted to one of the six input terminals and outputs the amplified reception signal through the output terminal. For example, the second frequency band is wider than the first frequency band and includes first to sixth communication bands.
For example, the transmission filters 112A to 112D are filters that use transmission bands of the first to fourth communication bands as pass bands. For example, the reception filters 122A to 122F are filters that use reception bands of the first to sixth communication bands as pass bands. In this embodiment, the transmission filter 112A and the reception filter 122A, the transmission filter 112B and the reception filter 122B, the transmission filter 112C and the reception filter 122C, and the transmission filter 112D and the reception filter 122D configure separate duplexers (DPXs).
The first switch 104 includes a plurality of (in the illustrated example, three) common terminals 104g to 104i and a plurality of (in the illustrated example, six) selection terminals 104a to 104f.
The three common terminals 104g to 104i correspond to the three matching circuits 119A to 119C in a one-to-one relationship and correspond to the three antenna terminals 81 to 83 in a one-to-one relationship. The three common terminals 104g to 104i are connected to the corresponding antenna terminals 81 to 83 with the corresponding matching circuits 119A to 119C interposed therebetween. The three antenna terminals 81 to 83 correspond to the three antennas 310 to 312 in a one-to-one relationship and are connected to the corresponding antennas 310 to 312.
The four selection terminals 104a to 104d, out of the six selection terminals 104a to 104f, correspond to the four matching circuits 118A to 118D in a one-to-one relationship and correspond to four connection points 123A to 123D in a one-to-one relationship. The selection terminals 104a to 104d are connected to the corresponding connection points 123A to 123D with the corresponding matching circuits 118A to 118D interposed therebetween. The four connection points 123A to 123D correspond to the four transmission filters 112A to 112D in a one-to-one relationship and correspond to the four reception filters 122A to 122D in a one-to-one relationship. The connection points 123A to 123D are points of connection between output terminals of the corresponding transmission filters 112A to 112D and input terminals of the corresponding reception filters 122A to 122D. The remaining two selection terminals 104e and 104f correspond to the two reception filters 122E and 122F in a one-to-one relationship and are connected to input terminals of the corresponding reception filters 122E and 122F.
The first switch 104 switches each of the connection destinations for the three common terminals 104g to 104i to at least one of the six selection terminals 104a to 104f in accordance with a control signal from the signal processing circuit 301. The first switch 104 is, for example, a switch capable of one-to-one and one-to-many connections. The first switch 104 is, for example, a switch IC.
The second switch 105 includes a plurality of (in the illustrated example, four) selection terminals 105a to 105d and the common terminal 105e. The common terminal 105e is connected to the output terminal of the power amplifier 111 with the matching circuit 116 and the transformer 113 interposed therebetween. The four selection terminals 105a to 105d correspond to the four transmission filters 112A to 112D in a one-to-one relationship and are connected to the input terminals of the corresponding transmission filters 112A to 112D.
The second switch 105 switches a connection destination for the common terminal 105e to at least one of the four selection terminals 105a to 105d in accordance with a control signal from the signal processing circuit 301. The second switch 105 is, for example, a switch capable of one-to-one and one-to-many connections. The second switch 105 is, for example, a switch IC. The second switch 105 is a switch having a function for switching between signal paths T11 to T14 for transmission signals of different communication bands.
The transformer 113 and the matching circuit 116 are provided on a signal path between the output terminal of the power amplifier 111 and the common terminal 105e of the second switch 105. More particularly, the transformer 113 is provided between the power amplifier 111 and the matching circuit 116, and the matching circuit 116 is provided between the power amplifier 111 and the common terminal 105e. The transformer 113 and the matching circuit 116 are circuits for achieving the impedance matching between the power amplifier 111 and the transmission filters 112A to 112D. The matching circuit 116 is, for example, an inductor.
The six matching circuits 117A to 117F correspond to the six reception filters 122A to 122F in a one-to-one relationship and correspond to the six input terminals of the low noise amplifier 121 in a one-to-one relationship. The matching circuits 117A to 117F are connected to signal paths between the output terminals of the corresponding reception filters 122A to 122F and the corresponding input terminals of the low noise amplifier 121. The matching circuits 117A to 117F are circuits for achieving the impedance matching between the corresponding reception filters 122A to 122F and the low noise amplifier 121.
The four matching circuits 118A to 118D correspond to the four transmission filters 112A to 112D in a one-to-one relationship and correspond to the four selection terminals 104a to 104d of the first switch 104 in a one-to-one relationship. The four matching circuits 118A to 118D are connected to signal paths between the output terminals of the corresponding transmission filters 112A to 112D and the corresponding selection terminals 104a to 104d of the first switch 104. The four matching circuits 118A to 118D are circuits for achieving the impedance matching between the corresponding transmission filters 112A to 112D and the first switch 104.
The three matching circuits 119A to 119C correspond to the three antennas 310 to 312 in a one-to-one relationship and correspond to the three common terminals 104g to 104i of the first switch 104 in a one-to-one relationship. The three matching circuits 119A to 119C are connected to signal paths between the corresponding antennas 310 to 312 and the corresponding common terminals 104g to 104i of the first switch 104. The three matching circuits 119A to 119C are circuits for achieving the impedance matching between the corresponding antennas 310 to 312 and the first switch 104.
The controller 115 is connected to the power amplifier 111. The controller 115 is also connected to the signal processing circuit 301 with the signal input terminal 85 interposed therebetween. The controller 115 controls the power amplifier 111 in accordance with a control signal from the signal processing circuit 301.
Operations of the high frequency module 100 and the communication apparatus 300 will be described with reference to
As illustrated in
The signal path T1 includes four signal paths T11 to T14. The signal path T11 is a path passing through the signal input terminal 84, the power amplifier 111, the transformer 113, the matching circuit 116, the second switch 105, the transmission filter 112A, the matching circuit 118A, and the selection terminal 104a in that order. The signal path T12 is a path passing through the signal input terminal 84, the power amplifier 111, the transformer 113, the matching circuit 116, the second switch 105, the transmission filter 112B, the matching circuit 118B, and the selection terminal 104b in that order. The signal path T13 is a path passing through the signal input terminal 84, the power amplifier 111, the transformer 113, the matching circuit 116, the second switch 105, the transmission filter 112C, the matching circuit 118C, and the selection terminal 104c in that order. The signal path T14 is a path passing through the signal input terminal 84, the power amplifier 111, the transformer 113, the matching circuit 116, the second switch 105, the transmission filter 112D, the matching circuit 118D, and the selection terminal 104d in that order.
The signal path R1 includes six signal paths R11 to R16. The signal path R11 is a path passing through the selection terminal 104a, the matching circuit 118A, the reception filter 122A, the matching circuit 117A, the low noise amplifier 121, and the signal output terminal 86 in that order. The signal path R12 is a path passing through the selection terminal 104b, the matching circuit 118B, the reception filter 122B, the matching circuit 117B, the low noise amplifier 121, and the signal output terminal 86 in that order. The signal path R13 is a path passing through the selection terminal 104c, the matching circuit 118C, the reception filter 122C, the matching circuit 117C, the low noise amplifier 121, and the signal output terminal 86 in that order. The signal path R14 is a path passing through the selection terminal 104d, the matching circuit 118D, the reception filter 122D, the matching circuit 117D, the low noise amplifier 121, and the signal output terminal 86 in that order. The signal path R15 is a path passing through the selection terminal 104e, the reception filter 122E, the matching circuit 117E, the low noise amplifier 121, and the signal output terminal 86 in that order. The signal path R16 is a path passing through the selection terminal 104f, the reception filter 122F, the matching circuit 117F, the low noise amplifier 121, and the signal output terminal 86 in that order.
In the second switch 105, at the time of transmission of a transmission signal, the common terminal 105e is connected to at least one of the four selection terminals 105a to 105d (for example, T11 and T12). Thus, at least one signal path (for example, T11 and T12) among the four signal paths T11 to T14 is selected. Furthermore, the first switch 104 connects the at least one selection terminal (for example, 104a and 104b), to which the at least one selected signal path (for example, T11 and T12) is connected, to a corresponding common terminal (for example, 104g and 104h) out of the three common terminals 104g to 104i. Thus, the at least one selected signal path (for example, T11 and T12) is connected to a corresponding antenna out of the three antennas 310 to 312.
In the above-mentioned connection state of the first switch 104 and the second switch 105, a transmission signal is inputted to the signal input terminal 84 from the signal processing circuit 301. The input transmission signal travels through the signal path (for example, T11 and T12) selected by the second switch 105 and is transmitted out of the antenna (for example, 310 and 311) selected by the first switch 104.
As described above, in the second switch 105, when the common terminal 105e is connected to one of the four selection terminals 105a to 105d, a transmission signal can be transmitted using a communication band. Meanwhile, when the common terminal 105e is connected to a plurality of selection terminals among the four selection terminals 105a to 105d, a transmission signal can be transmitted using a plurality of communication bands.
In the first switch 104, at the time of reception of a reception signal, at least one of the three common terminals 104g to 104i is connected to a corresponding selection terminal among the six selection terminals 104a to 104f. Thus, at least one of the three antennas 310 to 312 is connected to a corresponding signal path among the six signal paths R11 to R16. In this state, when the selected antenna receives a reception signal, the received reception signal travels through a signal path to which the corresponding antenna is connected among the six signal paths R11 to R16 and is outputted through the signal output terminal 86 to the signal processing circuit.
Next, a structure of the high frequency module 100 will be described with reference to
As illustrated in
As illustrated in
The mounting substrate 9 is, for example, a multilayer substrate including a plurality of dielectric layers and a plurality of conductive layers. The plurality of dielectric layers and the plurality of conductive layers are laminated in the thickness direction D1 of the mounting substrate 9. The plurality of conductive layers include a ground layer. In the high frequency module 100, a plurality of ground terminals 87 and the ground layer are electrically connected with via conductors or the like of the mounting substrate 9 interposed therebetween. Furthermore, although the mounting substrate 9 is, for example, an LTCC (Low Temperature Co-fired Ceramics) substrate, the mounting substrate 9 may be a printed wiring board, an HTCC (High Temperature Co-fired Ceramics) substrate, or a resin multiplayer substrate. Furthermore, the mounting substrate 9 is not limited to an LTCC substrate and may be, for example, a wiring structure.
The first main surface 91 and the second main surface 92 of the mounting substrate 9 are away from each other in the thickness direction D1 of the mounting substrate 9 and intersect with each other in the thickness direction D1 of the mounting substrate 9. The first main surface 91 of the mounting substrate 9 is, for example, orthogonal to the thickness direction D1 of the mounting substrate 9. However, for example, the first main surface 91 may include a side surface or the like of a conductive part as a surface that is not orthogonal to the thickness direction D1. Furthermore, the second main surface 92 of the mounting substrate 9 is, for example, orthogonal to the thickness direction D1 of the mounting substrate 9. However, for example, the second main surface 92 may include a side surface or the like of a conductive part as a surface that is not orthogonal to the thickness direction D1. Furthermore, fine roughness, recesses, or protrusions may be formed in the first main surface 91 and the second main surface 92 of the mounting substrate 9. For example, the mounting substrate 9 has a quadrangular shape when viewed in plan from the thickness direction D1 of the mounting substrate 9. However, the mounting substrate 9 does not necessarily have a quadrangular shape and may have a square shape or shapes other than a square shape (see
In the description provided below, the thickness direction D1 of the mounting substrate 9 will be described as a first direction D1. Furthermore, a direction orthogonal to the first direction D1 (for example, a direction parallel to one of two pairs of the opposite sides of the first main surface 91 of the mounting substrate 9) will be described as a second direction D2. Furthermore, a direction orthogonal to both the first direction D1 and the second direction D2 (for example, a direction parallel to the other one of the two pairs of the opposite sides of the first main surface 91) will be described as a third direction D3.
The plurality of circuit components 8 are mounted on the first main surface 91 or the second main surface 92 of the mounting substrate 9. The term “mounted” used herein includes a state in which a circuit component 8 is disposed on (mechanically connected to) the first main surface 91 or the second main surface 92 of the mounting substrate 9 and a state in which the circuit component 8 is electrically connected to (an appropriate conductive part of) the mounting substrate 9.
As illustrated in
The power amplifier 111 is configured as, for example, an IC chip. The power amplifier 111 includes a substrate having a first main surface and a second main surface that face each other and a circuit part (IC part) including a circuit element mounted on the first main surface side of the substrate. The substrate is, for example, a gallium arsenide substrate. However, the substrate may be a silicon substrate, a silicon germanium substrate, a gallium nitride substrate, or the like. The power amplifier 111 is flip-chip mounted on the first main surface 91 of the mounting substrate 9 in such a manner that the first main surface, out of the first main surface and the second main surface of the substrate, is near the first main surface 91 of the mounting substrate 9 (see
The transmission filters 112A to 112D and the reception filters 122A to 122F are, for example, acoustic wave filters. In an acoustic wave filter, a plurality of series-arm resonators and a plurality of parallel-arm resonators are acoustic wave resonators. The acoustic wave filters are, for example, SAW (Surface Acoustic Wave) filters using surface acoustic waves. The transmission filters 112A to 112D and the reception filters 122A to 122F are not limited to SAW filters and may be, for example, BAW (Bulk Acoustic Wave) filters. The transmission filters 112A to 112D and the reception filters 122A to 122F may be FBARs (Film Bulk Acoustic Resonators) or the like or may be LC resonant circuits or the like.
The transmission filters 112A to 112D and the reception filters 122A to 122F each include, for example, a substrate having a first main surface and a second main surface that face each other and a circuit part formed on the first main surface side of the substrate (see
The transformer 113 is mounted on the first main surface 91 of the mounting substrate 9. The outer peripheral shape of the transformer 113 in the plan view from the first direction D1 of the mounting substrate 9 is, for example, an octagon shape.
The matching circuit 116, the matching circuits 117A to 117F, the matching circuits 118A to 118D, and the matching circuits 119A to 119C are inductors. The outer peripheral shape of each of the matching circuits 116 to 119C in the plan view from the first direction D1 of the mounting substrate 9 is, for example, a quadrangular shape. The matching circuits 116 to 119C are mounted on the first main surface 91 of the mounting substrate 9.
As illustrated in
The matching circuit 116 includes at least one (for example, five) inductors 116a to 116e. The plurality of inductors 116a to 116e are, for example, disposed in a region near the transformer 113 and the transmission filters 112A to 112D on the first main surface 91 of the mounting substrate 9. The matching circuits 117A to 117F are, for example, disposed over an area from an edge part on the other end side (right end side) in the third direction D3 to an edge part on one end side (upper end side) in the second direction D2 on the first main surface 91 of the mounting substrate 9. The matching circuits 118A to 118D are, for example, disposed vertically and horizontally in a region surrounded by the reception filters 122A to 122F on the first main surface 91 of the mounting substrate 9. The matching circuits 119A to 119C are, for example, disposed on the other end side (right end side) in the third direction D3 in an edge part on the other end side (lower end side) in the second direction D2 on the first main surface 91 of the mounting substrate 9.
Furthermore, as illustrated in
The first switch 104 and the low noise amplifier 121 are configured to be integrated with each other as an IC chip 170. The IC chip 170 includes a substrate having a first main surface and a second main surface that face each other, and a circuit part (IC part) including a circuit element formed on the first main surface side of the substrate (see
The second switch 150 and the controller 115 are configured to be integrated with each other as an IC chip 171. The IC chip 171 includes a substrate having a first main surface and a second main surface that face each other and a circuit part (IC part) including a circuit element formed on the first main surface side of the substrate. The substrate is, for example, a silicon substrate. The outer peripheral shape of the IC chip 171 in the plan view from the first direction D1 of the mounting substrate 9 is, for example, a quadrangular shape. The IC chip 171 is flip-chip mounted on the second main surface 92 of the mounting substrate 9 in such a manner that the first main surface, out of the first main surface and the second main surface of the substrate, is near the second main surface 92 of the mounting substrate 9.
The plurality of external connection terminals 80 are disposed vertically and horizontally over a region of the second main surface 92 of the mounting substrate 9 in which no circuit component 8 is mounted. Each of the plurality of external connection terminals 80 has, for example, a columnar shape. The plurality of external connection terminals 80 are made of, for example, metal (for example, copper, copper alloy, or the like). The plurality of external connection terminals 80 include the antenna terminals 81 to 83, the signal input terminals 84 and 85, the signal output terminal 86, and the plurality of ground terminals 87. The plurality of ground terminals 87 are electrically connected to the ground layer of the mounting substrate 9. The ground layer is a circuit ground of the high frequency module 100. The plurality of circuit components 8 include a circuit component 8 that is electrically connected to the ground layer.
As illustrated in
As illustrated in
In this embodiment, a main surface 61a of the first resin layer 61 (the main surface that is far from the mounting substrate 9) is a flat surface and is flat relative to the second main surface (that is, the exposed main surface) 112a of the transmission filter 112C. The main surface 61a of the resin layer 61 and the second main surface 112a of the transmission filter 112B are made flat, for example, by being ground together.
The resin layer 62 (hereinafter, may also be referred to as a second resin layer 62) is provided on the second main surface 92 of the mounting substrate 9. The second resin layer 62 covers the plurality of circuit components 8 and the plurality of external connection terminals 80 that are mounted on the second main surface 92 of the mounting substrate 9. The second resin layer 62 seals the plurality of circuit components 8 and the plurality of external connection terminals 80. More particularly, front end surfaces of the plurality of external connection terminals 80 are not covered by the second resin layer 62, and areas other than the front end surfaces are covered by the second resin layer 62. The second resin layer 62 covers the entire circuit components 8. The second resin layer 62 includes resin. The second resin layer 62 may include filler as well as resin. The second resin layer 62 may be made of the same material as that of the first resin layer 61 or may be made of a material different from that of the first resin layer 61. In
The shield layer 5 is made of, for example, metal. The shield layer 5 covers at least part of the first resin layer 61 and a main surface (for example, the main surface 112a) of a specific circuit component 8S (in the example of
The matching circuits 116 to 119C are vertically-wound inductors. A vertically wound inductor represents an inductor whose winding axis (that is, the winding axis of a coil) is orthogonal to the first main surface 91 of the mounting substrate 9.
In this embodiment, as illustrated in
Thus, the magnetic fluxes H1 of the matching circuits 116 to 119C are not blocked by the nearby transmission filters 112A to 112D or reception filters 122A to 122F. As a result, the degradation of Q characteristics of the inductors of the matching circuits 116 to 119C can be reduced.
In the case where the matching circuits 116 to 119C are horizontally wound inductors, the winding axis of each of the horizontally wound inductors (that is, the winding axis of a coil) is parallel to the first main surface 91 of the mounting substrate 9. Thus, the magnetic flux of the horizontally wound inductor extends toward both sides of the horizontally wound inductor along the first main surface 91 of the mounting substrate 9. Therefore, in the case where the matching circuits 116 to 119C are disposed next to filters (transmission filters 112A to 112C and reception filters 122A to 122C) each including an electrically high-resistance silicon substrate, the magnetic fluxes of the inductors of the matching circuits 116 to 119C are blocked by the silicon substrates. As a result, Q characteristics of the inductors of the matching circuits 116 to 119C are degraded.
In the case where the matching circuits 116 to 119C are not disposed next to the transmission filters 112A to 112C and the reception filters 122A to 122C, the matching circuits 116 to 119C may be horizontally wound inductors.
In this embodiment, a gap 180 is arranged within an adjacent region S1 (see
The above-mentioned “specific circuit component 8S” represents a circuit component 8 that is mounted on the first main surface 91 of the mounting substrate 9, at least part of an outer peripheral surface of the circuit component 8 (in this embodiment, the whole outer peripheral surface) being covered by the resin layer 61, at least part of a main surface that is far from the mounting substrate 9 (in this embodiment, the whole main surface) being covered by (in contact with) the shield layer 5. More particularly, the above-mentioned “specific circuit component 8S” represents a circuit component 8 that is mounted on the first main surface 91 of the mounting substrate 9 and including a substrate (for example, the substrate 112k), at least part of the main surface of the substrate that is far from the mounting substrate 9 (for example, the main surface 112a) (in this example, the whole main surface) being not covered by the resin layer 61, parts other than the main surface being covered by the resin layer 61, at least part of the main surface (in this embodiment, the whole main surface) being covered by (in contact with) the shield layer 5. Specifically, the specific circuit component 8S is, for example, each of the transmission filters 112A to 112D.
Furthermore, the above-mentioned “inside the high frequency module 100” represents, for example, at least one of a position between the specific circuit component 8S and the resin layer 61 (more particularly, between the substrate of the specific circuit component 8S and the resin layer 61 (see
Furthermore, the above-mentioned “adjacent region S1” represents, when viewed in plan from the first direction D1, a region around the specific circuit component 8S, the region having a boundary S2 for defining inside and outside of the adjacent region S1, no circuit component 8 being disposed between the boundary S2 and the specific circuit component 8S (see
Thus, in the case where the specific circuit component 8S is the transmission filter 112C, as illustrated in
In the case where a distance S4 from the outer peripheral surface of the specific circuit component 8 to the boundary S2 is longer than a thickness D5 of the substrate of the specific circuit component 8S (see
Furthermore, as illustrated in
As described above, with the provision of the gap 180 inside the high frequency module 100, the stress generated by the thermal expansion and contraction or the like inside the high frequency module 100 can be reduced. In particular, by arranging the gap 180 only within the range of the adjacent region S1 for the specific circuit component 8S, the influence of the above-mentioned stress on the specific circuit component 8S can be reduced.
Gaps 180 in the positions mentioned above will be described in detail with reference to
As illustrated in
The gap 180a is open at the boundary between the main surface 112a of the filter substrate 112k and the main surface 61a of the resin layer 61. In this embodiment, for example, since the shield layer 5 has a thickness that can be seen through, the gaps 180 can be seen by seeing through the shield layer 5.
As described above, the gap 180a is arranged between the substrate (for example, the filter substrate 112k) of the circuit component 8 and the resin layer 61. Thus, the substrate of the circuit component 8 and the resin layer 61 are capable of absorbing the stress generated by the expansion and contraction caused by temperature changes.
As described above, the gap 180b is arranged along the interface K1 between the substrate (for example, the filter substrate 112k) of the circuit component 8 and the resin layer 61 with the space D7 interposed therebetween inside the resin layer 61. Thus, the resin part 612, which exists between the gap 180b and the interface K1, can absorb bulk waves or the like propagating inside the resin part 611.
As illustrated in
In the example of
As described above, the gap 180c is arranged inside the resin layer 61 and is connected to the ground mark U2, which is one of the plurality of ground marks U1, at the interface K2 between the substrate (for example, the filter substrate 112k) of the circuit component 8 and the resin layer 61. Thus, for example, by grounding of main surfaces of the substrate of the circuit component 8 and the resin layer 61 (that is, main surfaces that are far from the mounting substrate 9), the gap 180c starting from an end portion of the ground mark U2 of the filter substrate 112k can be formed easily.
In the example of
Furthermore, in the example of
In the examples of
As described above, the gap 180d is arranged along the thickness direction of the shield layer 5. Thus, a situation in which a crack in the shield layer 5 is caused by the stress generated inside the high frequency module 100 can be reduced.
In the example of
As described above, the gap 180e is arranged between the substrate (for example, the filter substrate 112k) of the circuit component 8 and the shield layer 5. Thus, the stress generated at the substrate of the circuit component 8 can be absorbed. As a result, the generation of cracks in the shield layer 5 and the substrate of the circuit component 8 can be reduced.
The gap 180e is partially arranged at a main surface of the substrate of the circuit component 8. That is, the substrate of the circuit component 8 and the shield layer 5 are in contact with each other in the part where the gap 180e is not arranged. Thus, the generation of cracks in the shield layer 5 and the substrate of the circuit component 8 can be reduced without impeding the heat dissipation function for causing the heat generated at the circuit component 8 to be dissipated from the shield layer 5.
Positions of the ranges W1 to W3, the cross section taken along A4-A4, and the cross section taken along A5-A5 illustrated in
In this embodiment, as illustrated in
As described above, the plurality of ground marks U1 are arranged at the main surface of the substrate of the specific circuit component 8S. Thus, the reflectivity of the main surface of the substrate of the specific circuit component 8S is different from the reflectivity of the main surface 61a of the resin layer 61, and the arrangement of the specific circuit component 8S on the main surface 61a of the resin layer 61 can be easily viewed from the outside. Accordingly, based on the arrangement of the specific circuit component 8S at the mounting substrate 9, the orientation of the high frequency module 100 can be visually confirmed. Furthermore, the surface area of the substrate of the specific circuit component 8S can be increased by the ground marks U1, and the heat dissipation characteristics of the specific circuit component 8S can be improved.
Next, a method for manufacturing the high frequency module 100 (more particularly, a method for forming the gaps 180) will be described with reference to
The transmission filter 112C is mounted on the first main surface 91 of the mounting substrate 9 (see
Then, the resin layer 61 is formed on the first main surface 91 of the mounting substrate 9 in such a manner that the main surface (the main surface that is far from the mounting substrate 9) 112a of the substrate 112k of the transmission filter 112C is not covered by the resin layer 61 and parts of the transmission filter 112C other than the main surface 112a are covered by the resin layer 61 (see
At the time of grinding using the grinding tool 251, the frictional force from the grinding tool 251 on the main surfaces 112a and 61a operates in a direction for causing the substrate 112k and the resin layer 61 to be separated from each other in the region 112m. Furthermore, since the release agent 250 is applied to the region 112m of the filter substrate 112k, due to the above-mentioned frictional force on the filter substrate 112k and the resin layer 61, the filter substrate 112k and the resin layer 61 are separated from each other in the region 112m (see
As described above, the high frequency module 100 according to an embodiment includes the mounting substrate 9, the circuit component 8S, the resin layer 61, and the shield layer 5. The mounting substrate 9 has the first main surface 91 and the second main surface 92 that face each other. The circuit component 8S is mounted on the first main surface 91 of the mounting substrate 9. The resin layer 61 is disposed on the first main surface 91 of the mounting substrate 9 and covers at least part of an outer peripheral surface of the circuit component 8S. The shield layer 5 covers at least part of the resin layer 61 and a main surface (for example, the main surface 112a) of the circuit component 8S that is far from the mounting substrate 9. The high frequency module 100 has a gap 180 at at least one of a position between the circuit component 8S and the resin layer 61, a position between the circuit component 8S and the shield layer 5, a position inside the resin layer 61, and a position inside the shield layer 5. With this arrangement, the stress generated by the thermal expansion and contraction inside the high frequency module 100 can be reduced by the gap 180.
Next, modifications of an embodiment will be described.
As illustrated in
More particularly, the first thickness D5 is more than the second thickness D6, where the thickness of the first part 51 is represented by the first thickness D5 and the thickness of the second part 52 is represented by the second thickness D6. Thus, only the thickness of the part of the shield layer 5 that is provided on the specific circuit component 8S can be increased. As a result, the heat dissipation characteristics of the specific circuit component 8S on the shield layer 5 can be improved.
In the embodiment described above, the external connection terminals 80 each have a columnar shape. However, as illustrated in
Aspects described below are disclosed herein.
According to a first aspect, a high frequency module (100) includes a mounting substrate (9), a circuit component (8S), a resin layer (61), and a shield layer (5). The mounting substrate (9) has a first main surface (91) and a second main surface (92) that face each other. The circuit component (8S) is mounted on the first main surface (91) of the mounting substrate (9). The resin layer (61) is disposed on the first main surface (91) of the mounting substrate (9) and covers at least part of an outer peripheral surface of the circuit component (8S). The shield layer (5) covers at least part of the resin layer (61) and a main surface (112a) of the circuit component (8S) that is far from the mounting substrate (9). The high frequency module (1) has a gap (180) at at least one of a position between the circuit component (8S) and the resin layer (61), a position between the circuit component (8S) and the shield layer (5), a position inside the resin layer (61), and a position inside the shield layer (5).
With this arrangement, the stress generated by the thermal expansion and contraction or the like inside the high frequency module (100) can be reduced by the gap (180).
According to a second aspect, in the high frequency module (100) according to the first aspect, the circuit component (8S) includes a substrate (112k). The gap (180) is arranged at at least one of a position between the substrate (112k) of the circuit component (8S) and the resin layer (61) and a position between the substrate (112k) of the circuit component (8S) and the shield layer (5).
With this arrangement, by limiting the circuit component (8S) to a circuit component that includes the substrate (112k), a situation in which the substrate (112k) of the circuit component (8S) is affected by the above-mentioned stress can be reduced.
According to a third aspect, in the high frequency module (100) according to the first or second aspect, the gap (180b, 180c) is arranged within an adjacent region (S1) inside the resin layer (61) that is adjacent to the circuit component (8S).
With this arrangement, the gap (180b, 180c) can be arranged within the adjacent region (S1) of the resin layer (61) that is adjacent to the circuit component (8S).
According to a fourth aspect, in the high frequency module (100) according to any one of the first to third aspects, the gap (180b) is arranged along an interface (K1) between the circuit component (8S) and the resin layer (61) with a space interposed between the interface (K1) and the gap (180b) inside the resin layer (61).
With this arrangement, bulk waves can be absorbed by a resin part (612) that exists between the circuit component (8S) and the gap (180b).
According to a fifth aspect, in the high frequency module (100) according to any one of the first to fourth aspects, the main surface (112a) of the circuit component (8S) includes a plurality of ground marks (U1).
With this arrangement, due to the plurality of ground marks (U1), the reflectivity of the main surface (112a) of the circuit component (8S) and the reflectivity of the main surface (61a) of the resin layer (61) are different. Thus, arrangement of the specific circuit component (8S) on the main surface (61a) of the resin layer (61) can be easily viewed from the outside. Furthermore, the surface area of the circuit component (8S) is increased by the plurality of ground marks (U1), and the heat dissipation characteristics of the circuit component (8S) can be improved.
According to a sixth aspect, in the high frequency module (100) according to the fifth aspect, the gap (180) is arranged inside the resin layer (61) and is connected to a ground mark (U2) that is one of the plurality of ground marks (U1) at the interface between the circuit component (8S) and the resin layer (61).
With this arrangement, the stress generated by the thermal expansion and contraction or the like inside the resin layer (61) can be reduced by the gap (180).
According to a seventh aspect, in the high frequency module (100) according to any one of the first to sixth aspects, the gap (180d) is arranged along a thickness direction (D1) of the shield layer (5) inside the shield layer (5) and does not overlap with an interface between the circuit component (8S) and the resin layer (61) in the thickness direction (D1) of the shield layer (5).
With this arrangement, the stress generated at the shield layer (5) can be absorbed by the gap (180d). As a result, the generation of a crack in the shield layer (5) can be reduced.
According to an eighth aspect, in the high frequency module (100) according to any one of the first to sixth aspects, the gap (180) is arranged along a thickness direction (D) of the shield layer (5) inside the shield layer (5) and overlaps with an interface between the circuit component (8S) and the resin layer (61) in the thickness direction (D1) of the shield layer (5).
With this arrangement, the stress generated at the shield layer (5) can be absorbed by the gap (180). As a result, the generation of a crack in the shield layer (5) can be reduced.
According to a ninth aspect, in the high frequency module (100) according to any one of the first to eighth aspects, a thickness of a part of the shield layer (5) that is provided on the main surface (112a) of the circuit component (8S) is set to a first thickness (D5), and a thickness of a part of the shield layer (5) that is provided on a main surface of the resin layer (61) that is far from the mounting substrate (9) is set to a second thickness (D6). The first thickness (D5) is more than the second thickness (D6).
With this arrangement, the heat dissipation characteristics of the circuit component (8S) at the shield layer (5) can be improved.
According to a tenth aspect, a communication apparatus (300) includes the high frequency module (100) according to any one of the first to ninth aspects and a signal processing circuit (301). The signal processing circuit (301) is connected to the high frequency module (100) and performs signal processing on a high frequency signal.
With this arrangement, the communication apparatus (300) that achieves the above-mentioned effects of the high frequency module (100) can be provided.
5
8
8S
9
11C
11k
51
52
61
61a
61b
62
62b
80
81 to 83
84, 85
86
87
91
92
93
100
104
104
a to 104f
104
g to 104i
105
105
a to 105d
105
e
111
111u
112
a
112A to 112D
112
k
112m
112
u, 112v
113
115
116
116
a to 116e
117A to 117F
118A to 118D
119A to 119C
121 low noise
122A to 122F
122
u
123A to 123D
130
150
170, 171
180, 180a to 180e
250
251
300
301
302
303
310 to 312
611, 612
| Number | Date | Country | Kind |
|---|---|---|---|
| 2020-136489 | Aug 2020 | JP | national |
This is a continuation of International Application No. PCT/JP2021/028577 filed on Aug. 2, 2021 which claims priority from Japanese Patent Application No. 2020-136489 filed on Aug. 12, 2020. The contents of these applications are incorporated herein by reference in their entireties.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2021/028577 | Aug 2021 | WO |
| Child | 18155995 | US |
