Patent Application
20100065923
This invention relates to III-Nitride devices and processes for their manufacture and more specifically relates to the improvement of the leakage, subthreshold leakage and transconductance characteristics of such devices.
III-Nitride devices are normally-on depletion mode (D-mode) devices. A negative voltage is applied to the gate of the device to turn it off In a typical III-Nitride device, an AlGaN layer atop a GaN layer forms a 2DEG, normally conductive layer which conducts under a control gate and between a source and a drain electrode atop and in contact with the AlGaN layer.
However, leakage paths exist in the GaN layer which is normally relatively highly doped. The device also suffers from sub-threshold characteristics and relatively poor transconductance characteristics.
It would be desirable to provide a III-Nitride device which improves the leakage, the subthreshold characteristics and transconductance of such devices while employing well known processing techniques for its manufacture.
In accordance with the invention, a back-gate and/or a field plate is applied to an otherwise standard III-Nitride device.
In one embodiment of the invention, a secondary gate (or back-gate) is added below the GaN layer or channel layer of the device.
In this embodiment, the III-Nitride device is fabricated using well known fabrication techniques. The substrate for the device may be silicon, sapphire or GaN or the like. The substrate may include a transition layer to improve growth of a GaN layer atop the substrate. After the fabrication of the III-Nitride device, the backside substrate is etched (in a process similar to that used for through-via etch techniques). The backside etch may form a trench under selected locations of the substrate. The backside substrate may be thinned before the etch is carried out. A gate metal is then deposited into the desired etched area and patterned. This metal forms the secondary gate (or back-gate).
The back-gate can be connected to the main gate or can have a separate terminal. The application of a negative voltage to the back-gate reduces the conductivity in the leakage paths in the GaN layer and also improves the subthreshold characteristics. The transconductance of the device is also improved, since the back-gate introduces 2DEG channel control from the backside. The back-gate size may be varied to achieve optimal subthreshold and transconductance characteristics.
In a further embodiment, a field plate can be placed (in addition to the back-gate or alone), under the drift region of the device. By applying an appropriate bias to the field plate (e.g. connecting the field plate to the source), one is able to shape the electric field in the drift region and close to the gate region, thus enabling higher breakdown voltage, less impact ionization and more reliable device operation.
In a still further embodiment, the backside substrate chosen is silicon which is highly doped. This highly conductive silicon may be connected to the gate (to improve device characteristics as a black-gate) or to the source (to act as field plate). With the highly conductive substrate technique, one needs to control the extra charge that is introduced by the large back-side gate.
Referring next to the drawings, the same numerals are used to identify similar or identical components. The invention herein is not to be limited to the structure described, but is defined by the claims appended hereto.
Spaced conductive source and drain electrodes 20 and 21 respectively are conventionally formed and are connected to the top surface of III-Nitride layer 13. A gate dielectric 22 is also conventionally formed atop layer 13 and between electrodes 20 and 21 and a conventional conductive gate 23 is formed atop gate dielectric 22.
Note that a Schottky gate structure can also be used in which the gate metal directly contacts the top surface of AlGaN layer 13.
Any desired gate structure could be used, including the floating gate structure of copending application Ser. No. 12/195,801, filed Aug. 21, 2008 in the name of Bahramian and assigned to the assignee of this application and incorporated herein by reference in its entirety (IR-3581).
The process steps used to make the device of
Back-gate 42 can be connected to main gate 23 or can have its own terminal 43 as shown which is connected to gate potential or any potential desired. The application of a negative voltage to back-gate 42 reduces leakage paths in GaN layer 12 between source and drain 20 and 21 respectively and also improves the sub threshold characteristics. The transconductance of the device also improves since the back-gate 42 introduces 2 DEG channel 14 control from the back-side of the device.
In a typical device, a silicon substrate 10 having a thickness of 600 μm and resistivity of 10 ohm cm can be used (non-critical). The web 50 between the bottom of trench 40 and the bottom of buffer layer 11 may be about 1.0 μm.
The back-gate size may be varied to achieve optimal subthreshold and transconductance characteristics. Thus, in one design the trench 40 may have a depth of 80 μm and a width of 1 μm, and gate 42, which may be metal, polysilicon, or the like may have a width of: 4 μm and a thickness of 0.2 μm. Dielectric 41 may have a thickness of 0.02 μm and may be of SiO2 or the like. The buffer layer 11 in this design may have a thickness of 0.8 μm and the GaN layer 12 may have a thickness of 0.8 μm.
By applying an appropriate bias to field plate 63 (e.g. the source potential) one is able to shape the electric field in the drift region between drain 21 and gate 23 and close to the gate region, to produce a higher breakdown voltage, less impact ionization and more reliable device operation.
In a still further embodiment of the invention, and as shown in
In a still further embodiment of the invention, as shown in
A contact 71 having terminal 72 may be formed on the bottom of substrate 70 and is connected to gate 23 to improve device characteristics as described. Alternatively, conductive substrate 70 may be connected to source 20 to act as a field plate.
With the highly conductive substrate 70, one needs to control the charge that is introduced by the very large back-side gate.
Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein.
