Claims
- 1. A packaged integrated circuit, comprising:
a substrate; a chip mounted on said substrate; and a heatsink mounted on said chip; said heatsink including a spacer attached to one surface thereof to provide a standoff distance between said heatsink and said substrate.
- 2. The packaged integrated circuit of claim 1, wherein said substrate includes a moat in a surface thereof into which said spacer is adapted to fit.
- 3. The packaged integrated circuit of claim 1, wherein said heatsink includes a moat in said one surface into which said spacer is adapted to fit.
- 4. The packaged integrated circuit of claim 2, wherein said moat comprises a notch at the edge of said surface of said substrate.
- 5. The packaged integrated circuit of claim 4, wherein said spacer comprises a notch adapted to fit said notch at said edge of said surface of said substrate.
- 6. The packaged integrated circuit of claim 1, wherein said spacer comprises a high modulus of elasticity material.
- 7. The packaged integrated circuit of claim 1, wherein said spacer comprises a low modulus of elasticity material.
- 8. The packaged integrated circuit of claim 1, wherein said spacer comprises metal.
- 9. A packaged integrated circuit, comprising:
a substrate; a chip mounted on said substrate; a heatsink including a moat in a surface thereof, said heatsink mounted on said chip; a spacer between said heatsink and said substrate, said spacer adapted to fit in said moat on said surface of said heatsink, said spacer having dimensions sufficient to provide a standoff distance between said heatsink and said substrate.
- 10. The packaged integrated circuit of claim 9, wherein said substrate includes a moat in a surface thereof, said spacer adapted to fit into said moat in said substrate surface.
- 11. The packaged integrated circuit of claim 9, wherein said substrate includes a notch at the edge thereof, and further wherein said spacer includes a notch adapted to fit into said notch at said edge of said substrate.
- 12. The packaged integrated circuit of claim 9, wherein said spacer is adapted to fit over an edge of said substrate.
- 13. The packaged integrated circuit of claim 9, wherein said spacer comprises a plurality of posts.
- 14. The packaged integrated circuit of claim 9, wherein said spacer comprises a high modulus of elasticity material.
- 15. The packaged integrated circuit of claim 9, wherein said spacer comprises a low modulus of elasticity material.
- 16. The packaged integrated circuit of claim 9, wherein said spacer comprises metal.
- 17. A method of packaging an integrated circuit, comprising the steps of:
providing a substrate; mounting a chip on said substrate; providing a heatsink including a spacer attached to one surface thereof; and mounting said heatsink on said chip such that said spacer provides a standoff distance between said heatsink and said substrate.
- 18. The method of claim 17, wherein said step of providing said substrate comprises providing a substrate including a moat in a surface thereof into which said spacer is adapted to fit.
- 19. The method of claim 17, wherein said step of providing a heatsink includes the step of providing a heatsink including a moat in said one surface into which said spacer is adapted to fit.
- 20. The method of claim 18, wherein said moat comprises a notch at the edge of said surface of said substrate.
- 21. The method of claim 17, wherein said spacer comprises a high modulus of elasticity material.
- 22. The method of claim 17, wherein said spacer comprises a low modulus of elasticity material.
- 23. The method of claim 17, wherein said spacer comprises metal.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is related to application Ser. No. ______ (attorney docket number TI-34501).