INTEGRATED CIRCUIT SYSTEM WITH DOUBLE DOPED DRAIN TRANSISTOR

Abstract

An integrated circuit system includes a substrate, forming a gate over the substrate, forming a first drift region having a first counter diffused region and a source diffused region, the first drift region in the substrate adjacent a first side of the gate, and forming a second drift region having a second counter diffused region and a drain diffused region, the second drift region in the substrate adjacent a second side of the gate opposite the first side of the gate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of an integrated circuit system;

FIG. 2 is a cross-sectional view of an integrated circuit system in a gate forming phase in an alternative embodiment of the present invention;

FIG. 3 is the structure of FIG. 2 in a double diffusion forming phase;

FIG. 4 is the structure of FIG. 3 in a spacer forming phase;

FIG. 5 is the structure of FIG. 4 in a source and drain forming phase n;

FIG. 6 is a cross-sectional view of the integrated circuit system;

FIG. 7 is a cross-sectional view of an integrated circuit system in a double diffusion forming phase in another alternative embodiment of the present invention;

FIG. 8 is the structure of FIG. 7 in a gate forming phase;

FIG. 9 is the structure of FIG. 8 in a spacer forming phase;

FIG. 10 is the structure of FIG. 9 in a source and drain forming phase;

FIG. 11 is a cross-sectional view of the integrated circuit system;

FIG. 12 is a substrate current graph; and

FIG. 13 is a flow chart of an integrated circuit system for manufacturing the integrated circuit system in an embodiment of the present invention.

Claims

1. An integrated circuit system comprising: providing a substrate;forming a gate over the substrate;forming a first drift region having a first counter diffused region and a source diffused region, the first drift region in the substrate adjacent a first side of the gate; andforming a second drift region having a second counter diffused region and a drain diffused region, the second drift region in the substrate adjacent a second side of the gate opposite the first side of the gate.

2. The system as claimed in claim 1 further comprising flowing current through the first drift region and a bulk region of the substrate providing the integrated circuit system with approximately one thousand times a lifetime of a conventional device.

3. The system as claimed in claim 1 wherein forming the first counter diffused region includes applying a dopant over the first drift region and the gate.

4. The system as claimed in claim 1 wherein forming the first counter diffused region includes applying a dopant over the first drift region without the gate.

5. The system as claimed in claim 1 wherein forming the first counter diffused region includes forming the first counter diffused region at a depth approximately half a depth of the first drift region.

6. An integrated circuit system comprising: providing a substrate having a bulk region;forming a gate with a gate insulator over the substrate;forming a first drift region in the substrate adjacent a first side of the gate;forming a second drift region in the substrate adjacent a second side of the gate opposite the first side of the gate;forming a first counter diffused region in the first drift region adjacent the first side of the gate;forming a second counter diffused region in the second drift region adjacent the second side of the gate;forming a source diffused region in the first drift region adjacent a side of the first counter diffused region opposite the gate; andforming a drain diffused region in the second drift region adjacent a side of the second counter diffused region opposite the gate.

7. The system as claimed in claim 6 wherein forming the first counter diffused region includes forming the first counter diffused region to a depth of approximately one-tenth of a micron to three-tenths of a micron.

8. The system as claimed in claim 6 wherein forming the first counter diffused region includes boron or a compound thereof.

9. The system as claimed in claim 6 wherein forming the first counter diffused region includes phosphorus, arsenic, antimony, or a compound thereof.

10. The system as claimed in claim 6 wherein forming the first counter diffused region includes forming the first counter diffused region with a dopant concentration approximately an order of magnitude less that a dopant concentration of the first drift region.

11. An integrated circuit system comprising: a substrate;a gate over the substrate;a first drift region having a first counter diffused region and a source diffused region, the first drift region in the substrate adjacent a first side of the gate; anda second drift region having a second counter diffused region and a drain diffused region, the second drift region in the substrate adjacent a second side of the gate opposite the first side of the gate.

12. The system as claimed in claim 11 wherein the first counter diffused region includes the first counter diffused region at a depth approximately half a depth of the first drift region.

13. The system as claimed in claim 11 further comprising the first drift region and a bulk region of the substrate for current flow providing the integrated circuit system with approximately one thousand times a lifetime of a conventional device.

14. The system as claimed in claim 11 wherein the first counter diffused region includes a dopant over the first drift region and the gate.

15. The system as claimed in claim 11 wherein the first counter diffused region includes a dopant over the first drift region without the gate.

16. The system as claimed in claim 11 wherein: the substrate is the substrate with a bulk region;the gate is the gate with a gate insulator over the substrate;the first drift region is: the first drift region in the substrate adjacent a first side of the gate;the first counter diffused region in the first drift region adjacent the first side of the gate;the source diffused region in the first drift region adjacent a side of the first counter diffused region opposite the gate; andthe second drift region is: the second drift region in the substrate adjacent a second side of the gate opposite the first side of the gate;the second counter diffused region in the second drift region adjacent the second side of the gate;the drain diffused region in the second drift region adjacent a side of the second counter diffused region opposite the gate.

17. The system as claimed in claim 16 wherein the first counter diffused region includes the first counter diffused region to a depth of approximately one-tenth of a micron to three-tenths of a micron.

18. The system as claimed in claim 16 wherein the first counter diffused region includes boron or a compound thereof.

19. The system as claimed in claim 16 wherein the first counter diffused region includes phosphorus, arsenic, antimony, or a compound thereof.

20. The system as claimed in claim 16 wherein the first counter diffused region includes the first counter diffused region with a dopant concentration approximately an order of magnitude less that a dopant concentration of the first drift region.