Patent Application
20230187331
Embodiments of the present disclosure generally relate to the field of package assemblies, and in particular to package assemblies that include glass cores with openings to include one or more die.
Continued reduction in the end-product size of mobile electronic devices, such as smart phones and ultrabooks, is a driving force for package miniaturization and component quality increase.
Embodiments of the present disclosure may generally relate to systems, apparatus, techniques, and/or processes directed to a package that includes a glass core with one or more openings, which may also be referred to as a window or a cut out, within the glass core. In embodiments, the package may be referred to as an interposer. In embodiments, one or more dies, may be placed in an opening within the glass core, such that the glass core creates a patch-like architecture that at least partially surrounds the one or more dies.
In embodiments, one or more TGV may be filled with conductive material, such as copper, and electrically couple a first side of the glass core with a second side of the glass core opposite the first side. In embodiments, the glass core with the one or more dies may be generally referred to as an embedded die architecture. In embodiments, during manufacturing of the package the glass core and the TGV filled with conductive material may be prefabricated, and then added as a single manufacturing stage within the manufacturing process. In embodiments, during manufacturing the one or more dies may be electrically coupled with one of the one or more TGV.
In embodiments, a thickness of the glass core and a thickness of the one or more dies may be a similar thickness. Thus, after the one or more die are inserted within the openings of the glass core, the top and the bottom of the resulting combination structure may be substantially planar. In embodiments, a coefficient of thermal expansion (CTE) for the glass core and a CTE of one or more dies may be selected to be substantially similar. Similar CTE for the glass core and the one or more dies may minimize mechanical stress and/or warpage when heat is generated during package manufacture or during operation the package. Additionally, the composition of the glass may include any number of additional elements to alter its thermomechanical and electrical properties; it may range from pure SiO2 to >50% substituted with alternate elements.
In embodiments, the combination structure may be highly planar, due in part to the flatness of the sides of the glass core. In addition, the combination structure will also have strength and be able to resist thermomechanical stress due to the strength of the glass material within the glass core. A thickness of the glass core and/or composition of the glass within the glass core may be chosen to provide a variety of different design architectures for diverse performance parameters during package operation. For example, integrated passive devices using wafer material other than Si may have appropriately matching CTE selected by the glass composition, and devices with critical dimensions either thick or thin may be accommodated by glass thinning. In addition, during manufacture the glass core and the one or more die may be placed upon a carrier to enhance planarity during the manufacturing process. The carrier may be glass, fused silica, stainless steel or the like.
In embodiments, a thickness of the one or more dies may require copper pillars to be created around the one or more dies. This may be accomplished through the one or more TGV through the glass core that are filled with conductive material. These TGVs may be placed in proximity to the one or more dies. In embodiments, the one or more TGV may be very high aspect ratio TGV, with a height of the TGV up to 15 times the diameter of the TGV, which is enabled using a glass core. In addition, the pitch of the TGV may also be very close, for example on the order of 25 μm. Techniques for manufacturing embodiments may include fewer process stages as compared to legacy manufacturing process implementations. In addition, embodiments may optimize package yield by using a glass core, which also functions as a package stiffener, that has pre-formed cavities and copper TGVs, thus reducing warpage and planarity issues during manufacture.
In embodiments, active dies may be placed into the glass core openings. In embodiments, an embedded die such as an interconnect bridge die (e.g., embedded multi-die interconnect Bridge (EMIB)), or an assembly including one or more interconnect bridges as well as through interconnects (e.g., copper pillars) arranged adjacent the interconnect bridges (e.g, an omni-directional interconnect (ODI) assembly) may be placed within the glass core openings. In embodiments, the glass core and TGVs may serve as a patch, providing no pitch translation between components above the glass core and below the glass core. Subsequent to the manufacturing process, a first level interconnect (FLI) for an active die may be formed on one side of the glass core, and a mid-level interconnect (MLI) may be formed on the other side of the glass core to connect to an organic interposer substrate. In some embodiments, a redistribution layer (RDL) may be formed on one or both sides of the glass core to aid in signal routing or power routing.
In legacy implementations, one or more dies are embedded within an organic substrate instead of within a glass core. In these legacy implementations, because the thickness of the embedded die requires copper pillars to be created around it, a thick photoresist plating and then dielectric backfill are needed to embed the one or more dies. This is a complex process that results in yield loss. Another legacy implementation includes the creation of a cavity within dielectric by laser ablation of the dielectric, which is a slow and costly process. In addition, in these legacy implementations, the planarity of the copper pillars and embedded die pads and/or die bumps may be challenging, which necessitates costly additional processes such as chemical mechanical polishing (CMP) and/or mechanical grinding to achieve planarity. In addition, planarity in these legacy implementations may be further challenged by warpage inherent with using organic substrates to surround the one or more dies.
In legacy implementations, placing copper pillars around the one or more dies may be done by pre-fabricating copper pillars and using a pick and place process to place the copper pillars on a substrate. The copper pillars then also be plated within a photoresist, and then the surrounding space filled with a dielectric that embeds the one or more dies. These legacy processes may result in some throughput issues associated with the slow pick and place process. There will also be quality issues due to pillar shifting in subsequent manufacturing stages. Additionally, legacy tall copper pillar plating techniques involve additional cost, and may also result in highly variable bump heights that may be attributed to uneven copper plating rates.
Embodiments described herein may provide an efficient and cost-effective way of disaggregating what would otherwise be a single legacy package into separate portions, and electrically and physically coupling the separate portions in a high-speed, high-bandwidth manner using glass core technology. This architecture will increase yield through the benefit of disaggregation and improve assembly yield through the benefit of CTE matching leading to better bump coplanarity between die and glass interposer, and increase reliability by providing increased package stiffness, reduced warpage, and reduced mechanical stress
In the following detailed description, reference is made to the accompanying drawings which form a part hereof, wherein like numerals designate like parts throughout, and in which is shown by way of illustration embodiments in which the subject matter of the present disclosure may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of embodiments is defined by the appended claims and their equivalents.
For the purposes of the present disclosure, the phrase “A and/or B” means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase “A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
The description may use perspective-based descriptions such as top/bottom, in/out, over/under, and the like. Such descriptions are merely used to facilitate the discussion and are not intended to restrict the application of embodiments described herein to any particular orientation.
The description may use the phrases “in an embodiment,” or “in embodiments,” which may each refer to one or more of the same or different embodiments. Furthermore, the terms “comprising,” “including,” “having,” and the like, as used with respect to embodiments of the present disclosure, are synonymous.
The term “coupled with,” along with its derivatives, may be used herein. “Coupled” may mean one or more of the following. “Coupled” may mean that two or more elements are in direct physical or electrical contact. However, “coupled” may also mean that two or more elements indirectly contact each other, but yet still cooperate or interact with each other, and may mean that one or more other elements are coupled or connected between the elements that are said to be coupled with each other. The term “directly coupled” may mean that two or more elements are in direct contact.
Various operations may be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent.
As used herein, the term “module” may refer to, be part of, or include an ASIC, an electronic circuit, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality.
Various Figures herein may depict one or more layers of one or more package assemblies. The layers depicted herein are depicted as examples of relative positions of the layers of the different package assemblies. The layers are depicted for the purposes of explanation, and are not drawn to scale. Therefore, comparative sizes of layers should not be assumed from the Figures, and sizes, thicknesses, or dimensions may be assumed for some embodiments only where specifically indicated or discussed.
The TGVs 106 extend from a first side of the glass core 102 to a second side of the glass core 102 opposite the first side. A conductive material 108 fills the plurality of TGVs 106, with a portion of the conductive material 108a, 108b extending beyond the first side and/or the second side of the glass core 102. During the manufacturing process, the glass core 102, TGVs 106, and conductive material 108 may be pre-manufactured.
A die 120 may be inserted within the opening 104 within the glass core 102. The die 120 may include one or more electrical contacts 122 on a first side of the die, and one or more electrical contacts 124 on a second side of the die opposite the first side. Note that in embodiments, a portion of the electrical contact 124a may extend beyond the side of the die 120. In embodiments, a thickness of the die 120 and a thickness of the glass core 102 may be similar, and may be on the order of 100 to 500 μm in thickness. In embodiments, the thickness of the glass core 102 may be adjusted to be consistent with the height of the die 120. In embodiments, as shown in greater detail respect to
In embodiments, die 120 and glass core 102 may be designed to have a similar CTE. A similar CTE may minimize warpage and other mechanical stresses between the die 120 and the glass core 102 during operation, or when they are otherwise in an increased thermal state. In embodiments, the glass core 102 may have a varied material composition in order to adjust the CTE. For example, a very low CTE may be achieved if the glass is quartz or a silicon dioxide structure. In embodiments, the CTE may range from below 1 to 12. In legacy implementations where an organic material is used instead of the glass core 102, the significantly higher CTE of the organic material will cause a mismatched with the CTE of the die and result in mechanical stress on the legacy package, including dies that are deformed/bowed that may result in a height mismatch with the organic material.
An opening 204 may include a single die 220, which may be similar to die 120 of
Although non-limiting examples of configurations of openings 204, 234, 236, 238, 240 within the glass core 202 are shown, any opening size or shape may be created within the glass core 202. This may include, for example but not limited to, rectangles with rounded corners, circles, ovals, or any other regular or irregular shapes.
The active die 320 may be electrically coupled with a second die 362 and a third die 364 through a FLI interface 360. Both the second die 362 and the third die 364 are above the active die 320. The active die 320 may also be electrically coupled with TSVs 308, for example, for power and/or signal transmission. In legacy implementations, the second die 362 and the third die 364 may be interposer dies that are in turn electrically and physically coupled with a number of chiplets 366.
During the manufacture of legacy package 300, the active die 320 is embedded within the core 302, which may be a dielectric. Stages in the legacy manufacturing process, include creating a cavity within the dielectric, typically by laser ablation, which may be a slow and costly process. In addition, legacy manufacturing that involves forming and placing the copper pillars 308 is a complex process with quality control challenges. As a result, in legacy implementations, pads within the FLI 360 and/or bumps 309 may be non-planar, and require CMP or mechanical grinding processing to bring them within tolerances. In addition, a CTE mismatch between the CTE of the core 302 and the CTE of the active die 320 will result in warpage and mechanical stress resulting from thermal gradients during legacy package 300 manufacturing and operation.
Embodiments, the die 420 may include electrical contacts 424, which may be similar to contacts 124 of
Note that after the removal of the carrier 410 and the LRL 407 from the package 400, a series of bumps in an MLI layer (not shown, but similar to bumps 309 of
In embodiments, the LRL 507 may have a thickness required to achieve a continuous and void-free bond between the glass carrier 510 and subsequent application of the glass core 502 as described with respect to
In embodiments, the opening 504 may be formed by wet etching, dry etching, or a laser process. Other processes may include photo-definable glass, where the opening 504 may be defined by using a lithography exposure process followed by wet etching, to provide a lithography alignment of multiple openings that may be formed within the glass core 502. In embodiments, the openings may be created using the laser-assisted etching of glass interconnects process as described below with respect to
In other embodiments, the stages described above with respect to
At block 602, the process may include identifying a glass core having a first side and a second side opposite the first side. In embodiments, the glass core may be similar to glass core 102 of
At block 604, the process may further include forming an opening in the glass core, the opening extending from the first side of the glass core to the second side of the glass core. In embodiments, the opening in the glass core may be similar to openings 104 of
At block 606, the process may further include forming one or more TGV in the glass core, the one or more TGV extending from the first side to the second side of the glass core. In embodiments, the TGVs may be similar to TGVs 106 of
At block 608, the process may further include inserting a conductive material into the one or more TGV, wherein the first side of the glass core is electrically coupled with the second side of the glass core. In embodiments, the conductive material may be similar to conductive material 108 of
Diagram 700 shows a high level process flow for a through via and blind via (or trench) in a microelectronic package substrate (e.g. glass) using LEGIT to create a through via or a blind via. A resulting volume/shape of glass with laser-induced morphology change that can then be selectively etched to create a trench, a through hole or a void that can be filled with conductive material. A through via 712 is created by laser pulses from two laser sources 702, 704 on opposite sides of a glass wafer 706. As used herein, a through drill and a through via refers to when the drill or the via starts on one side of the glass/substrate and ends on the other side. A blind drill and a blind via refers to when the drill or the via starts on the surface of the substrate and stops half way inside the substrate. In embodiments, the laser pulses from the two laser sources 702, 704 are applied perpendicularly to the glass wafer 706 to induce a morphological change 708, which may also be referred to as a structural change, in the glass that encounters the laser pulses. This morphological change 708 includes changes in the molecular structure of the glass to make it easier to etch out (remove a portion of the glass). In embodiments, a wet etch process may be used.
Diagram 720 shows a high level process flow for a double blind shape. A double blind shape 732, 733 may be created by laser pulses from two laser sources 722, 724, which may be similar to laser sources 702, 704, that are on opposite sides of the glass wafer 726, which may be similar to glass wafer 706. In this example, adjustments may be made in the laser pulse energy and/or the laser pulse exposure time from the two laser sources 722, 724. As a result, morphological changes 728, 729 in the glass 726 may result, with these changes making it easier to etch out portions of the glass. In embodiments, a wet etch process may be used.
Diagram 740 shows a high level process flow for a single-blind shape, which may also be referred to as a trench. In this example, a single laser source 742 delivers a laser pulse to the glass wafer 746 to create a morphological change 748 in the glass 746. As described above, these morphological changes make it easier to etch out a portion of the glass 752. In embodiments, a wet etch process may be used.
Diagram 760 shows a high level process flow for a through via shape. In this example, a single laser source 762 applies a laser pulse to the glass 766 to create a morphological change 768 in the glass 766, with the change making it easier to etch out a portion of the glass 772. As shown here, the laser pulse energy and/or laser pulse exposure time from the laser source 762 has been adjusted to create an etched out portion 772 that extends entirely through the glass 766.
With respect to
In embodiments using the process described with respect to
In an embodiment, the electronic system 800 is a computer system that includes a system bus 820 to electrically couple the various components of the electronic system 800. The system bus 820 is a single bus or any combination of busses according to various embodiments. The electronic system 800 includes a voltage source 830 that provides power to the integrated circuit 810. In some embodiments, the voltage source 830 supplies current to the integrated circuit 810 through the system bus 820.
The integrated circuit 810 is electrically coupled to the system bus 820 and includes any circuit, or combination of circuits according to an embodiment. In an embodiment, the integrated circuit 810 includes a processor 812 that can be of any type. As used herein, the processor 812 may mean any type of circuit such as, but not limited to, a microprocessor, a microcontroller, a graphics processor, a digital signal processor, or another processor. In an embodiment, the processor 812 includes, or is coupled with, a glass core that includes openings and TGV, as disclosed herein. In an embodiment, SRAM embodiments are found in memory caches of the processor. Other types of circuits that can be included in the integrated circuit 810 are a custom circuit or an application-specific integrated circuit (ASIC), such as a communications circuit 814 for use in wireless devices such as cellular telephones, smart phones, pagers, portable computers, two-way radios, and similar electronic systems, or a communications circuit for servers. In an embodiment, the integrated circuit 810 includes on-die memory 816 such as static random-access memory (SRAM). In an embodiment, the integrated circuit 810 includes embedded on-die memory 816 such as embedded dynamic random-access memory (eDRAM).
In an embodiment, the integrated circuit 810 is complemented with a subsequent integrated circuit 811. Useful embodiments include a dual processor 813 and a dual communications circuit 815 and dual on-die memory 817 such as SRAM. In an embodiment, the dual integrated circuit 810 includes embedded on-die memory 817 such as eDRAM.
In an embodiment, the electronic system 800 also includes an external memory 840 that in turn may include one or more memory elements suitable to the particular application, such as a main memory 842 in the form of RAM, one or more hard drives 844, and/or one or more drives that handle removable media 846, such as diskettes, compact disks (CDs), digital variable disks (DVDs), flash memory drives, and other removable media known in the art. The external memory 840 may also be embedded memory 848 such as the first die in a die stack, according to an embodiment.
In an embodiment, the electronic system 800 also includes a display device 850, an audio output 860. In an embodiment, the electronic system 800 includes an input device such as a controller 870 that may be a keyboard, mouse, trackball, game controller, microphone, voice-recognition device, or any other input device that inputs information into the electronic system 800. In an embodiment, an input device 870 is a camera. In an embodiment, an input device 870 is a digital sound recorder. In an embodiment, an input device 870 is a camera and a digital sound recorder.
As shown herein, the integrated circuit 810 can be implemented in a number of different embodiments, including a package substrate having a glass core that includes openings and TGV, according to any of the several disclosed embodiments and their equivalents, an electronic system, a computer system, one or more methods of fabricating an integrated circuit, and one or more methods of fabricating an electronic assembly that includes a package substrate having a glass core that includes openings and TGV, according to any of the several disclosed embodiments as set forth herein in the various embodiments and their art-recognized equivalents. The elements, materials, geometries, dimensions, and sequence of operations can all be varied to suit particular I/O coupling requirements including array contact count, array contact configuration for a microelectronic die embedded in a processor mounting substrate according to any of the several disclosed package substrates having a glass core that includes openings and TGV embodiments and their equivalents. A foundation substrate may be included, as represented by the dashed line of
The following paragraphs describe examples of various embodiments.
Example 1 is an apparatus, comprising: a glass core with a first side and a second side opposite the first side; an opening in the glass core extending from the first side to the second side; and one or more through glass vias (TGV) proximate to the opening, the one or more TGV extending from the first side to the second side of the glass core, wherein the one or more TGV include an electrically conductive material that electrically couples the first side of the glass core with the second side of the glass core.
Example 2 may include the apparatus of example 1, or of any other example or embodiment described herein, wherein the electrically conductive material includes copper.
Example 3 may include the apparatus of example 1, or of any other example or embodiment described herein, wherein the one or more TGV are filled with an electrically conductive material.
Example 4 may include the apparatus of example 1, or of any other example or embodiment described herein, wherein a diameter of one of the one or more TGV is less than 25 μm, and wherein a pitch of the one or more TGV is less than 50 μm.
Example 5 may include the apparatus of example 1, or of any other example or embodiment described herein, further comprising a die with a first side and a second side opposite the first side, the die disposed within the opening of the glass core.
Example 6 may include the apparatus of example 5, or of any other example or embodiment described herein, wherein a first distance between the first side and the second side of the first die perpendicular to the first side of the first die, and a second distance between the first side of the second side of the glass core perpendicular to the first side of the glass core are substantially the same.
Example 7 may include the apparatus of example 5, or of any other example or embodiment described herein, wherein a value of a coefficient of thermal expansion (CTE) of the die and a value of a CTE of the glass core are substantially a same value.
Example 8 may include the apparatus of example 5, or of any other example or embodiment described herein, wherein the first side of the glass core and the first side of the die are on a substrate.
Example 9 may include the apparatus of example 5, or of any other example or embodiment described herein, wherein the die is a plurality of dies
Example 10 may include the apparatus of example 1, or of any other example or embodiment described herein, wherein the opening is a plurality of openings.
Example 11 may include the apparatus of example 1, or of any other example or embodiment described herein, wherein the opening is surrounded by the glass core.
Example 12 may include the apparatus of example 1, or of any other example or embodiment described herein, wherein the opening is at an edge of the glass core.
Example 13 is a method comprising: identifying a glass core having a first side and a second side opposite the first side; forming an opening in the glass core, the opening extending from the first side of the glass core to the second side of the glass core; forming one or more through glass vias (TGV) in the glass core, the one or more TGV extending from the first side to the second side of the glass core; and inserting a conductive material into the one or more TGV, wherein the first side of the glass core is electrically coupled with the second side of the glass core.
Example 14 may include the method of example 13, or of any other example or embodiment described herein, wherein the conductive material includes copper.
Example 15 may include the method of example 13, or of any other example or embodiment described herein, wherein a diameter of one of the one or more TGV is less than 25 μm, and wherein a pitch of the one or more TGV is less than 50 μm.
Example 16 may include the method of example 13, or of any other example or embodiment described herein, further comprising inserting a die having a first side and a second side opposite the first side into the opening of the glass core, wherein the first side of the die is proximate to the first side of the glass core, and the second side of the die is proximate to the second side of the glass core.
Example 17 may include the method of example 16, or of any other example or embodiment described herein, wherein a thickness of the die is approximate to a thickness of the glass core.
Example 18 may include the method of example 16, or of any other example or embodiment described herein, further comprising: attaching the second side of the glass core to a carrier; and attaching the second side of the die to the carrier.
Example 19 may include the method of example 16, or of any other example or embodiment described herein, wherein the first side of the die includes one or more electrical connections; and further comprising: forming an insulation layer on top of the first side of the die and the first side of the glass core; and forming one or more electrical contacts that extend through the insulation layer, the one or more electrical contacts electrically coupled, respectively, with the one or more TGV and the one or more electrical connections on the first side of the die.
Example 20 may include the method of example 16, or of any other example or embodiment described herein, wherein inserting a die having the first side and the second side opposite the first side into the opening of the glass core further includes inserting a plurality of dies, each having a first side and a second side opposite the first side into the opening of the glass core.
Example 21 may include the method of example 13, or of any other example or embodiment described herein, wherein forming an opening in the glass core further includes forming a plurality of openings in the glass core.
Example 22 is a package comprising: an interposer comprising: a glass core with a first side and a second side opposite the first side; an opening in the glass core extending from the first side to the second side; one or more through glass vias (TGV) proximate to the opening, the one or more TGV extending from the first side to the second side of the glass core, wherein the one or more TGV include an electrically conductive material that electrically couples the first side of the glass core with the second side of the glass core; and a first die with a first side and a second side opposite the first side, the first die disposed within the opening of the glass core, wherein the first side of the first die is proximate to the first side of the glass core, and the second side of the first die is proximate to the second side of the glass core, and wherein a first side of the first die includes one or more electrical connections; and a second die electrically coupled with at least one of the TGV and electrically coupled with at least one of the one or more electrical connections of the first die, the second die physically coupled with the interposer.
Example 23 may include the package of example 22, or of any other example or embodiment described herein, further comprising a third die electrically coupled with at least one of the TGV and electrically coupled with at least one of the one or more electrical connections of the first die, the third die physically coupled with the interposer.
Example 24 may include the package of example 22, or of any other example or embodiment described herein, wherein the opening in the glass core of the interposer is at an edge of the glass core.
Example 25 may include the package of example 22, or of any other example or embodiment described herein, wherein the electrically conductive material includes copper.
Various embodiments may include any suitable combination of the above-described embodiments including alternative (or) embodiments of embodiments that are described in conjunctive form (and) above (e.g., the “and” may be “and/or”). Furthermore, some embodiments may include one or more articles of manufacture (e.g., non-transitory computer-readable media) having instructions, stored thereon, that when executed result in actions of any of the above-described embodiments. Moreover, some embodiments may include apparatuses or systems having any suitable means for carrying out the various operations of the above-described embodiments.
The above description of illustrated embodiments, including what is described in the Abstract, is not intended to be exhaustive or to limit embodiments to the precise forms disclosed. While specific embodiments are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the embodiments, as those skilled in the relevant art will recognize.
These modifications may be made to the embodiments in light of the above detailed description. The terms used in the following claims should not be construed to limit the embodiments to the specific implementations disclosed in the specification and the claims. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.
