Patent Application
20240112977
This disclosure relates generally to the field of semiconductor packaging, and in particular, to power substrate packaging, such as, for example, an over-molded isolated substrate packaging.
Packaging an integrated circuit is typically a final stage of a semiconductor device fabrication process. During packaging, a semiconductor die, which represents the core of a semiconductor device, is encased in a housing that protects the die against physical damage and corrosion. For example, semiconductor dies are commonly mounted on a copper substrate, using solder alloy reflow, conductive epoxy, etc. The mounted semiconductor die is often then encapsulated within a plastic or epoxy compound.
Substrates for power electronics are different than printed circuit boards used for low power microelectronics. The power electronics substrate both provides the interconnections to form an electrical circuit and cool the components. Power electronic substrates carry higher currents and provide a higher voltage isolation (up to several thousand volts), as compared to microelectronic counterparts, and operate over a wide temperature range.
However, existing packaging technologies do not provide sufficient flexibility for creating a variety of lead connections. Moreover, conventional systems suffer from voltage creepage (due to the distance between leads).
The following summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended as an aid in determining the scope of the claimed subject matter.
In some implementations, the current subject matter relates to an isolated substrate packaging system, device, apparatus, and any associated methods thereof. The apparatus may include a housing having a top side and a bottom side. The housing may encapsulate one or more electronic components. The apparatus may also include one or more openings disposed in the bottom side of the housing. The openings may be configured for exposing one or more metallized surfaces of one or more electronic components. The metallized surfaces may be configured for coupling to one or more lead terminals.
In some implementations, the current subject matter may include one or more of the following optional features. One or more electronic components may include at least one of the following: direct copper bonded (DCB) substrate components, active metal brazed (AMB) substrate components, insulated metal substrate (IMS) components, and any combination thereof.
In some implementations, the housing may be configured encapsulate one or more semiconductor chips coupled to the one or more electronic components. One or more semiconductor chips and one or more electronic components may be configured to be coupled using at least one of the following: wire-bonding, one or more electrically-conductive clips, silver-sintering, soldering, and any combination thereof.
In some implementations, one or more lead terminals may be configured to be coupled to one or more metallized surfaces of one or more electronic components by inserting one or more lead terminals through one or more openings, contacting inserted one or more lead terminals with one or more metallized surfaces, and coupling one or more contacting lead terminals and one or more metallized surfaces. One or more lead terminals may be permanently coupled to one or more metallized surfaces. The apparatus may be configured for at least one of through-hole mounting and surface mounting to at least another one or more electronic components using one or more permanently coupled lead terminals.
In some implementations, one or more lead terminals may be temporarily coupled to one or more metallized surfaces. The apparatus may be configured for push-fit mounting to at least another one or more electronic components using one or more temporarily coupled lead terminals.
In some implementations, one or more lead terminals may be manufactured using at least one of the following: a copper, a copper alloy, a metal, a metal alloy, and any combination thereof.
In some implementations, the housing may be manufactured from at least one of the following: an epoxy compound, a plastic, and any combination thereof.
In some implementations, the current subject matter relates to a packaging structure, which may include a housing having a top side and a bottom side. The housing may encapsulate one or more electronic components. The structure may include one or more openings disposed in the bottom side of the housing. The openings may be configured for exposing one or more metallized surfaces of one or more electronic components. The structure may also include one or more lead terminals. The metallized surfaces may be configured for coupling to one or more lead terminals. One or more lead terminals may be configured to be coupled to one or more metallized surfaces of one or more electronic components by inserting one or more lead terminals through one or more openings, contacting inserted one or more lead terminals with one or more metallized surfaces, and coupling contacting one or more lead terminals and one or more metallized surfaces.
In some implementations, the current subject matter's packaging structure may include one or more of the following optional features. One or more electronic components may include at least one of the following: direct copper bonded (DCB) substrate components, active metal brazed (AMB) substrate components, insulated metal substrate (IMS) components, and any combination thereof. The housing may be configured encapsulate one or more semiconductor chips coupled to one or more electronic components. One or more semiconductor chips and one or more electronic components may be configured to be coupled using at least one of the following: wire-bonding, one or more electrically-conductive clips, silver-sintering, soldering, and any combination thereof.
In some implementations, one or more lead terminals may be permanently coupled to one or more metallized surfaces. The structure may be configured for at least one of through-hole mounting and surface mounting to at least another one or more electronic components using one or more permanently coupled lead terminals.
In some implementations, one or more lead terminals may be temporarily coupled to one or more metallized surfaces. The structure may be configured for push-fit mounting to at least another one or more electronic components using one or more temporarily coupled lead terminals.
In some implementations, one or more lead terminals may be manufactured using at least one of the following: a copper, a copper alloy, a metal, a metal alloy, and any combination thereof.
In some implementations, the housing may be manufactured from at least one of the following: an epoxy compound, a plastic, and any combination thereof.
The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims.
The accompanying drawings, which are incorporated in and constitute a part of this specification, show certain aspects of the subject matter disclosed herein and, together with the description, help explain some of the principles associated with the disclosed implementations. In the drawings,
The drawings are not necessarily to scale. The drawings are merely representations, not intended to portray specific parameters of the disclosure. The drawings are intended to depict exemplary implementations of the current subject matter, and therefore, are not to be considered as limiting in scope. In the drawings, like numbering represents like elements.
Further, certain elements in some of the figures may be omitted, and/or illustrated not-to-scale, for illustrative clarity. Cross-sectional views may be in the form of “slices”, and/or “near-sighted” cross-sectional views, omitting certain background lines otherwise visible in a “true” cross-sectional view, for illustrative clarity. Additionally, for clarity, some reference numbers may be omitted in certain drawings.
Various approaches in accordance with the present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, where implementations of a system and method are shown. The devices, system(s), component(s), etc., may be embodied in many different forms and are not to be construed as being limited to the example implementations set forth herein. Instead, these example implementations are provided so this disclosure will be thorough and complete, and will fully convey the scope of the current subject matter to those skilled in the art.
To address these and potentially other deficiencies of currently available solutions, one or more implementations of the current subject matter relate to methods, systems, articles of manufacture, and the like that can, among other possible advantages, provide a packaging structure configured for direct access to surface connection of its internal components.
Direct bonded copper (DBC), also known as direct copper bonded (DCB) substrates, have very good thermal conductivity, and are thus suitable for power modules. DCBs are composed of a ceramic tile with a sheet of copper bonded to one or both sides of the ceramic tile. Suitable for smaller lots, active metal brazed (AMB) substrates involve the attachment of thick metal layers to ceramic plates. Insulated metal substrates (IMS) are also used for power modules and consist of a metal baseplate covered by a thin layer of dielectric and a layer of copper. IMS are single-sided substrates.
Some existing packaging technologies include the surface mount power device (SMPD) packaging. Compared to other copper-based lead-frame packages, devices, packaged using SMPD, exhibit better thermal performance, lower weight, and better power cycling capability. The SMPD package can be easily surface-mounted on a printed circuit board (PCB) using a standard pick-and-place and reflow soldering process. No screws, cables, bus-bars or hand soldered contacts are needed. Weighing only 8 g, it is much lighter (typically by 50%) than comparable conventional power modules. Further, the SMPD devices have a compact and ultra-low-profile package, thereby allowing use of the same heat sink for multiple devices, saving PCB space. Another added benefit of being smaller and lighter is that it provides a better protection against vibrations and g-forces, especially if used in portable appliances, increasing the life expectancy and reliability of these devices. Surface-mountable high-voltage power MOSFETs and IGBTs may be packaged using this technology. A ceramic isolation of up to 4.5 kV is achieved with the DCB substrate technology, where an electrically isolated tab is provided for heat sinking. The DCB provides low thermal impedance and increased power and temperature cycling capabilities.
In some implementations, the current subject matter relates to an over-molded isolated substrate packaging device, such, as for example, a DCB, an AMB and/or other device packaging that may be integrated into a package and may allow direct access to one or more surface connections of internal components (e.g., MOSFET(s), IGBT(s), overvoltage semiconductor(s), passive component(s), control circuit(s), etc.). The packaging device may be manufactured using one or more known insert molding technologies (such, as for example, film-assist molding technologies). The resulting mold may include projections that may contact substrates' metallized surface during encapsulation process leaving open access to one or more terminal points of the substrate surface.
In some implementations, a conductive joint and/or contact may be created directly between the exposed surface terminal. This may allow the packaging device to be configured for multiple end user applications, such as for example, but not limited to, surface mounting, through hole, pressure contact or press-fit contact (e.g., direct contact of DCB terminal with application), and/or any other applications. The exposed “topside” of the isolated substrate may further allow for thermal management. Any internal connections within the packaging device may be made using wire-bonding, electrically-conductive clips, and/or any other suitable methods (e.g., silver (Ag) sinter, solder, etc.). Further, in some exemplary implementations, any terminal configurations may be adjusted to suit various applications through tooling, process, design, etc.
The structure 100 may be configured to include a housing 102 having a top side 111 and bottom side 113. The housing 102 may encapsulate and/or enclose one or more direct copper bound (DCB) component(s) (and/or any other component(s)) 104, a filling material 106, and a chip or a die (used interchangeably herewith) 110. One or more openings 107 (a, b, c, d) may be created on the bottom side 113 during a molding process of the housing 102, for example, such as, when the filling material 106 is being poured into a mold to create the structure 100. The filling materials 106 may be configured to be manufactured from an epoxy, plastic, and/or any other suitable non-conductive material.
The openings 107 may be configured to expose one or more metallized surfaces 108 (a, b, c, d) of the DCB component(s) 104. For example, the opening 107a may be configured to expose a metallized surface 108a. Exposing of the surfaces 108 using corresponding openings 107 may be configured to allow coupling of one or more lead terminals 112 (a, b, c, d).
The structure 100 may be configured to have any number of openings 107. The number of openings 107 may be selected in accordance with specific device designs, applications, requirements of other electronic components to which structure 100 may be coupled and/or any other uses. For example, as shown in
As shown in
In some implementations, the die 110 may be configured to be coupled to one or more DCB components 104. The coupling may be using any desired means, such as, for example, wire-bonding 114 (a, b) (as shown in
FIG. if illustrates an exemplary process 150 for coupling one or more terminals 112 to the metallized surfaces 108 exposed by the openings 107 in the structure 100. One or more terminals 112 (a, b, c, d) (only terminals 112a and 112b are shown in
For example, as shown in
The coupling portion 156 may be configured to be coupled to the metallized surface 108a. To enable ease of positioning and coupling of the coupling portion 156 to the metallized surface 108a (and/or any other surface 108), the length and/or surface area of the coupling portion 156 may be smaller than at least one of the dimensions of the metallized surface 108a.
For positioning and coupling of the terminal 112a, as shown in
As shown in
Similarly, device 204 may include openings 210 (a, b, c, d) that may be used for positioning and/or coupling of terminals 212 (a, b, c, d), respectively. The openings 210 may (similar to device 202) be created in the bottom side 203 of the device 204. Utilizing the same “through-hole” technique, the terminals 212 may be coupled to the respective metallized surfaces of the device 204. As shown in
As shown in
The components and features of the devices described above may be implemented using any combination of discrete circuitry, application specific integrated circuits (ASICs), logic gates and/or single chip architectures. Further, the features of the devices may be implemented using microcontrollers, programmable logic arrays and/or microprocessors or any combination of the foregoing where suitably appropriate. It is noted that hardware, firmware and/or software elements may be collectively or individually referred to herein as “logic” or “circuit.”
It will be appreciated that the exemplary devices shown in the block diagrams described above may represent one functionally descriptive example of many potential implementations. Accordingly, division, omission or inclusion of block functions depicted in the accompanying figures does not infer that the hardware components, circuits, software and/or elements for implementing these functions would necessarily be divided, omitted, or included in embodiments.
Some embodiments may be described using the expression “one embodiment” or “an embodiment” along with their derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase “in one embodiment” (or derivatives thereof) in various places in the specification are not necessarily all referring to the same embodiment. Moreover, unless otherwise noted the features described above are recognized to be usable together in any combination. Thus, any features discussed separately may be employed in combination with each other unless it is noted that the features are incompatible with each other.
It is emphasized that the abstract of the disclosure is provided to allow a reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing detailed description, it can be seen that various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein,” respectively. Moreover, the terms “first,” “second,” “third,” and so forth, are used merely as labels, and are not intended to impose numerical requirements on their objects. Further, the use of “including,” “comprising,” or “having” and variations thereof herein is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. Accordingly, the terms “including,” “comprising,” or “having” and variations thereof are open-ended expressions and can be used interchangeably herein.
For the sake of convenience and clarity, terms such as “top”, “bottom”, “upper”, “lower”, “vertical”, “horizontal”, “lateral”, “transverse”, “radial”, “inner”, “outer”, “left”, and “right” may be used herein to describe the relative placement and orientation of the features and components, each with respect to the geometry and orientation of other features and components appearing in the perspective, exploded perspective, and cross-sectional views provided herein. Said terminology is not intended to be limiting and includes the words specifically mentioned, derivatives therein, and words of similar import.
What has been described above includes examples of the disclosed architecture. It is, of course, not possible to describe every conceivable combination of components and/or methodologies, but one of ordinary skill in the art may recognize that many further combinations and permutations are possible. Accordingly, the novel architecture is intended to embrace all such alterations, modifications and variations that fall within the spirit and scope of the appended claims.
The foregoing description of example embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the present disclosure to the precise forms disclosed. Many modifications and variations are possible in light of this disclosure. It is intended that the scope of the present disclosure be limited not by this detailed description, but rather by the claims appended hereto. Future filed applications claiming priority to this application may claim the disclosed subject matter in a different manner and may generally include any set of one or more limitations as variously disclosed or otherwise demonstrated herein.
All directional references (e.g., proximal, distal, upper, lower, upward, downward, left, right, lateral, longitudinal, front, back, top, bottom, above, below, vertical, horizontal, radial, axial, clockwise, and counterclockwise) are just used for identification purposes to aid the reader's understanding of the present disclosure, and do not create limitations, particularly as to the position, orientation, or use of this disclosure. Connection references (e.g., attached, coupled, connected, and joined) are to be construed broadly and may include intermediate members between a collection of elements and relative movement between elements unless otherwise indicated. As such, connection references do not necessarily infer that two elements are directly connected and in fixed relation to each other.
Further, identification references (e.g., primary, secondary, first, second, third, fourth, etc.) are not intended to connote importance or priority but are used to distinguish one feature from another. The drawings are for purposes of illustration only and the dimensions, positions, order and relative sizes reflected in the drawings attached hereto may vary.
The present disclosure is not to be limited in scope by the specific implementations described herein. Indeed, other various implementations of and modifications to the present disclosure, in addition to those described herein, will be apparent to those of ordinary skill in the art from the foregoing description and accompanying drawings. Thus, such other implementations and modifications are intended to fall within the scope of the present disclosure. Furthermore, the present disclosure has been described herein in the context of a particular implementation in a particular environment for a particular purpose. Those of ordinary skill in the art will recognize the usefulness is not limited thereto and the present disclosure may be beneficially implemented in any number of environments for any number of purposes. Thus, the claims set forth below are to be construed in view of the full breadth and spirit of the present disclosure as described herein.
