Claims
- 1. A substrate for interconnecting electronic components comprising:
- at least one layer of non-porous dielectric material;
- non-porous metallurgical features of a first metallurgy disposed in said dielectric material comprising metallurgical patterns disposed on the surfaces of said at least one layer and a plurality of metallurgical vias extending between the surfaces of said at least one layer, and wherein a permeable collar is disposed between said via and said dielectric material; and
- a flexible polymeric material disposed in said permeable collar, wherein said flexible polymeric material is a polymeric material selected from the group consisting of polyimides, bismaleimides, acetylenes, epoxies, and thermally-stable silicon-containing polymers.
- 2. The substrate of claim 1 wherein said permeable collar comprises a uniform permeable void.
- 3. The substrate of claim 1 wherein said permeable collar comprises a second metallurgy having permeable pores.
- 4. The substrate of claim 3, wherein said first metallurgy comprises a pure metal and wherein said second metallurgy comprises said first metal and a sintering retardant.
- 5. The substrate of claim 1, wherein said first metallurgy comprises a pure metal.
- 6. The substrate of claim 1, wherein said flexible material is thermally stable to temperatures sufficient to effect interconnection of components to said substrate.
- 7. The substrate of claim 1, wherein said dielectric material comprises at least a crystallizable glass.
- 8. The substrate of claim 7, wherein said crystallizable glass has cordierite as its principle crystalline phase.
- 9. The substrate of claim 1, wherein said first metallurgy comprises a metal-based metallurgy, said metal being selected from the group comprising copper, aluminum, silver, gold, platinum, palladium and alloys thereof.
- 10. The substrate of claim 4, wherein said first metallurgy comprises one of the group comprising copper, silver, gold, platinum, palladium and aluminum and alloys thereof.
- 11. A structure for interconnection vias in a multilayer substrate having a pattern of via holes thereon comprising:
- a conductive, non-porous first via material disposed in said holes and having a diameter which is less than the diameter of said holes; and
- a porous second via material disposed between first via material and the substrate.
- 12. The structure of claim 11, further comprising a polymeric material disposed in the pores of said second material, wherein said polymeric material is a polymeric material selected from the group consisting of polyimides, bismaleimides, acetylenes, epoxies, and thermally-stable silicon-containing polymers.
- 13. The structure of claim 12, wherein said polymeric material is conductive.
- 14. The structure of claim 11, wherein said first via material comprises a pure metal.
- 15. The structure of claim 11, wherein said second via material comprises a combination of said first via material and an oxide.
Continuing Application Data
This application is a continuation in part application of U.S. patent application Ser. No. 07/167,606, filed Mar. 11, 1988, entitled "Low Dielectric Composite Substrate", now abandoned.
US Referenced Citations (2)
Number |
Name |
Date |
Kind |
4861646 |
Barringer et al. |
Aug 1989 |
|
4880684 |
Boss et al. |
Nov 1989 |
|
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
167606 |
Mar 1988 |
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