Patent Application
20190122897
The present invention is directed to methods and apparatuses for low profile circuits. In particular, the present invention is directed to methods and apparatuses for packaging semiconductor dice and interconnection circuits in extremely low profile systems.
Electronic circuit miniaturization has been proceeding constantly, with newer technologies and process improvements yielding notable improvements. Surface-mount technology (SMT) is a method for producing electronic circuits in which the components are mounted or placed directly onto the surface of printed circuit boards (PCBs). An electronic device so made is called a surface-mount device (SMD). In the industry it has largely replaced the through-hole technology construction method of fitting components with wire leads into holes in the circuit board. Both technologies can be used on the same board, with the through-hole technology used for components not suitable for surface mounting such as large transformers and heatsinked power semiconductors.
An SMT component is usually smaller than its through-hole counterpart because it has either smaller leads or no leads at all. It may have short pins or leads of various styles, flat contacts, a matrix of solder balls (BGAs), or terminations on the body of the component.
Surface-mount technology was developed in the 1960s and became widely used in the late 1980s. Much of the pioneering work in this technology was by IBM. The design approach first demonstrated by IBM in 1960 in a small-scale computer was later applied in the Launch Vehicle Digital Computer used in the Instrument Unit that guided all Saturn D3 and Saturn V vehicles. Components were mechanically redesigned to have small metal tabs or end caps that could be directly soldered to the surface of the PCB. Components became much smaller and component placement on both sides of a board became far more common with surface mounting than through-hole mounting, allowing much higher circuit densities. Often only the solder joints hold the parts to the board, in rare cases parts on the bottom or “second” side of the board may be secured with a dot of adhesive to keep components from dropping off inside reflow ovens if the part has a large size or weight. Adhesive is sometimes used to hold SMT components on the bottom side of a board if a wave soldering process is used to solder both SMT and through-hole components simultaneously. Alternatively, SMT and through-hole components can be soldered together without adhesive if the SMT parts are first reflow-soldered, then a selective solder mask is used to prevent the solder holding the parts in place from reflowing and the parts floating away during wave soldering. Surface mounting lends itself well to a high degree of automation, reducing labor cost and greatly increasing production rates. SMDs can be one-quarter to one-tenth the size and weight, and one-half to one-quarter the cost of equivalent through-hole parts.
In accordance with embodiments of the present invention, a method is provided. The method includes one or more of forming a cutout in a substrate, positioning an extracted die in a coplanar orientation with the substrate in the cutout, and securing the extracted die in the cutout. The extracted die has been removed from a previous packaged integrated circuit and includes one or more original bond pads and one or more original ball bonds on the one or more original bond pads. The method also includes 3D printing one or more bond connections between the one or more bond pads and one or more connection points of the substrate or one or more bond pads of another die secured to the substrate.
In accordance with another embodiment of the present invention, a circuit is provided. The circuit includes one or more of a planar substrate including a plurality of connection points, a die including a plurality of bond pads, coplanarly secured within a cutout in the substrate, and a plurality of bond connections between the bond pads and the connection points, the bond connections conforming to all surfaces of the substrate and the die between the bond pads and the connection points.
In accordance with yet another embodiment of the present invention, a circuit is provided. The circuit includes one or more of a planar printed circuit board including connection points and a cutout, an extracted die removed from a previous packaged integrated circuit, and encapsulant to secure the die within the cutout in a generally coplanar orientation with the printed circuit board. The extracted die includes original bond pads and one or more original ball bonds on the original bond pads. The circuit also includes bond connections between the original bond pads and one of the connection points or other bond pads of another die, the bond connections conforming to all surfaces of the printed circuit board, the extracted die, and the other die between the other bond pads and the connection points.
An advantage of the present invention is it allows for greatly reduced circuit height by planarly embedding a die in a circuit board or substrate, and utilizing 3D printed bond connections in lieu of conventional bond wires. This results in a package with the approximate thickness of a die.
Another advantage of the present invention is it eliminates solder connections in a die/substrate circuit. Because conventional solder is not present, there are no issues related to lead content in solder or solder bridging problems.
Yet another advantage of the present invention is by replacing conventional bond wires with 3D printed bond connections, reliability is greatly improved. Conventional bond wires have a free mass that provides mechanical stress to ball bonds and bond pad interfaces when under shock and vibration conditions. Additionally, conventional wire bonding processes with Gold (Au) ball bonds on Aluminum (Al) bond pads are known to have reliability problems that are accelerated at high temperatures. 2D printed bond connections have neither of these problems since they are conformal to interconnected surfaces (i.e. no free mass) and the metallic composition includes Nickel and Silver instead of Gold. Additionally and significantly, conventional bond wires have a bend radius and height that limits packaging to taller structures than the present invention, thus impacting extremely flat packing options for the circuit.
Additional features and advantages of embodiments of the present invention will become more readily apparent from the following description, particularly when taken together with the accompanying drawings.
The present invention is directed to methods and circuits for producing very low profile circuits. By matching the thickness of one or more dice with a substrate surrounding the one or more dice, and 3D printing bond connections between the one or more dice and the substrate, an extremely low profile circuit may be created. Although various forms of printed circuits and substrates may have low profile conformal connections, these are generally provided to interposers or dice in a flip chip or other compact arrangement. Thus, although relatively low profile “stacked circuits” may be created, they are still significantly thicker than a single printed circuit board or substrate.
In some embodiments conventional bond wires are used to interconnect bond pads of the one or more dice with other bond pads of other dice or connection points on the substrate. Bond wires have the disadvantage of adding height to the circuit as well as undesirable levels of reliability and vulnerability to shock and vibration. The present invention eliminates bond wires by 3D printing bond connections that may include bond conductors and bond insulators. 3D printed bond connections have the additional advantage of able to being crossed while remaining conformal to the underlying die surfaces or substrate surfaces. A bond insulator printed between bond conductors of two traces can electrically isolate the two bond conductors and allow crossing of 3D printed bond connections. Therefore what is needed is a method in circuit to provide extremely low total circuit thickness without utilizing bond wires or stacking components.
In the context of the present application, a “die” may either be a bare (new production) die either in singular form or cut into an individual die from a semiconductor wafer, or an extracted die. An extracted die is a die removed by any of several known processes from a previous packaged integrated circuit. An extracted die is a fully functional die. When an extracted die is removed from the previous integrated circuit package, some original bond wires likely have been removed and one or more original ball bonds remain. In current technology packaged integrated circuits, the vast majority of bond wire interconnections are made with Au thermosonic ball bonding. Each previously used original bond pad of an extracted die may have an original ball bond present, although one or more unbonded bond pads may not have an original ball bond present.
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Substrate system 100 includes a substrate or printed circuit board 108. Substrate or printed circuit board 108 may be made from any known materials as long as sufficient rigidity is achieved when the substrate or printed circuit board 108 is approximately the same thickness as dice 104. Therefore, the substrate or printed circuit board 108 may be constructed from FR-4, ceramic, cured epoxy, fiberglass, carbon fiber, or any other suitable material. Although in most embodiments, the top surface of substrate or printed circuit board 108 is mostly nonconductive, in some embodiments the top surface may be conductive. In those cases, if it is desirable to interconnect bond pads of the dice 104 with the conductive surface of the substrate or printed circuit board 108, then only 3D printed bond conductors 132 are required. In other cases, if it is desirable to isolate bond pads of the dice 104 from a conductive surface of the substrate or printed circuit board 108, then 3D printed bond conductors 132 applied over 3D printed bond insulators 128 would be provided.
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The substrate or printed circuit board 108 may have no inherent electrical connections by itself, including traces, connection points 124, or vias known in the art. In some embodiments, the substrate or printed circuit board 108 may have any combination of traces, connection points 124, or vias. Connection points 124 denotes any connection location on the substrate or printed circuit board 108 for any purpose, including a bond pad, a via, a component pad such as for a discrete component including resistors, capacitors, inductors, diodes, or transistors, a connector pad for any sort of connector, or any other type of electrical connection point.
Substrate system 100 also includes one or more 3D printed bond connections 116. 3D printed bond connections 116 are as described in related parent application Ser. No. 14/142,823 (Docket GCP0004 US), which is included by reference herein for all purposes. In some embodiments, 3D printed bond connections 116 include only 3D printed bond conductors 132. In other embodiments, 3D printed bond connections 116 also include one or more 3D printed bond insulators 128. In the exemplary substrate system 100 illustrated in
3D printers are able to precisely deposit insulating 128 or conducting 132 material on complex shapes, and are able to build up or layer the insulating or conducting material to a precise thickness. 3D printers include a spray head, which applies bond insulator 128 material or bond conductor 132 material to selected areas. 3D printers typically deposit material in layers, and build up a desired thickness of material by depositing multiple layers. The 3D printer is computer controlled equipment, and sprays material according to a file or files prepared beforehand designating specific locations that material will be applied to.
In one embodiment, the 3D printer uses an extrusion process to apply either the bond insulator material 128 or the bond conductor material 132, or both. The extrusion process, sometimes referred to as Fused Deposition Modeling (FDM) uses a heated nozzle to extrude molten material.
In another embodiment, the 3D printer uses a Colorjet Printing (CJP) process to apply either the bond insulator material 128 or the bond conductor material 132, or both. The CJP process utilizes an inkjet-based technology to spread fine layers of a dry substrate material. The dry substrate is most often in a powder form. The inkjet applies a binder to the substrate after applying the dry substrate material in order to solidify and cure the dry substrate.
In the preferred embodiment, the 3D printer uses a selective laser sintering process. Either bond insulator material 128 or bond conductor material 132 is applied in powder form. The bond insulator material 128 is a material able to be applied in powder form or extruded, and is generally a polymer or plastic. However, any material having suitable insulation properties, able to adhere to surfaces of the die 104, encapsulant 112, and substrate or printed circuit board 108, and able to be applied with a 3D printer material spray head is suitable as bond insulator material 128.
The bond conductor material 132 is also a material able to be applied in powder form or extruded, and includes at least conductive metal and possibly polymer or plastic content in order to provide elastomeric or resilient properties. In the preferred embodiment, the metal content is silver. In other embodiments, the material may include alone or in combination gold, aluminum, or copper.
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If the die 104 has a significantly different thickness than the substrate or printed circuit board 108, it will be desirable to reduce the thickness of the thicker of the die 104 or the substrate or printed circuit board 108. In one embodiment, when the die 104 thickness is greater than the desired substrate or printed circuit board 108 thickness, the die 104 may be thinned to the PCB thickness(or thinner), down to approximately four mils or 0.004 inches.
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At block 504, height profiles for one or more dies 104 and a substrate or printed circuit board 108 are determined. In a first embodiment, the existing height or thickness of the one or more dies 104 is the same as or very similar to the existing height of the substrate or printed circuit board 108. In a second embodiment, the existing height or thickness of the one or more dies 104 is less than the existing height of the substrate or printed circuit board 108. In a third embodiment, the existing height or thickness of the one or more dies 104 is greater than the existing height of the substrate or printed circuit board 108.
For the embodiments where the thicknesses of the one or more dies 104 and the substrate or printed circuit board 108 are different, it may be possible and desirable to reduce the thickness of the thicker of the dies 104 or substrate/printed circuit board 108 components. It is desirable to maintain similar thicknesses between the one or more dies 104 and the substrate or printed circuit board 108. Flow proceeds to block 508.
At block 508, cutouts 204, 304 and cutout voids 208 are formed in the substrate or printed circuit board 108. Each of the cutouts 204, 304 needs to be slightly larger than the die 104 intended to occupy each cutout 204, 304 in order for encapsulant 112 to flow within the cutout voids 208. Flow proceeds to block 512.
At block 512, each die 104 is positioned within a corresponding cutout 204, 304 and cutout voids 208. Preferably, each die 104 should be centered within the corresponding cutout 204, 304. Flow proceeds to block 516.
At block 516, encapsulant 112 is backfilled within the cutout voids 208 around each die 104. For embodiments where a portion of the substrate or printed circuit board 108 is below the die 104, it is desirable to make sure that encapsulant 112 fills the gap below the die 104 in order to remove air or moisture pockets. Alternately, the encapsulant 112 may be applied to the bottom of the cutout 304 prior to positioning the die 104 within the cutout 304. Flow proceeds to decision block 520.
At decision block 520, following encapsulant 112 application and at least partial curing, if there are conductive die 104 and substrate or printed circuit board 108 surfaces, then flow proceeds to block 524. If there are not conductive die 104 and substrate or printed circuit board 108 surfaces, then flow instead proceeds to block 528.
At block 524, a 3D printed insulating layer 128 is applied to conductive surfaces of the die 104, the substrate or printed circuit board 108, or both. Flow proceeds to block 528.
At block 528, a 3D printed conductive layer 132 is applied over the 3D printed insulating layer 128 in block 524, or directly to surfaces of the die 104, encapsulant 112, and a top surface of the substrate or printed circuit board 108. Flow ends at block 528.
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At block 604, height profiles for one or more dies 104 and a substrate or printed circuit board 108 are determined. In a first embodiment, the existing height or thickness of the one or more dies 104 is the same as or very similar to the existing height of the substrate or printed circuit board 108. In a second embodiment, the existing height or thickness of the one or more dies 104 is less than the existing height of the substrate or printed circuit board 108. In a third embodiment, the existing height or thickness of the one or more dies 104 is greater than the existing height of the substrate or printed circuit board 108.
For the embodiments where the thicknesses of the one or more dies 104 and the substrate or printed circuit board 108 are different, and may be possible and desirable to reduce the thickness of the thicker of the dies 104 or substrate/printed circuit board 108 components. It is desirable to maintain similar thicknesses between the one or more dies 104 and the substrate or printed circuit board 108. Flow proceeds to block 608.
At block 608, cutouts 204, 304 and cutout voids 208 are formed in the substrate or printed circuit board 108. Each of the cutouts 204, 304 needs to be slightly larger than the die 104 intended to occupy each cut out 204, 304 in order for encapsulant 112 to flow within the cutout voids 208. Flow proceeds to block 612.
At block 612, each die 104 is positioned within a corresponding cutout 204, 304 and cutout voids 208. Preferably, each die 104 should be centered within the corresponding cutout 204, 304. Flow proceeds to block 616.
At block 616, encapsulant 112 is backfilled within the cutout voids 208 around each die 104. For embodiments where a portion of the substrate or printed circuit board 108 is below the die 104, it is desirable to make sure that encapsulant 112 fills the gap below the die 104 in order to remove air or moisture pockets. Alternately, the encapsulant 112 may be applied to the bottom of the cutout 304 prior to positioning the die 104 within the cutout 304. Flow proceeds to decision block 620.
At decision block 620, the thickness profiles of the die 104 and the substrate or printed circuit board 108 are compared in order to determine if underfill is required. If the height profiles of the die 104 and the substrate or printed circuit board 108 are dissimilar, then flow proceeds to block 624. If the height profiles of the die 104 and the substrate or printed circuit board 108 are not dissimilar, then flow instead proceeds to decision block 628.
At block 624, underfill areas between the die 104 and substrate or printed circuit board 108 are filled with either encapsulant material 112 or 3D printed bond insulator material 128. Flow proceeds to decision block 628.
At decision block 628, following encapsulant 112 application and at least partial curing, if there are conductive die 104 and substrate or printed circuit board 108 surfaces, then flow proceeds to block 632. If there are not conductive die 104 and substrate or printed circuit board 108 surfaces, then flow instead proceeds to block 636. Flow proceeds to block 632.
At block 632, a 3D printed insulating layer 128 is applied to conductive surfaces of the die 104, the substrate or printed circuit board 108, or both. Flow proceeds to block 636.
At block 636, a 3D printed conductive layer 132 is applied over the 3D printed insulating layer 128 in block 632, or directly to surfaces of the die 104, encapsulant 112, and a top surface of the substrate or printed circuit board 108. Flow ends at block 636.
Finally, those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiments as a basis for designing or modifying other structures for carrying out the same purposes of the present invention without departing from the spirit and scope of the invention as defined by the appended claims.
