1. Field of the Invention
The present invention relates to a memory module comprising memory devices, in particular to a very low profile memory module comprising memory devices. The present invention further relates to a printed circuit board.
2. Description of the Related Art
Modern computer systems must meet ever increasingly challenging requirements, set by the ongoing progress of information technology. Said requirements mainly translate into ever increasing computing power and ever increasing storage capacity for electronic data memories. As far as the latter electronic data memories are concerned, the computer industry has established the so-called DRAM (Dynamic Random Access Memory) as an economic means for high speed and high capacity storage for large amounts of information.
Although a DRAM requires continuous refreshing of the stored information, speed and information density, combined with relatively low cost, have put the DRAM to a pivotal position in the field of information technology. Almost every modern computer system, ranging for example from PDAs over notebooks and desktop computers to high-end servers, takes advantage of this economic and fast data storing concept.
Above all, the already mentioned server systems require large storage capacity combined with high speed, and DRAM devices may therefore be optimized for server applications. A plurality of DRAM devices are compiled on a printed circuit board to form a standardized memory module, such as a DIMM (Dual Inline Memory Module). These memory modules are then connected to further computing and processing hardware by means of detachable sockets. In this way, the memory of a computer system may easily be expanded by simply adding further memory modules or by replacing memory modules with memory modules that store more data.
Besides the DIMM, the so-called very low profile DIMM (VLP-DIMM) has been established by the semiconductor and computer industry for special applications, where space is very limited. Therein a single memory module must not exceed a certain height and width, thereby enabling high package density of entire computer systems. Such systems then allow for a higher integration, and, furthermore, complete and powerful server computers may fit into a slim and standardized chassis. The space on such a VLP module is very limited. Apart from the DRAM devices, other supportive electronic entities, such as passive components, have to be integrated onto the printed circuit board of a respective memory module. Those passive components may be useful to facilitate undisturbed signal flow and related suppression of electromagnetic interference. A prominent example for such passive components are termination resistors or capacitors for impedance matching.
Since the overall capacity of a memory module is determined by the capacitance of the applied DRAM devices and by the number of individual DRAM devices, it is desirable to increase the memory capacity of a single device, as well as to increase the number of devices on one module. However, achieving this objective is hindered by the fact that modern DRAM devices with higher capacity may also require larger and/or a rectangular foot print, i.e. a foot print different from a square-like foot print. In conjunction with the necessary placement of passive components and interconnections pads (e.g. pins), required for connectivity to the main board, the large and rectangular foot print of single DRAM devices may pose restrictions to the maximum number of memory devices which can be fit on a data memory module. This may also pose severe limits to the maximum achievable capacitance of a VLP-DIMM.
Various aspects of the present invention can provide particular advantages for an improved memory module, an improved very low profile memory module, and an improved printed circuit board.
According to a first aspect of the invention, a memory module comprises a printed circuit board with a main surface bounded by a first side and a second side, the first side being longer than the second side, the first side further comprising a plurality of interconnection pads. Furthermore, a first and a second generally rectangular memory device are provided each having a first device side and a second device side, wherein the first device side is longer than the second device side, the first and second memory devices positioned on the main surface of the printed circuit board in such a way that the first device side of the first memory device is generally parallel to the printed circuit board first side and the first device side of the second memory device is generally perpendicular to the printed circuit board first side. A first set of passive components is connected to the first memory device and a second set of passive components is connected to the second memory device, the first and second sets of passive components positioned between the first memory device and the interconnection pads.
According to a second aspect of the invention, a printed circuit board comprises a main surface bounded by a first side and a second side, the first side being longer than the second side, the first side further comprising a plurality of interconnection pads. A first set of landing pads is positioned within a first field of the printed circuit board, the first field having a long side and a short side, wherein the long side is generally parallel to the printed circuit board first side. A second set of landing pads is positioned on a second field on the main surface of the printed circuit board, the second field having a long side and a short side, wherein the long side is generally perpendicular to the printed circuit board first side. A third set of landing pads is positioned between the first field and the interconnection pads, the third set of landing pads connected to the first set of landing pads. A fourth set of landing pads is positioned between the first field and the interconnection pads, the fourth set of landing pads connected to the second set of landing pads.
According to a third aspect of the invention a very low profile memory module comprises a printed circuit board comprising a main surface bounded by a first side and a second side, wherein the first side of the printed circuit board is between about 133 mm and 134 mm long and the second side of the printed circuit board is between about 18 mm and 19 mm long, the first side further comprising a plurality of interconnection pads. At least seven generally rectangular first memory devices and at least two generally rectangular second memory devices are provided, each memory device having a long side and a short side, the first and second memory devices positioned on the main surface of the printed circuit board such that each first memory device long side is generally parallel to the printed circuit board first side and each second memory device long side is generally perpendicular to the printed circuit board first side. A first set of passive components is connected to the first memory device and a second set of passive components is connected to the second memory device, the first and second sets of passive components positioned between the first memory device and the interconnection pads. A first signal line connects a first contact pad of one of the memory devices to a first contact pad of another of the memory devices and a second signal line connects a second contact pad of one of the memory devices to a second contact pad of another of the memory devices, wherein the first signal line and the second are of equal length.
According to a fourth aspect of the invention a main printed circuit board in an electronic device contains a microcontroller, an input/output device, sockets for accepting additional boards and signal lines for interconnecting the microcontroller the input/output device and the sockets. One of said sockets includes a memory module, said memory module comprising a printed circuit board comprising a main surface bounded by a first side and a second side, the first side being longer than the second side, the first side further comprising a plurality of interconnection pads, a first and a second generally rectangular memory device each having a long side, a short side and a set of contact pads, the first and second memory devices positioned on the main surface of the printed circuit board such that the first memory device long side is generally parallel to the printed circuit board first side and the second memory device long side is generally perpendicular to the printed circuit board first side and a first set of passive components connected to the first memory device and a second set of passive components connected to the second memory device, the first and second sets of passive components positioned between the first memory device and the interconnection pads.
These above recited features of the present invention will become clear from the following description, taken in conjunction with the accompanying drawings. It is to be noted, however, that the accompanying drawings illustrate only typical embodiments of the present invention and are, therefore, not to be considered limiting of the scope of the invention. The present invention may admit other equally effective embodiments.
Both the first and the second memory device 11, 12 are of the same size and have a generally rectangular foot print, i.e. a non-square foot print since their respective long sides 111, 121 are longer than their respective short sides 112, 122. An example for a DRAM memory device having a rectangular foot print is a 1 GB DRAM chip.
The first memory device 11 and the second memory device 12 are arranged on the printed circuit board main surface 10 in such a way that their respective long sides 111, 121 are perpendicular to each other in order to be able to assemble an extended number of memory devices onto the printed circuit board main surface 10, and hence to increase the overall memory capacity of the memory module 1.
Interconnection pads 25 are arranged on the printed circuit board main surface 10 along one of the its first sides 101 and may reach up to an edge of the printed circuit board. The printed circuit board may also comprise notches and/or other means (not shown) for fitting the memory module 1 into a socket for proper connection of the memory module 1 to other computing components, such as a mother board with central processing units, via the interconnection pads 25.
A first set 13 of passive components 31 and a second set 14 of passive components 41 are arranged between the first memory device 11 and the interconnection pads 25. This passive component arrangement enables the second memory device 12 to be placed with its short sides 122 along the first sides 101 of the memory module 1. Hence the second memory module 12 requires a reduced lateral space with respect to the first sides 101 of the printed circuit board main surface 10. Because the second set 14 of passive components 41 that are connected to the second memory device 12 is placed between the first memory device 11 and the interconnection pads 25, the second memory device 12 can be arranged directly adjacent to the interconnection pads 25. Therefore, almost the entire printed circuit board second side 102 is available for the foot print of the second memory device 12.
The printed circuit board main surface 10 may carry memory devices 11, 12, passive components 31, 41, and interconnection pads 25 on both the top and the bottom surface, thus carrying up to twice the number of components and devices as shown in
The first set 13 of passive components 31 and second sets 14 of passive components 41 are positioned between the first memory device 11 and the interconnection pads 25 are located on the main surface 10 of the printed circuit board. Alternatively, the first set 13 of passive components 31 and second sets 14 of passive components 41 are positioned between the first memory device 11 and the interconnection pads 25 are buried under the main surface of the printed circuit board.
The arrangement of the landing pads 26 within the first field 110 matches the arrangement of the landing pads 26 within the second field 120. Hence memory devices with identical pin-out layouts may be mounted on the first field 110 of landing pads 26 and on the second field 120 of landing pads 26.
Furthermore, landing pads 26 are arranged within a third field 130 and a fourth field 140 in order to be connected to the passive components 41, 31 described in
Said first generally rectangular memory devices 211 are arranged on the printed circuit board main surface 20 in such a way that their long sides are parallel to the lateral extension of the printed circuit board main surface 20, i.e. the length 21. The second generally rectangular memory devices 212 are arranged on the printed circuit board 20 in such a way that their short sides are parallel to the lateral extension of the printed circuit board main surface 20, i.e. the length 21. First passive components 221 being connected to the first memory devices 211 and second passive components 222 being connected to the second memory devices 212 are arranged between one long side of the printed circuit board main surface 20 and the first memory devices 211. Furthermore, interconnection pads (not shown) are arranged at the one long side of the printed circuit board main surface 20.
According to the arrangement shown in
In the illustrative embodiment, the memory module 2 further comprises memory controllers 230, 232 and a phase locked loop 231 (PLL) as shown in
A first landing pad 1101 and a second landing pad 1102 of the first field 110 and a first landing pad 1201 and a second landing pad 1202 of the second field 120 are arranged at corresponding positions within the first field 110 and the second field 120 with respect to the respective black diamond 400 orientation marks. A first signal line 51 connects the first landing pad 1101 of the first field 110 to the first landing pad 1201 of the second field 120. A second signal line 52 connects the second landing pad 1102 of the first field 110 to the second landing pad 1202 of the second field 120. Routing of signal lines 51 and 52 is carried out while keeping the respective length of the signal lines 51, 52 as short as possible and while avoiding line crossings. Line crossings may require so-called vias and routing of the respective signal lines on more than one layer. The conventional method of routing signal lines on more than one layer by means of vias for contacting signal lines between two layers may be employed for routing the signal lines 51, 52 as well, but is not described here in greater detail.
As shown in
The equal lengths of two corresponding signal lines, such as the first signal line 51 and the second signal line 52, may be required to achieve well-defined and equal fly times of signals being routed between first landing pads 1101, 1201 and between second landing pads 1102, 1202, respectively. In memory modules, the well-defined and equal signal fly times are typically important for a data flow between memory devices without data collision, delay cycles, additional signal routing or data scrambling. With the layout shown in
The routing of connections between landing pads on the printed circuit board main surfaces disclosed with respect to