Patent Application
20160181127
The present invention relates to circuit element coupling method and structure, and more particularly to a package for a circuit element, such as a flip chip, with underfill process.
A conventional circuit element, such as a flip chip, usually has vertical sidewalls. As shown in
A purpose of the present invention is to solve the above-mentioned problems.
A method for coupling a circuit element onto a carrier element is provided. The method includes steps of providing the circuit element having a front side, a back side, and at least a sidewall formed between the front side and the back side, wherein the sidewall has a sloped portion inclined to the front side at an angle greater than zero degree; bringing the circuit element on the carrier element with the front side facing the carrier element; and forming an underfilling structure so that the underfilling structure is disposed between the circuit element and the carrier element and covers at least a portion of the sidewall.
The circuit element may be an integrated circuit chip, and the carrier element is a substrate or an interposer.
The sloped portion of the sidewall is formed by cutting a conventional circuit element from the back side to the sidewall, so that at least a portion of the sidewall is removed.
In an embodiment, the sidewall has a sloped portion at an angle greater than 30 degree.
The sloped portion of the sidewall may be formed by a bevel cutting process, a laser cutting process, a polishing process, a plasma cutting process, a waterjet cutting process, etc.
The present invention further provides a package structure. The package structure includes a circuit element having a front side, a back side, and at least a sidewall formed between the front side and the back side; a carrier element attached thereon the circuit element, wherein the front side of the circuit element faces the carrier element; and an underfill structure disposed between the circuit element and the carrier element, wherein the circuit element is surrounded by the underfill structure on at least a portion of the sidewall, and the sidewall includes a sloped portion inclined at an angle greater than zero degree.
In embodiments, the circuit element is an integrated circuit chip, and the carrier element is a substrate or an interposer. In other embodiment, the circuit element and the carrier element are connected through at least a through silicon via.
The sloped portion of the sidewall is inclined from a point nearing or located at the front side toward the back side. In an embodiment, the sloped portion is inclined at an angle greater than 30 degree.
The circuit element further includes a plurality of bumps disposed on the front side. The bumps may be solder balls, copper pillars with solders, etc.
The present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, in which:
The present invention will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this invention are presented herein for purpose of illustration and description only. It is not intended to be exhaustive or to be limited to the precise form disclosed.
Referring to
The method for coupling the circuit element 6 onto the carrier element 5 includes steps of providing the circuit element 6 having the inclined sidewall 63; bringing the circuit element 6 on the carrier element 5 with the front side 61 of the circuit element 6 facing the carrier element 5; and forming an underfilling structure 8 so that the underfilling structure 8 is disposed between the circuit element 6 and the carrier element 5 and covers at least a portion of the sidewall 63 of the circuit element 6. In some cases, the circuit element 6, e.g. an integrated circuit chip, may be treated by plasma before the underfilling process.
The inclined sidewall 63 may prevent the underfilling structure 8 exceeds a top point 631 of the sidewall 63. Accordingly, the sidewall stress is reduced and thus reduces the possibility of sidewall cracking. In another embodiment, as shown in
In fact, it is not necessary to incline the whole sidewall. As shown in
The sloped portion 641 of the sidewall 64, or the inclined sidewall 63, may be formed by removing at least a portion of a vertical sidewall of a conventional circuit element by a bevel cutting process, a laser cutting process, a polishing process, a plasma cutting process, a waterjet cutting process, etc.
As shown in
To sum up, the inclined portion of the sidewall of a circuit element will change the shape of the underfilling structure and reduce the stress of the warpage to the circuit element, which will thus reduce the possibility of sidewall crack. Furthermore, since the sloped portion is inclined from the front side to the back side of the circuit element, the area of the front side for forming the active elements of the circuit will not be reduced.
While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.
