This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2008-313208, filed Dec. 9, 2008, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device in which the bottom surface and side surface of a semiconductor substrate are covered with a resin protective film.
2. Description of the Related Art
A device which is called a chip-size package (CSP) is known from Published Japanese Patent No. 4103896. In this semiconductor device, a plurality of wiring lines are provided on the upper surface of an insulating film disposed on a semiconductor substrate. A columnar electrode is provided on the upper surface of a connection pad portion of the wiring line. A sealing film is provided on the upper surface of the insulating film including the wiring lines so that the upper surface of this sealing film is flush with the upper surface of the columnar electrode. A solder ball is provided on the upper surface of the columnar electrode. In this case, in order to prevent the exposure of the lower surface and side surface of the semiconductor substrate, the lower surface and side surface of the semiconductor substrate are covered with a resin protective film.
Meanwhile, in Published Japanese Patent No. 4103896, an assembly in which an insulating film, wiring lines, columnar electrodes and a sealing film are formed is prepared on the upper side of a semiconductor substrate in a wafer state (hereinafter referred to as a semiconductor wafer). Then, the semiconductor wafer is inverted. Then, a trench having a predetermined width is formed partway through the sealing film by half-cut (cutting halfway) between semiconductor device formation regions on the bottom side (surface opposite to that on which the sealing film and other elements are formed) of the semiconductor wafer. In this state, the semiconductor wafer is separated into semiconductor substrates by the formation of the trench.
Furthermore, a resin protective film is formed on the bottom surfaces of the semiconductor substrates including the inner part of the trench. Then, the entire workpiece including the semiconductor substrates is inverted. Then, solder balls are formed on the upper surfaces of the columnar electrodes. Then, the sealing film and the resin protective film are cut in the center of the width direction of the trench. Consequently, a semiconductor device having a structure wherein the bottom surface and side surface of the semiconductor substrate are covered with the resin protective film is obtained.
However, in Published Japanese Patent No. 4103896, after the trench is formed partway through the sealing film by half-cut on the bottom side of the inverted semiconductor wafer, the resin protective film is simply formed on the bottom surfaces of the semiconductor substrates including the inner part of the trench. That is, the resin protective film is simply formed in a condition where the semiconductor wafer is separated into the semiconductor substrates by the formation of the trench. Therefore, strength in the half-cut step and the subsequent steps decreases, and the entire workpiece including the semiconductor substrates is warped to a relatively great extent. This disadvantageously causes difficulty in maintaining the quality and in handling in each step.
It is therefore an object of this invention to provide a semiconductor device manufacturing method which can prevent the entire workpiece including semiconductor substrates from being easily warped during the formation of a resin protective film for protecting the semiconductor substrates.
According to a first aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: preparing an assembly having an insulating film formed on one surface of a semiconductor wafer where an integrated circuit is formed, an interconnect formed on the insulating film in such a manner as to be connected to the integrated circuit, an external connection bump electrode formed on the electrode connection pad portion of the interconnect, and a sealing film formed around the external connection bump electrode; affixing a support plate to the external connection bump electrode and the sealing film via an a separation layer;
forming a trench reaching an intermediate position of the thickness of the sealing film on the bottom side of the semiconductor wafer in parts corresponding to a dicing street and both sides thereof; forming a resin protective film on the bottom surface of the semiconductor wafer including the inner part of the trench; supplying energy from the support plate side onto the separation layer; removing off the support plate from the external connection bump electrode and the sealing film; and cutting the sealing film and the resin protective film in a width smaller than the width of the trench.
According to this invention, a resin protective film is formed on the bottom surface of a semiconductor wafer (semiconductor substrates) including the inner part of a trench in a condition where a support plate is affixed to an external connection bump electrode and a sealing film. Thus, it is possible to prevent the entire workpiece including the semiconductor substrates from being easily warped during the formation of the resin protective film for protecting the semiconductor substrates.
A passivation film (insulating film) 3 consisting of, for example, silicon oxide is provided on the upper surfaces of the silicon substrate 1 except for the center of the connection pad 2. The center of the connection pad 2 is exposed via an opening 4 provided in the passivation film 3. A protective film (insulating film) 5 consisting of, for example, a polyimide-based resin is provided on the upper surface of the passivation film 3. An opening 6 is provided in a part of the protective film 5 corresponding to the opening 4 of the passivation film 3.
An interconnect 7 is provided on the upper surface of the protective film 5. The interconnect 7 has a two-layer structure composed of a metal foundation layer 8 of, for example, copper provided on the upper surface of the protective film 5, and an upper metal layer 9 of copper provided on the upper surface of the metal foundation layer 8. One end of the interconnect 7 is connected to the connection pad 2 via the passivation film 3 and the protective film openings 4, 6. A columnar electrode (external connection bump electrode) 10 made of copper is provided on the upper surface of a connection pad portion (electrode connection pad portion) of the interconnect 7.
A resin protective film 11 consisting of, for example, epoxy resin is provided on the bottom surface of the silicon substrate 1 and on the side surfaces of the silicon substrate 1, the passivation film 3 and the upper protective film 5. In this case, the upper part of the resin protective film 11 provided on the side surfaces of the silicon substrate 1, the passivation film 3 and the upper protective film 5 projects straight upward from the upper surface of the upper protective film 5. In this state, the lower surface of the silicon substrate 1 and the side surfaces of the silicon substrate 1, the passivation film 3 and the upper protective film 5 are covered with the resin protective film 11.
A sealing film 12 consisting of, for example, epoxy resin is provided on the upper surface of the upper protective film 5 including the interconnect 7 and on the upper surface of the resin protective film 11 therearound. The columnar electrode 10 is provided so that its upper surface is flush with or several μm lower than the upper surface of the sealing film 12. A solder ball 13 is provided on the upper surface of the columnar electrode 10.
Next, one example of a method of manufacturing this semiconductor device is described. First, as shown in
In this case, the thickness of the semiconductor wafer 21 is greater to some degree than the thickness of the silicon substrate 1 shown in
Now, when the assembly shown in
Furthermore, a liquid adhesive agent for forming the adhesive layer 23 on the upper surfaces of the columnar electrode 10 and the sealing film 12 is first applied by, for example, the spin coating method. On the other hand, the separation layer 24 is previously formed on the lower surface of the support plate 25 made of glass. Then, the separation layer 24 previously formed on the lower surface of the support plate 25 is affixed to the upper surface of the applied liquid adhesive agent under vacuum. This affixing is carried out under vacuum to prevent air from being contained between the separation layer 24 previously formed on the lower surface of the support plate 25 and the adhesive layer 23. Then, ultraviolet rays are radiated from the side of the support plate 25, and the applied liquid adhesive agent is cured to form the adhesive layer 23. In addition, the separation layer 24 is not thermally decomposed by the low-energy ultraviolet radiation.
Then, the assembly shown in
Then, as shown in
Furthermore, this blade 27 is used to form a trench 28 in parts of the semiconductor wafer 21 corresponding to the dicing street 22 and both sides thereof, the passivation film 3, the protective film 5 and the sealing film 12. In this case, the depth of the trench 28 extends partway in the sealing film 12, and is, for example, ½ or more, preferably ⅓ or more than the thickness of the sealing film 12. In this state, the semiconductor wafer 21 is separated into the semiconductor substrates 1 by the formation of the trench 28. Then, the support plate 25 is detached from the upper surface of the dicing tape 26. In addition, in this step, the use of a dicing machine for the half-cut enables processing without affixing the dicing tape.
Then, as shown in
In this case, the semiconductor wafer 21 is separated into the silicon substrates 1. However, the support plate 25 is affixed to the lower surfaces of the columnar electrode 10 and the sealing film 12 via the adhesive layer 23 and the separation layer 24. Therefore, when the resin protective film 11 consisting of a thermosetting resin such as epoxy resin is applied and cured, it is possible to prevent the entire workpiece including the separated silicon substrates 1 from being easily warped, and it is also possible to prevent any difficulty from being caused in the subsequent steps by the warping.
Then, as shown in
Then, as shown in
The irradiated light is not limited to the YAG laser light. The infrared rays light or other light is acceptable. Moreover, the separation layer 24 may not be the absorption of light and conversion into the thermal energy. It only has to be the one that is formed the gap with the addition of some energy in the separation layer 24, and is self-separated in the thickness direction.
Then, the support plate 25 is detached from the upper surface of the lower separation layer 24b together with the upper separation layer 24a. Further, the adhesive layer 23 is detached from the upper surfaces of the columnar electrode 10 and the sealing film 12 together with the lower separation layer 24b.
Here, the reason that the separation layer 24 is used in addition to the adhesive layer 23 is described. The support plate 25 made of, for example, glass is riot flexible, so that its region corresponding to the whole surface of the semiconductor wafer has to be detached at once. In other words, the support plate 25 can not be peeled off little by little. Therefore, it is riot possible to separate the support plate 25 and the silicon substrate 1 from each other without deformation or damage. Thus, the separation layer 24 is used to facilitate the detachment of the support plate 25. On the other hand, the adhesive layer 23 including the lower separation layer 24b is sufficiently flexible and can therefore be easily peeled off.
Then, as shown in
In this case, a blade having the same width as the width of the dicing street 22 is used. Therefore, as shown in
Number | Date | Country | Kind |
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2008-313208 | Dec 2008 | JP | national |